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    • 1. 发明授权
    • High electron mobility semiconductor device employing selectively doped
heterojunction and dual, undoped spacer layers
    • 采用选择性掺杂的异质结和双重未掺杂间隔层的高电子迁移率半导体器件
    • US4593301A
    • 1986-06-03
    • US707290
    • 1985-03-01
    • Tsuguo InataShigehiko Sasa
    • Tsuguo InataShigehiko Sasa
    • H01L29/812H01L21/338H01L29/00H01L29/205H01L29/778H01L29/80
    • H01L29/7787
    • In order to make IC comprising high electron mobility semiconductor device, it is necessary to make the carrier in channel layer not to loose its high mobility by thermal treatment in the IC fabrication process. It has been found that the mobility of two dimensional electron gas (2DEG) is lost by scattering of ionized impurity diffused from doped layer into spacer layer which separates the 2DEG in channel layer from the doped layer. So another spacer (second spacer) is inserted between the spacer (first spacer) and the doped layer to prevent the diffusion of impurity. Proposed multilayered structure is as follows. A channel layer made of i-GaAs is formed on a high resistivity GaAs substrate. Upon which a first spacer layer (prior art) of undoped Al.sub.x Ga.sub.1-x As is formed, over which the second spacer layer of i-GaAs is formed, then over which the doped layer of n-Al.sub.x Ga.sub.1-x As is formed. The thickness of the second spacer layer is approximately 20 .ANG., and that of the first spacer is approximately 40 .ANG.. Applying such structure to the high electron mobility transistor, it could bear the heat treatment of 750.degree. C. 10 min. and more that 950.degree. C. 10 sec. annealing.
    • 为了制造包含高电子迁移率半导体器件的IC,需要通过IC制造工艺中的热处理使沟道层中的载体不会失去其高迁移率。 已经发现,通过从掺杂层扩散的离子化杂质的散射损失了二维电子气(2DEG)的迁移率到将沟道层中的2DEG与掺杂层分离的间隔层。 因此,在间隔物(第一间隔物)和掺杂层之间插入另外的间隔物(第二间隔物),以防止杂质的扩散。 拟议的多层结构如下。 在高电阻GaAs衬底上形成由i-GaAs制成的沟道层。 在其上形成未掺杂的Al x Ga 1-x As的第一间隔层(现有技术),在其上形成i-GaAs的第二间隔层,然后在其上形成n-Al x Ga 1-x As的掺杂层。 第二间隔层的厚度约为20,第一间隔物的厚度约为40。 将这种结构应用于高电子迁移率晶体管,可以承受750℃的热处理10分钟。 更多的是950℃10秒。 退火。
    • 2. 发明授权
    • Optically activated resonant-tunneling transistor
    • 光电激活谐振隧道晶体管
    • US5266814A
    • 1993-11-30
    • US757185
    • 1991-09-10
    • Tsuguo InataShunichi Muto
    • Tsuguo InataShunichi Muto
    • H01L29/68H01L29/20H01L31/0352H01L31/11H01L27/14H01L31/00
    • B82Y20/00H01L31/035236H01L31/11
    • A resonant-tunneling transistor comprises a first semiconductor layer acting as a collector, a second semiconductor layer provided on the first semiconductor layer and forming a potential barrier of electrons in the conduction band, a third semiconductor layer provided on the second semiconductor layer and forming a quantum well of electrons in the conduction band, a fourth semiconductor layer provided on the third semiconductor layer and forming a quantum well of holes in the valence band, the fourth semiconductor layer simultaneously forming a potential barrier of electrons in the conduction band, a fifth semiconductor layer provided on the fourth semiconductor layer acting as an emitter, a first electrode provided in contact with the first semiconductor layer for recovering electrons therefrom, a second electrode provided in contact with the fifth semiconductor layer for injecting electrons thereinto, and an optical passage for introducing an optical beam to the first semiconductor layer.
    • 谐振隧穿晶体管包括用作集电极的第一半导体层,设置在第一半导体层上并在导带中形成电子势垒的第二半导体层,设置在第二半导体层上的第三半导体层, 在导带中的电子的量子阱,设置在第三半导体层上并形成价带中的空穴的量子阱的第四半导体层,第四半导体层同时在导带中形成电子的势垒,第五半导体 设置在用作发射极的第四半导体层上的第一电极,与第一半导体层接触以用于从其中回收电子的第一电极,与第五半导体层接触以用于向其中注入电子的第二电极,以及用于引入电子的光学通道 到第一半导体的光束 层。