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1. 发明授权

US08901669B2 Method of manufacturing an IC comprising a plurality of bipolar transistors and IC comprising a plurality of bipolar transistors 有权
标题翻译：制造包括多个双极晶体管的IC的方法和包括多个双极晶体管的IC
公开(公告)号：US08901669B2
公开(公告)日：2014-12-02
申请号：US13560517
申请日：2012-07-27
申请人： Hans Mertens , Johannes Theodorus Marinus Donkers , Evelyne Gridelet , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee
发明人： Hans Mertens , Johannes Theodorus Marinus Donkers , Evelyne Gridelet , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee
IPC分类号： H01L29/66
CPC分类号： H01L21/8222 , H01L21/82285 , H01L27/0825 , H01L27/0826
摘要： A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.
摘要翻译：一种制造集成电路的方法，包括包括第一和第二类型双极晶体管的双极晶体管，所述方法包括提供包括第一隔离区域的衬底，每个隔离区域与第二隔离区域分离，所述有源区域包括所述双极晶体管之一的集电极杂质; 在衬底上形成基层堆叠; 在所述第一类型双极晶体管的区域中在所述基极层堆叠上形成第一有效厚度的第一发射极盖层; 在所述第二类型双极晶体管的区域中形成与所述基极层叠层上的所述第一有效厚度不同的第二有效厚度的第二发射极帽层; 以及在每个双极晶体管的发射极盖层上形成发射极。根据这种方法的IC。

2. 发明授权

US08871599B2 Method of manufacturing IC comprising a bipolar transistor and IC 有权
标题翻译：制造包括双极晶体管和IC的IC的方法
公开(公告)号：US08871599B2
公开(公告)日：2014-10-28
申请号：US13599389
申请日：2012-08-30
申请人： Johannes Josephus Theodorus Marinus Donkers , Petrus Hubertus Cornelis Magnee , Blandine Duriez , Evelyne Gridelet , Hans Mertens , Tony Vanhoucke
发明人： Johannes Josephus Theodorus Marinus Donkers , Petrus Hubertus Cornelis Magnee , Blandine Duriez , Evelyne Gridelet , Hans Mertens , Tony Vanhoucke
IPC分类号： H01L21/331 , H01L21/8249 , H01L29/737
CPC分类号： H01L29/7378 , H01L21/8249 , H01L27/0623 , H01L29/1004 , H01L29/161 , H01L29/165 , H01L29/456 , H01L29/66242
摘要： Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material.
摘要翻译：公开了一种集成电路和制造包括双极晶体管的集成电路的方法，所述方法包括提供包括由包括集电极的有源区域分离的一对隔离区域的衬底; 在所述衬底上形成基层堆叠; 形成具有第一迁移温度和蚀刻停止层的迁移层; 形成具有第二迁移温度的基底接触层; 蚀刻基底接触层中的发射器窗口，从而形成从发射器窗口延伸的空腔; 并在氢气氛中将所得结构暴露于第一迁移温度，由此用迁移层材料填充空腔。

3. 发明授权

US08524551B2 Method of manufacturing heterojunction bipolar transistor and heterojunction bipolar transistor 有权
标题翻译：异质结双极晶体管和异质结双极晶体管的制造方法
公开(公告)号：US08524551B2
公开(公告)日：2013-09-03
申请号：US13547067
申请日：2012-07-12
申请人： Philippe Meunier-Beillard , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Tony Vanhoucke
发明人： Philippe Meunier-Beillard , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Tony Vanhoucke
IPC分类号： H01L21/337
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： A method of forming a heterojunction bipolar transistor by depositing a first stack comprising an polysilicon layer and a sacrificial layer on a mono-crystalline silicon substrate surface; patterning that stack to form a trench extending to the substrate; depositing a silicon layer over the resultant structure; depositing a silicon-germanium-carbon layer over the resultant structure; selectively removing the silicon-germanium-carbon layer from the sidewalls of the trench; depositing a boron-doped silicon-germanium-carbon layer over the resultant structure; depositing a further silicon-germanium-carbon layer over the resultant structure; depositing a boron-doped further silicon layer over the resultant structure; forming dielectric spacers on the trench sidewalls; filling the trench with emitter material; exposing polysilicon regions outside the trench side walls by selectively removing the sacrificial layer; implanting boron impurities into the exposed polysilicon regions to define base implants; and exposing the resultant structure to a thermal budget for annealing the boron impurities.
摘要翻译：一种通过在单晶硅衬底表面上沉积包括多晶硅层和牺牲层的第一堆叠来形成异质结双极晶体管的方法; 图案化该叠层以形成延伸到衬底的沟槽; 在所得结构上沉积硅层; 在所得结构上沉积硅 - 锗 - 碳层; 从沟槽的侧壁选择性地去除硅 - 锗 - 碳层; 在所得结构上沉积硼掺杂的硅 - 锗 - 碳层; 在所得结构上沉积另外的硅 - 锗 - 碳层; 在所得结构上沉积硼掺杂的另外的硅层; 在沟槽侧壁上形成电介质间隔物; 用发射体材料填充沟槽; 通过选择性地去除牺牲层来暴露沟槽侧壁外的多晶硅区域; 将硼杂质注入暴露的多晶硅区域以限定基底植入物; 并将所得结构暴露于用于退火硼杂质的热预算。

4. 发明授权

US08260098B1 Optocoupler circuit 有权
标题翻译：光电耦合器电路
公开(公告)号：US08260098B1
公开(公告)日：2012-09-04
申请号：US13029951
申请日：2011-02-17
申请人： Dusan Golubovic , Gerhard Koops , Tony Vanhoucke , Rob Van Dalen
发明人： Dusan Golubovic , Gerhard Koops , Tony Vanhoucke , Rob Van Dalen
IPC分类号： G02B6/12 , H01L21/70 , H01L21/8238 , H01L21/336 , H01L21/331 , H01L21/76
CPC分类号： H01L27/15 , H01L31/173 , H01L33/343
摘要： An optocoupler device facilitates on-chip galvanic isolation. In accordance with various example embodiments, an optocoupler circuit includes a silicon-on-insulator substrate having a silicon layer on a buried insulator layer, a silicon-based light-emitting diode (LED) having a silicon p-n junction in the silicon layer, and a silicon-based photodetector in the silicon layer. The LED and photodetector are respectively connected to galvanically isolated circuits in the silicon layer. A local oxidation of silicon (LOCOS) isolation material and the buried insulator layer galvanically isolate the first circuit from the second circuit to prevent charge carriers from moving between the first and second circuits. The LED and photodetector communicate optically to pass signals between the galvanically isolated circuits.
摘要翻译：光耦合器件便于片上电流隔离。根据各种示例实施例，光耦合器电路包括在绝缘体层上具有硅层的绝缘体上硅衬底，在硅层中具有硅pn结的硅基发光二极管（LED），以及硅层中的硅基光电探测器。 LED和光电检测器分别连接到硅层中的电隔离电路。硅（LOCOS）隔离材料的局部氧化和掩埋绝缘体层将第一电路与第二电路电隔离，以防止电荷载流子在第一和第二电路之间移动。 LED和光电检测器以光学方式进行通信，以在电隔离电路之间传递信号。

5. 发明申请

US20120038415A1 METHOD AND APPARATUS FOR MAINTAINING CIRCUIT STABILITY 有权
标题翻译：维持电路稳定性的方法和装置
公开(公告)号：US20120038415A1
公开(公告)日：2012-02-16
申请号：US13202922
申请日：2010-01-21
申请人： Tony Vanhoucke , Godefridus A. M. Hurkx
发明人： Tony Vanhoucke , Godefridus A. M. Hurkx
IPC分类号： G05F1/10 , G06F19/00
CPC分类号： H03F1/52 , H03F2200/447 , H03F2200/462 , H03F2200/468 , H03F2200/471
摘要： A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.
摘要翻译：一种用于晶体管装置的控制电路包括用于监测晶体管装置（50）两端的电流和电压的监视装置（60）和用于确定电流和电压值是否限定了稳定的工作点的装置（62）经营区域。稳定工作区域包括具有包括电热不稳定线的边界（30）的区域。

6. 发明授权

US08101491B2 Heterojunction bipolar transistor 有权
标题翻译：异质结双极晶体管
公开(公告)号：US08101491B2
公开(公告)日：2012-01-24
申请号：US12912030
申请日：2010-10-26
申请人： Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Hans Mertens
发明人： Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Hans Mertens
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L21/8249 , H01L29/66242
摘要： According to an example embodiment, a heterostructure bipolar transistor, HBT, includes shallow trench isolation, STI, structures around a buried collector drift region in contact with a buried collector. A gate stack including a gate oxide and a gate is deposited and etched to define a base window over the buried collector drift region and overlapping the STI structures. The etching process is continued to selectively etch the buried collector drift region between the STI structures to form a base well. SiGeC may be selectively deposited to form epitaxial silicon-germanium in the base well in contact with the buried collector drift region and poly silicon-germanium on the side walls of the base well and base window. Spacers are then formed as well as an emitter.
摘要翻译：根据示例性实施例，异质结双极晶体管HBT包括浅沟槽隔离，STI，与埋藏式集电极接触的掩埋集电极漂移区周围的结构。沉积并蚀刻包括栅极氧化物和栅极的栅极堆叠，以在掩埋集电极漂移区域上限定基极窗并与STI结构重叠。继续蚀刻处理以选择性地蚀刻STI结构之间的掩埋的集电极漂移区域以形成基底阱。可选择性沉积SiGeC，以在基底阱中形成外延硅 - 锗，以与基底阱和基底窗的侧壁上的掩埋集电极漂移区和多晶硅 - 锗接触。然后形成间隔物以及发射体。

7. 发明授权

US08686424B2 Bipolar transistor manufacturing method, bipolar transistor and integrated circuit 有权
标题翻译：双极晶体管制造方法，双极晶体管和集成电路
公开(公告)号：US08686424B2
公开(公告)日：2014-04-01
申请号：US13616400
申请日：2012-09-14
申请人： Evelyne Gridelet , Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee , Hans Mertens , Blandine Duriez
发明人： Evelyne Gridelet , Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee , Hans Mertens , Blandine Duriez
IPC分类号： H01L29/72
CPC分类号： H01L29/732 , H01L29/66242 , H01L29/7378
摘要： Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14′), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.
摘要翻译：公开了一种制造双极晶体管的方法，包括提供包括通过包括集电极杂质的有源区（11）与第二隔离区分离的第一隔离区（12）的衬底（10）在所述衬底上形成层堆叠，所述层堆叠包括基底层（14,14'），所述基底层上的硅覆盖层（15）和位于所述硅上的硅 - 锗（SiGe）基接触层（40）盖层; 蚀刻SiGe基极接触层以在集电极杂质上形成发射极窗口（50），其中硅发射极盖层用作蚀刻停止层; 在发射器窗口中形成侧壁间隔物（22）; 以及用发射体材料（24）填充发射器窗口。还公开了根据该方法制造的双极晶体管和包括一个或多个这样的双极晶体管的IC。

8. 发明申请

US20130032891A1 METHOD OF MANUFACTURING AN IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS AND IC COMPRISING A PLURALITY OF BIPOLAR TRANSISTORS 有权
标题翻译：制造包含多晶双极晶体管的IC的方法和包含多种双极晶体管的IC
公开(公告)号：US20130032891A1
公开(公告)日：2013-02-07
申请号：US13560517
申请日：2012-07-27
申请人： Hans Mertens , Johannes Theodorus Marinus Donkers , Evelyne Gridelet , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee
发明人： Hans Mertens , Johannes Theodorus Marinus Donkers , Evelyne Gridelet , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee
IPC分类号： H01L21/331 , H01L27/088
CPC分类号： H01L21/8222 , H01L21/82285 , H01L27/0825 , H01L27/0826
摘要： A method of manufacturing an integrated circuit comprising bipolar transistors including first and second type bipolar transistors, the method comprising providing a substrate comprising first isolation regions each separated from a second isolation region by an active region comprising a collector impurity of one of the bipolar transistors; forming a base layer stack over the substrate; forming a first emitter cap layer of a first effective thickness over the base layer stack in the areas of the first type bipolar transistor; forming a second emitter cap layer of a second effective thickness different from the first effective thickness over the base layer stack in the areas of the second type bipolar transistor; and forming an emitter over the emitter cap layer of each of the bipolar transistors. An IC in accordance with this method.
摘要翻译：一种制造集成电路的方法，包括包括第一和第二类型双极晶体管的双极晶体管，所述方法包括提供包括第一隔离区域的衬底，每个隔离区域与第二隔离区域分离，所述有源区域包括所述双极晶体管之一的集电极杂质; 在衬底上形成基层堆叠; 在所述第一类型双极晶体管的区域中在所述基极层堆叠上形成第一有效厚度的第一发射极盖层; 在所述第二类型双极晶体管的区域中形成与所述基极层叠层上的所述第一有效厚度不同的第二有效厚度的第二发射极帽层; 以及在每个双极晶体管的发射极盖层上形成发射极。根据这种方法的IC。

9. 发明申请

US20120168908A1 SPACER FORMATION IN THE FABRICATION OF PLANAR BIPOLAR TRANSISTORS 有权
标题翻译：平面双极晶体管制造中的间隙形成
公开(公告)号：US20120168908A1
公开(公告)日：2012-07-05
申请号：US13076290
申请日：2011-03-30
申请人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Philippe Meunier-Beillard
发明人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Philippe Meunier-Beillard
IPC分类号： H01L29/70 , H01L21/328
CPC分类号： H01L29/66318 , H01L29/0817 , H01L29/66242
摘要： A bipolar transistor is fabricated having a collector (52) in a substrate (1) and a base (57, 58) and an emitter (59) formed over the substrate. The base has a stack region (57) which is laterally separated from the emitter (59) by an electrically insulating spacer (71). The insulating spacer (71) has a width dimension at its top end at least as large as the width dimension at its bottom end and forms a Γ-shape or an oblique shape. The profile reduces the risk of silicide bridging at the top of the spacer in subsequent processing, while maintaining the width of emitter window.
摘要翻译：制造了在衬底（1）中具有集电体（52）和形成在衬底上的基极（57,58）和发射极（59）的双极晶体管。底座具有通过电绝缘间隔件（71）与发射器（59）横向分开的堆叠区域（57）。绝缘间隔件（71）的顶端的宽度尺寸至少与其底端的宽度尺寸一样大，并形成一个“G”形或一个倾斜的形状。该轮廓降低了后续处理中间隔物顶部的硅化物桥接的风险，同时保持了发射器窗口的宽度。

10. 发明申请

US20120037914A1 HETEROJUNCTION BIOPOLAR TRANSISTOR AND MANUFACTURING METHOD 有权
标题翻译：异源双极晶体管和制造方法
公开(公告)号：US20120037914A1
公开(公告)日：2012-02-16
申请号：US13205932
申请日：2011-08-09
申请人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Marie Josephe Fabienne Gridelet
发明人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Marie Josephe Fabienne Gridelet
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L29/1004 , H01L29/66242
摘要： A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT.
摘要翻译：一种制造异质结双极晶体管的方法，包括提供包括由浅沟槽绝缘区域界定的有源区的衬底; 在衬底上沉积介电层和多晶硅层的堆叠; 在所述堆叠中形成基窗，所述基窗在所述有源区和所述浅沟槽绝缘区的一部分上延伸，所述基窗具有在所述有源区和所述浅沟绝缘区之间的垂直延伸的沟槽; 在基座窗内生长外延基底材料; 在基材的暴露的侧壁上形成间隔物; 并用发射体材料填充基座窗口。以这种方式制造的HBT和包括这种HBT的IC。

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