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1. 发明授权

US07287169B2 Electronic device and timer therefor with tamper event stamp features and related methods 有权
标题翻译：电子设备和定时器，具有篡改事件时间戳功能和相关方法
公开(公告)号：US07287169B2
公开(公告)日：2007-10-23
申请号：US10268871
申请日：2002-10-10
申请人： Tom Youssef
发明人： Tom Youssef
IPC分类号： G06F11/30
CPC分类号： G01R21/133 , G01R22/066
摘要： An electronic timer may include a clock reference signal generator and a real time clock (RTC) circuit for generating real time data based upon the clock reference signal. The RTC circuit may include a plurality of registers each for storing a respective bit of the real time data. Further, each register may include a master latch for initially storing the real time data bit, a slave latch for subsequently storing the real time data bit, and a user latch for storing the real time data bit from the slave latch. The RTC circuit may further include a controller for causing at least some of the registers to increment based upon the clock reference signal. Additionally, the electronic timer may also advantageously include a tamper circuit for receiving a tamper event signal and causing each of the user latches to hold a time stamp therein.
摘要翻译：电子计时器可以包括时钟参考信号发生器和用于基于时钟参考信号产生实时数据的实时时钟（RTC）电路。 RTC电路可以包括多个寄存器，每个寄存器用于存储实时数据的相应位。此外，每个寄存器可以包括用于初始存储实时数据位的主锁存器，用于随后存储实时数据位的从锁存器和用于从从锁存器存储实时数据位的用户锁存器。 RTC电路还可以包括用于使得至少一些寄存器基于时钟参考信号而增加的控制器。此外，电子计时器还可以有利地包括用于接收篡改事件信号的篡改电路，并使每个用户锁存器在其中保持时间戳。

2. 发明授权

US06365991B1 Method and structure for measurement of a multiple-power-source device during a test mode 有权
标题翻译：在测试模式下测量多电源设备的方法和结构
公开(公告)号：US06365991B1
公开(公告)日：2002-04-02
申请号：US09450108
申请日：1999-11-29
申请人： Tom Youssef , David Charles McClure
发明人： Tom Youssef , David Charles McClure
IPC分类号： H02J904
CPC分类号： G06F1/28 , G01R31/3004 , G06F1/263 , H02J9/00 , Y10T307/615 , Y10T307/625 , Y10T307/696 , Y10T307/724 , Y10T307/944
摘要： A test mode structure and method of a multi-power-source device provides for the device to remain in a test mode, during which current draw of the device may be accurately measured, even after primary power supply to the device has been greatly reduced or completely removed. Significant reduction or removal of the primary power supply while still remaining in the test mode is necessary to counter the presence of a variable current that would otherwise be normally generated by the multi-power-source device in the test mode; the presence of the variable current during the test mode, if not negated, will not permit an accurate measurement of the current draw of the multi-power-source device. Significant reduction or removal of the primary power supply to the device would typically cause the multi-power-source device to exit the test mode and switch to a secondary supply voltage supplied by the secondary power supply, thereby foiling any attempt to measure the current draw of the device. An external control signal provided to the device ensures that the test mode remains enabled, thereby inhibiting the device from exiting the test mode and switching to the secondary power supply in a normal operating mode.
摘要翻译：多功率源装置的测试模式结构和方法提供了设备保持在测试模式中，即使在设备的主要电力供应已被大大降低之后，也可准确地测量设备的电流消耗，完全删除在仍然保持在测试模式中时，主电源的显着减少或去除对于在测试模式中存在否则通常由多电源设备产生的可变电流是必要的; 在测试模式期间存在可变电流（如果不被否定）将不能准确地测量多电源装置的电流消耗。显着减少或移除设备的主电源通常将导致多电源设备退出测试模式并切换到次级电源提供的次级电源电压，从而防止任何测量电流消耗的尝试的设备。提供给设备的外部控制信号确保测试模式保持启用，从而禁止设备退出测试模式，并在正常操作模式下切换到次级电源。

3. 发明授权

US07844837B2 Electronic device and timer therefor with tamper event time stamp features and related methods 有权
标题翻译：电子设备和定时器，具有篡改事件时间戳功能和相关方法
公开(公告)号：US07844837B2
公开(公告)日：2010-11-30
申请号：US11854816
申请日：2007-09-13
申请人： Tom Youssef
发明人： Tom Youssef
IPC分类号： G06F11/30
CPC分类号： G01R21/133 , G01R22/066
摘要： An electronic timer may include a clock reference signal generator and a real time clock (RTC) circuit for generating real time data based upon the clock reference signal. The RTC circuit may include a plurality of registers each for storing a respective bit of the real time data. Further, each register may include a master latch for initially storing the real time data bit, a slave latch for subsequently storing the real time data bit, and a user latch for storing the real time data bit from the slave latch. The RTC circuit may further include a controller for causing at least some of the registers to increment based upon the clock reference signal. Additionally, the electronic timer may also advantageously include a tamper circuit for receiving a tamper event signal and causing each of the user latches to hold a time stamp therein.
摘要翻译：电子计时器可以包括时钟参考信号发生器和用于基于时钟参考信号产生实时数据的实时时钟（RTC）电路。 RTC电路可以包括多个寄存器，每个寄存器用于存储实时数据的相应位。此外，每个寄存器可以包括用于初始存储实时数据位的主锁存器，用于随后存储实时数据位的从锁存器和用于从从锁存器存储实时数据位的用户锁存器。 RTC电路还可以包括用于使得至少一些寄存器基于时钟参考信号而增加的控制器。此外，电子计时器还可以有利地包括用于接收篡改事件信号的篡改电路，并使每个用户锁存器在其中保持时间戳。

4. 发明授权

US06084390A Method and apparatus for increasing comparator gain without affecting standby current 有权
标题翻译：提高比较器增益而不影响待机电流的方法和装置
公开(公告)号：US06084390A
公开(公告)日：2000-07-04
申请号：US217323
申请日：1998-12-21
申请人： Tom Youssef
发明人： Tom Youssef
IPC分类号： G05F3/24 , H02J9/06 , G05F1/56 , H02J7/00
CPC分类号： H02J9/061 , G05F3/242 , Y10T307/625
摘要： A power supply switching circuit ensures stable, timely, and accurate transition between a primary power source and a secondary power source of an integrated circuit. A comparison element of the circuit compares a first voltage signal derived from a primary voltage of the primary power source to a second voltage signal, also derived from the primary voltage but having a different rate of change than the first voltage signal, to generate a compare output signal. The first and second voltage signals are characterized as being equal to each other when the primary voltage is equal to a predetermined crossover point at which the integrated circuit device will be powered by the primary voltage. When the primary voltage is less than the predetermined crossover point, a transistor element of a reference leg of a current mirror of the power supply switching circuit operates in back-bias mode and is sized large enough to ensure that the reference leg generates a large enough current to stabilize operation of the comparison element as the primary voltage ramps up until the primary voltage exceeds the predetermined crossover point.
摘要翻译：电源开关电路确保集成电路的主电源和次电源之间的稳定，及时且准确的转换。电路的比较元件将源自主电源的初级电压的第一电压信号与也从第一电压得到但具有与第一电压信号不同的变化率的第二电压信号进行比较，以产生比较输出信号。第一和第二电压信号的特征在于当初级电压等于集成电路器件将被初级电压供电的预定的交叉点时彼此相等。当初级电压小于预定的交叉点时，电源开关电路的电流镜的参考支路的晶体管元件以反偏压模式工作，并且其尺寸足够大以确保参考支脚产生足够大的当初级电压升高直到初级电压超过预定的交叉点时，比较元件的电流稳定稳定。

5. 发明申请

US20080001594A1 ELECTRONIC DEVICE AND TIMER THEREFOR WITH TAMPER EVENT TIME STAMP FEATURES AND RELATED METHODS 有权
标题翻译：电子设备和具有缓冲器的定时器事件时间戳功能和相关方法
公开(公告)号：US20080001594A1
公开(公告)日：2008-01-03
申请号：US11854816
申请日：2007-09-13
申请人： Tom Youssef
发明人： Tom Youssef
IPC分类号： G01R22/00
CPC分类号： G01R21/133 , G01R22/066
摘要： An electronic timer may include a clock reference signal generator and a real time clock (RTC) circuit for generating real time data based upon the clock reference signal. The RTC circuit may include a plurality of registers each for storing a respective bit of the real time data. Further, each register may include a master latch for initially storing the real time data bit, a slave latch for subsequently storing the real time data bit, and a user latch for storing the real time data bit from the slave latch. The RTC circuit may further include a controller for causing at least some of the registers to increment based upon the clock reference signal. Additionally, the electronic timer may also advantageously include a tamper circuit for receiving a tamper event signal and causing each of the user latches to hold a time stamp therein.
摘要翻译：电子计时器可以包括时钟参考信号发生器和用于基于时钟参考信号产生实时数据的实时时钟（RTC）电路。 RTC电路可以包括多个寄存器，每个寄存器用于存储实时数据的相应位。此外，每个寄存器可以包括用于初始存储实时数据位的主锁存器，用于随后存储实时数据位的从锁存器和用于从从锁存器存储实时数据位的用户锁存器。 RTC电路还可以包括用于使得至少一些寄存器基于时钟参考信号而增加的控制器。此外，电子计时器还可以有利地包括用于接收篡改事件信号的篡改电路，并使每个用户锁存器在其中保持时间戳。

6. 发明授权

US07142024B2 Power on reset circuit 有权
标题翻译：上电复位电路
公开(公告)号：US07142024B2
公开(公告)日：2006-11-28
申请号：US10978852
申请日：2004-11-01
申请人： Tom Youssef
发明人： Tom Youssef
IPC分类号： H03L7/00
CPC分类号： H03K3/356008 , H03K17/223
摘要： A power on reset circuit includes a pulse generation circuit that is connected to receive a supply voltage and respond to an initial ramp-up of that supply voltage to generate an output pulse that transitions from a low to a relatively high state tracking the supply voltage ramp-up. The pulse generation circuit further sets a feedback node in an enable state. Responsive to a flip signal received at an input node, the pulse generation circuit then transitions the output pulse from the relatively high state to the low state and sets the feedback node in a disable state. A static current control transistor switch includes a source-drain circuit coupled to the supply voltage and further includes a gate. The gate is connected to the feedback node such that the transistor switch is actuated in response to the feedback node enable state and unactuated in response to the feedback node disable state. A resistive divider circuit, including at least two resistors connected in series with each other at a tap, is connected in series with the source-drain circuit of the static current control transistor. The tap of the resistive divides circuit is connected to the input node of the pulse generation circuit to supply the flip signal.
摘要翻译：上电复位电路包括脉冲发生电路，其被连接以接收电源电压并且响应于该电源电压的初始斜坡上升以产生从低电平转变到跟踪电源电压斜坡的较高状态的输出脉冲 -向上。脉冲发生电路还将反馈节点设置为使能状态。响应于在输入节点处接收的翻转信号，脉冲发生电路然后将输出脉冲从相对高的状态转变到低状态，并将反馈节点设置为禁用状态。静态电流控制晶体管开关包括耦合到电源电压的源极 - 漏极电路，并且还包括栅极。门连接到反馈节点，使得晶体管开关响应于反馈节点使能状态被致动并且响应于反馈节点禁止状态而未被致动。电阻分压器电路包括至少两个在抽头上串联连接的电阻器，与静态电流控制晶体管的源极 - 漏极电路串联连接。电阻分压电路的抽头连接到脉冲发生电路的输入节点以提供翻转信号。

7. 发明授权

US07132767B2 Method and circuit for switchover between a primary and a secondary power source 有权
标题翻译：主电源和次电源之间切换的方法和电路
公开(公告)号：US07132767B2
公开(公告)日：2006-11-07
申请号：US10754023
申请日：2004-01-08
申请人： David C. McClure , Tom Youssef
发明人： David C. McClure , Tom Youssef
IPC分类号： H01H47/00
CPC分类号： G11C5/141 , Y10T307/615 , Y10T307/625 , Y10T307/826
摘要： An integrated circuit and method for providing a switchover from the primary power source to the secondary power source to prevent a volatile element from losing stored data. The integrated circuit includes a forced power source switchover circuit for detecting that the supply level of the primary power source drops below a predefined threshold level. A switchover circuit on the integrated circuit initiates a switchover operation based upon the forced power source switchover circuit detecting that the supply level being received from the primary power source drops below the predefined threshold level. The detection by the forced power source switchover circuitry may occur on a signal level that transitions faster than a predetermined negative rate of change. The integrated circuit may be incorporated in any system having volatile elements, such as memory or a clock.
摘要翻译：一种用于提供从主电源到次电源的切换以防止易失性元件丢失存储的数据的集成电路和方法。集成电路包括强制电源切换电路，用于检测主电源的电源电平低于预定阈值电平。集成电路中的切换电路基于强制电源切换电路检测到从主电源接收的电源电平下降到低于预定阈值水平的情况下开始切换操作。强制电源切换电路的检测可能发生在比预定的负变化率更快地转变的信号电平上。集成电路可以并入具有诸如存储器或时钟之类的易失性元件的任何系统中。

8. 发明授权

US06903584B2 Circuit and method for detecting the state of a switch 有权
标题翻译：用于检测开关状态的电路和方法
公开(公告)号：US06903584B2
公开(公告)日：2005-06-07
申请号：US10094165
申请日：2002-03-08
申请人： Rong Yin , Tom Youssef , David McClure
发明人： Rong Yin , Tom Youssef , David McClure
IPC分类号： H01H9/16 , H03L7/06 , H02B1/24
CPC分类号： H01H9/167 , H03K17/18 , Y10T307/74 , Y10T307/766
摘要： A circuit and method are disclosed for detecting activation of a switch, such as a mechanical switch. The circuit may include a first circuit for temporarily driving the second terminal of the switch to a second logic level. A second circuit, coupled to the switch, senses a voltage level of the second terminal of the switch and generates an output signal representative of the voltage sensed. A sequential logic circuit is responsive to the output signal of the second circuit so as to maintain a logic value representative of the switch having been closed.
摘要翻译：公开了用于检测诸如机械开关的开关的激活的电路和方法。电路可以包括用于将开关的第二端子临时驱动到第二逻辑电平的第一电路。耦合到开关的第二电路感测开关的第二端子的电压电平，并产生表示所感测的电压的输出信号。顺序逻辑电路响应于第二电路的输出信号，以便保持表示开关已经闭合的逻辑值。

9. 发明授权

US06717292B2 Method and structure for measurement of a multiple-power-source device during a test mode 有权
标题翻译：在测试模式下测量多电源设备的方法和结构
公开(公告)号：US06717292B2
公开(公告)日：2004-04-06
申请号：US10047847
申请日：2002-01-15
申请人： Tom Youssef , David Charles McClure
发明人： Tom Youssef , David Charles McClure
IPC分类号： H02J904
CPC分类号： G06F1/28 , G01R31/3004 , G06F1/263 , H02J9/00 , Y10T307/615 , Y10T307/625 , Y10T307/696 , Y10T307/724 , Y10T307/944
摘要： A test mode structure and method of a multi-power-source device provides for the device to remain in a test mode, during which current draw of the device may be accurately measured, even after primary power supply to the device has been greatly reduced or completely removed. Significant reduction or removal of the primary power supply while still remaining in the test mode is necessary to counter the presence of a variable current that would otherwise be normally generated by the multi-power-source device in the test mode; the presence of the variable current during the test mode, if not negated, will not permit an accurate measurement of the current draw of the multi-power-source device. Significant reduction or removal of the primary power supply to the device would typically cause the multi-power-source device to exit the test mode and switch to a secondary supply voltage supplied by the secondary power supply, thereby foiling any attempt to measure the current draw of the device. An external control signal provided to the device ensures that the test mode remains enabled, thereby inhibiting the device from exiting the test mode and switching to the secondary power supply in a normal operating mode.
摘要翻译：多功率源装置的测试模式结构和方法提供了设备保持在测试模式中，即使在设备的主要电力供应已被大大降低之后，也可准确地测量设备的电流消耗，完全删除在仍然保持在测试模式中时，主电源的显着减少或去除对于在测试模式中存在否则通常由多电源设备产生的可变电流是必要的; 在测试模式期间存在可变电流（如果不被否定）将不能准确地测量多电源装置的电流消耗。显着减少或移除设备的主电源通常将导致多电源设备退出测试模式并切换到次级电源提供的次级电源电压，从而防止任何测量电流消耗的尝试的设备。提供给设备的外部控制信号确保测试模式保持启用，从而禁止设备退出测试模式，并在正常操作模式下切换到次级电源。

10. 发明授权

US6075742A Integrated circuit for switching from power supply to battery, integrated latch lock, and associated method for same 失效
标题翻译：用于从电源切换到电池的集成电路，集成闩锁，以及相关的方法
公开(公告)号：US6075742A
公开(公告)日：2000-06-13
申请号：US2484
申请日：1997-12-31
申请人： Tom Youssef , David Charles McClure
发明人： Tom Youssef , David Charles McClure
IPC分类号： G11C5/14 , G11C7/00
CPC分类号： G11C5/143
摘要： An integrated circuit and associated method for switching from a power supply to a battery are provided. The integrated circuit preferably includes a memory circuit responsive to an external power supply and to a battery for storing data therein and a sleep mode latching circuit connected to the memory circuit for latching the memory circuit in a reduced power sleep mode condition so as to reduce power usage of a battery and a non-sleep mode operating condition so as to allow normal operation of the memory circuit by a power supply. The integrated circuit preferably also includes a sleep mode latch locking circuit connected to the sleep mode latching circuit and the memory circuit and responsive to a power supply for locking the sleep mode latching circuit in the non-sleep mode operating condition when power supplied from the power supply falls below a predetermined threshold so that the memory circuit is inhibited from inadvertently entering the reduced power sleep mode condition.
摘要翻译：提供了一种用于从电源切换到电池的集成电路和相关方法。集成电路优选地包括响应于外部电源的存储器电路和用于在其中存储数据的电池和连接到存储器电路的睡眠模式锁存电路，用于以降低的功率睡眠模式条件来锁存存储器电路，以便降低功率使用电池和非睡眠模式操作条件以允许通过电源正常操作存储器电路。集成电路优选地还包括连接到睡眠模式锁存电路和存储器电路的睡眠模式锁存锁定电路，并且响应于用于将睡眠模式锁定电路锁定在非睡眠模式操作条件下的电源，当从电力供应电力供给下降到预定阈值以下，使得禁止存储电路无意中进入降低功率睡眠模式状态。

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