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1. 发明授权

US08441340B2 Tag communication devices 有权
标题翻译：标记通信设备
公开(公告)号：US08441340B2
公开(公告)日：2013-05-14
申请号：US13047400
申请日：2011-03-14
申请人： Franz Amtmann , Thomas Wille , Hauke Meyn , Mathias Wagner
发明人： Franz Amtmann , Thomas Wille , Hauke Meyn , Mathias Wagner
IPC分类号： H04Q5/22
CPC分类号： G06K7/0008
摘要： A contactless tag reader device comprises upper and lower electrodes which together define a tag location zone between them in which multiple tags can be placed. The lower electrode and the upper electrode are offset from each other such that they substantially do not overlap. This structure is used to sandwich tags vertically between two horizontally (laterally) offset reader electrodes. This enables power coupling and data transfer using capacitive coupling.
摘要翻译：非接触式标签读取器装置包括上部和下部电极，它们一起在它们之间限定可放置多个标签的标签位置区域。下电极和上电极彼此偏移，使得它们基本上不重叠。这种结构用于在两个水平（横向）偏移读取器电极之间垂直夹置标签。这使得能够使用电容耦合进行功率耦合和数据传输。

2. 发明授权

US07500112B1 Cryptographic device and methods for defeating physical analysis 有权
标题翻译：加密设备和打败物理分析的方法
公开(公告)号：US07500112B1
公开(公告)日：2009-03-03
申请号：US09749142
申请日：2000-12-27
申请人： Thomas Wille , Wolfgang Hass
发明人： Thomas Wille , Wolfgang Hass
IPC分类号： G06F21/00
CPC分类号： G07F7/1008 , G06F21/72 , G06F21/75 , G06F21/755 , G06F21/77 , G06F2207/7219 , G06Q20/341 , G07F7/082 , H04L9/003 , H04L9/0625 , H04L2209/08 , H04L2209/125
摘要： The present invention relates to a data-processing device, particularly a chip card or smart card, and to a method of operating said device, with an integrated circuit comprising a central processing unit (CPU) (10) and one or more co-processors (12). The integrated circuit comprises a control unit (18, 30) which controls the processors, CPU (10) and co-processors (12) in such a way that, in the case of a cryptographic operation, at least two processors perform a cryptographic operation simultaneously and in parallel.
摘要翻译：本发明涉及一种数据处理设备，特别是芯片卡或智能卡，以及一种操作所述设备的方法，集成电路包括中央处理单元（CPU）（10）和一个或多个协处理器（12）。集成电路包括控制单元（18,30），其以这样的方式控制处理器CPU（10）和协处理器（12），使得在密码操作的情况下，至少两个处理器执行密码操作同时并行。

3. 发明授权

US5834959A Circuit arrangement for generating a binary output signal 失效
标题翻译：用于产生二进制输出信号的电路装置
公开(公告)号：US5834959A
公开(公告)日：1998-11-10
申请号：US709503
申请日：1996-09-06
申请人： Siegfried Ritter , Thomas Wille , Rolf Tammer
发明人： Siegfried Ritter , Thomas Wille , Rolf Tammer
IPC分类号： H04L25/40 , G06K7/00 , H03K5/1252 , H04L7/02 , H03K5/151
CPC分类号： H03K5/1252 , G06K7/0008
摘要： In order to generate a non-disturbed binary output signal from a disturbed input signal, notably if the latter is periodic in the non-disturbed state, the invention proposes a circuit arrangement which includes two circuit branches which respond to different edge directions of the input signal. Each branch includes two series-connected flipflops and there is also provided a timing member which is common to the two circuit branches. As a result of a coupling of the two circuit branches to one another it is achieved that, after the triggering of one circuit branch, the other branch is blocked. Triggering of the other circuit branch is possible only after the delay time of the timing member has elapsed. It is thus achieved that the edges of the binary output signal have a minimum temporal spacing or that the binary output signal does not exceed a maximum frequency. Furthermore, a transition of the input signal is evaluated also if it occurs prior to the elapsing of the delay time. Evaluation of the signals in both circuit branches enables formation of two non-overlapping output signals.
摘要翻译：为了从干扰的输入信号产生未干扰的二进制输出信号，特别是如果后者在非干扰状态下是周期性的，本发明提出一种电路装置，其包括响应输入的不同边缘方向的两个电路分支信号。每个分支包括两个串联连接的触发器，并且还提供了两个电路分支通用的定时部件。作为两个电路分支彼此耦合的结果，实现了在一个电路分支的触发之后，另一个分支被阻止。只有在定时构件的延迟时间过去之后才可能触发另一个电路支路。因此实现二进制输出信号的边缘具有最小时间间隔或二进制输出信号不超过最大频率。此外，如果在延迟时间过去之前发生输入信号的转换，则也进行评估。对两个电路分支中的信号进行评估可以形成两个不重叠的输出信号。

4. 发明授权

US08899486B2 Data carrier with a chip and a plurality of sensors 有权
标题翻译：具有芯片和多个传感器的数据载体
公开(公告)号：US08899486B2
公开(公告)日：2014-12-02
申请号：US11721433
申请日：2005-12-06
申请人： Manfred Paeschke , Kim Nguyen , Oliver Muth , Michael Knebel , Mathias Wagner , Thomas Wille
发明人： Manfred Paeschke , Kim Nguyen , Oliver Muth , Michael Knebel , Mathias Wagner , Thomas Wille
IPC分类号： G06K19/07 , G06K19/073 , G06K19/077 , G06K7/10 , H01L31/0232 , G06K19/14 , H01L31/0216
CPC分类号： G06K19/07749 , G06K7/1097 , G06K19/0716 , G06K19/0723 , G06K19/0728 , G06K19/073 , G06K19/07345 , G06K19/077 , G06K19/145 , H01L31/02162 , H01L31/02322
摘要： The invention relates to a data carrier (100) with a chip (10) which stores energy (13) as well as information for contact-bound or contactless inductive communication, and with a plurality of excitable chip sensors (11) integrated in the chip (10), which, after excitation (12), pass on a signal (18) to a CPU (19) of the chip (10), in which the signal (18) is processed. The invention is characterized in that, independently of storing energy (13) as well as information by the chip (10), the excitation (12) is specifically adjustable by the chip (10) for the purpose of additionally storing information and is adaptable to the requirements of processing the signal (18) in the CPU (19).
摘要翻译：本发明涉及一种具有芯片（10）的数据载体（100），其存储能量（13）以及用于接触界限或非接触感应通信的信息，以及集成在芯片中的多个可激励的芯片传感器（11）（10），其在激励（12）之后将信号（18）传递到其中对信号（18）进行处理的芯片（10）的CPU（19）。本发明的特征在于，独立于存储能量（13）以及芯片（10）的信息，激励（12）可以由芯片（10）特别地调整，以便另外存储信息，并且适用于处理CPU（19）中的信号（18）的要求。

5. 发明申请

US20100319836A1 POLYMER PROSTHESIS 有权
标题翻译：聚合物预处理
公开(公告)号：US20100319836A1
公开(公告)日：2010-12-23
申请号：US12064233
申请日：2006-08-21
申请人： Thiemo Blank , Thomas Wille
发明人： Thiemo Blank , Thomas Wille
IPC分类号： B29D23/00 , A61F2/82
CPC分类号： A61F2/89 , A61F2002/072 , A61F2002/825 , A61F2002/828 , A61F2220/005 , A61F2220/0058 , A61F2250/0018
摘要： A polymer prosthesis with lumen and an axial length and having in a pre-delivery condition a plurality of relatively stiff stenting segments spaced from each other along the length of the prosthesis, the spaces between the relatively stiff stenting segments of a first polymer being bridged by relatively flexible linking segments of a second polymer, different from the first, the relatively stiff stenting segments and the relatively flexible linking segments being alternately arranged along the length of the prosthesis.
摘要翻译：一种具有内腔和轴向长度的聚合物假体，并且在预交付状态下具有沿假体长度彼此间隔开的多个相对较硬的支架构件段，第一聚合物的较硬的支架段之间的空间由不同于第一聚合物的相对柔性的连接段，相对较硬的支架段和相对柔性的连接段沿假体的长度交替排列。

6. 发明授权

US06188571B1 High density RAID subsystem with highly integrated controller 失效
标题翻译：高度集成控制器的高密度RAID子系统
公开(公告)号：US06188571B1
公开(公告)日：2001-02-13
申请号：US08963841
申请日：1997-11-03
申请人： Adriano Roganti , Thomas Wille , Ronald Bruce Smith , Jose Platon Basco
发明人： Adriano Roganti , Thomas Wille , Ronald Bruce Smith , Jose Platon Basco
IPC分类号： G06F116
CPC分类号： G06F1/184 , G06F1/187
摘要： The present invention provides a method and apparatus for a mass storage subsystem such as a RAID array. The invention includes a housing which defines first and second cavities with the first cavity housing an array controller such as a RAID controller. The second cavity houses a plurality of substantially conventional IDE drives conforming to the 3.5″ form factor. The array is configured to maximize cooling of the array controller and the drives within the extremely small space defined by the housing.
摘要翻译：本发明提供了一种用于诸如RAID阵列的大容量存储子系统的方法和装置。本发明包括限定第一和第二空腔的壳体，其中第一空腔容纳诸如RAID控制器的阵列控制器。第二腔容纳符合3.5“形状因子的多个基本上常规的IDE驱动器。该阵列被配置为使阵列控制器和驱动器在由壳体限定的极小空间内最大限度地冷却。

7. 发明授权

US5938744A Method for managing multiple DMA queues by a single controller 失效
标题翻译：用于通过单个控制器管理多个DMA队列的方法
公开(公告)号：US5938744A
公开(公告)日：1999-08-17
申请号：US964229
申请日：1997-11-04
申请人： Adriano Roganti , Thomas Wille , Ronald Bruce Smith , Jose Platon Basco
发明人： Adriano Roganti , Thomas Wille , Ronald Bruce Smith , Jose Platon Basco
IPC分类号： G06F3/06 , G06F13/00 , G06F13/28
CPC分类号： G06F13/28 , G06F2003/0692 , G06F3/0601
摘要： The present invention provides a method and apparatus whereby a single engine can manage multiple DMA queues and related functions for a mass storage subsystem such as a RAID array. By operating the engine at a suitably high clock rate, the key buses may be time multiplexed such that each bus operates at substantially its optimum frequency to maintain high efficiency of data throughput. To improve performance further, the DMA addressing function is allocated additional phases whenever the remaining buses have not requested access to the RAID engine.
摘要翻译：本发明提供了一种方法和装置，其中单个引擎可以管理诸如RAID阵列之类的大容量存储子系统的多个DMA队列和相关功能。通过以适当的高时钟速率操作发动机，可以对密钥总线进行时间复用，使得每个总线基本上以其最佳频率运行，以保持数据吞吐量的高效率。为了进一步提高性能，只要剩余的总线没有请求访问RAID引擎，DMA寻址功能就被分配给其他阶段。

8. 发明申请

US20090294535A1 DATA CARRIER WITH A CHIP AND A PLURALITY OF SENSORS 有权
标题翻译：数据载体与芯片和传感器的多样性
公开(公告)号：US20090294535A1
公开(公告)日：2009-12-03
申请号：US11721433
申请日：2005-12-06
申请人： Manfred Paeschke , Kim Nguyen , Oliver Muth , Michael Knebel , Matthias Wagner , Thomas Wille
发明人： Manfred Paeschke , Kim Nguyen , Oliver Muth , Michael Knebel , Matthias Wagner , Thomas Wille
IPC分类号： G06K7/00 , G06K19/06
CPC分类号： G06K19/07749 , G06K7/1097 , G06K19/0716 , G06K19/0723 , G06K19/0728 , G06K19/073 , G06K19/07345 , G06K19/077 , G06K19/145 , H01L31/02162 , H01L31/02322
摘要： The invention relates to a data carrier (100) with a chip (10) which stores energy (13) as well as information for contact-bound or contactless inductive communication, and with a plurality of excitable chip sensors (11) integrated in the chip (10), which, after excitation (12), pass on a signal (18) to a CPU (19) of the chip (10), in which the signal (18) is processed. The invention is characterized in that, independently of storing energy (13) as well as information by the chip (10), the excitation (12) is specifically adjustable by the chip (10) for the purpose of additionally storing information and is adaptable to the requirements of processing the signal (18) in the CPU (19).
摘要翻译：本发明涉及一种具有芯片（10）的数据载体（100），其存储能量（13）以及用于接触界限或非接触感应通信的信息，以及集成在芯片中的多个可激励的芯片传感器（11）（10），其在激励（12）之后将信号（18）传递到其中对信号（18）进行处理的芯片（10）的CPU（19）。本发明的特征在于，独立于存储能量（13）以及芯片（10）的信息，激励（12）可以由芯片（10）特别地调整，以便另外存储信息，并且适用于处理CPU（19）中的信号（18）的要求。

9. 发明授权

US06334206B1 Forgery prevention microcontroller circuit 有权
标题翻译：防伪微控制器电路
公开(公告)号：US06334206B1
公开(公告)日：2001-12-25
申请号：US09265778
申请日：1999-03-10
申请人： Thomas Wille
发明人： Thomas Wille
IPC分类号： G06F1570
CPC分类号： H01L27/0203 , G06F12/1425 , G06F21/75 , G06F2207/7219
摘要： The invention relates to a microcontroller circuit, comprising circuit elements arranged on a semiconductor body. In order to make a tentative forgery of such a microcontroller circuit at least more difficult, at least a number of the co-operating circuit elements is provided on the semiconductor body in an irregularly scrambled spatial configuration.
摘要翻译：本发明涉及一种微控制器电路，其包括设置在半导体本体上的电路元件。为了使这种微控制器电路的暂时伪造至少更加困难，至少多个协作电路元件以不规则加扰的空间配置提供在半导体主体上。

10. 发明授权

US08672995B2 Polymer prosthesis 有权
标题翻译：聚合物假体
公开(公告)号：US08672995B2
公开(公告)日：2014-03-18
申请号：US12064233
申请日：2006-08-21
申请人： Thiemo Blank , Thomas Wille
发明人： Thiemo Blank , Thomas Wille
IPC分类号： A61F2/82
CPC分类号： A61F2/89 , A61F2002/072 , A61F2002/825 , A61F2002/828 , A61F2220/005 , A61F2220/0058 , A61F2250/0018
摘要： A polymer prosthesis with lumen and an axial length and having in a pre-delivery condition a plurality of relatively stiff stenting segments spaced from each other along the length of the prosthesis, the spaces between the relatively stiff stenting segments of a first polymer being bridged by relatively flexible linking segments of a second polymer, different from the first, the relatively stiff stenting segments and the relatively flexible linking segments being alternately arranged along the length of the prosthesis.
摘要翻译：一种具有内腔和轴向长度的聚合物假体，并且在预交付状态下具有沿假体长度彼此间隔开的多个相对较硬的支架构件段，第一聚合物的较硬的支架段之间的空间由不同于第一聚合物的相对柔性的连接段，相对较硬的支架段和相对柔性的连接段沿假体的长度交替排列。

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