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1. 发明授权

US5495578A Apparatus and method for changing the behavior of a computer program while retaining control of program execution 失效
标题翻译：用于改变计算机程序的行为同时保持对程序执行的控制的装置和方法
公开(公告)号：US5495578A
公开(公告)日：1996-02-27
申请号：US390949
申请日：1995-02-21
申请人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
发明人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
IPC分类号： G01R31/319 , G06F11/00
CPC分类号： G01R31/31912 , G06F2201/865
摘要： A system comprises a flag interface module, a flag query having a selectable value based on a user authorization level, a query communicator, and a flag value communicator for communicating a new flag value from the flag interface module to a test program in response to the query communicator that enables a user to modify an execution sequence [e.g., modifying the flow] of the test program executing on a computer controlling a testing system. The execution sequence of the test program is modified only if the user has a proper authorization level. The execution sequence is modified by an authorized user without requiring the test program to be recompiled.
摘要翻译：系统包括标志接口模块，具有基于用户授权级别的可选择的标志查询，查询通信器和标志值通信器，用于响应于所述标志接口模块向标志接口模块传送新的标志值到测试程序查询通信器，其使用户能够修改在控制测试系统的计算机上执行的测试程序的执行顺序[例如，修改流程]。仅当用户具有适当的授权级别时，才会修改测试程序的执行顺序。执行顺序由授权用户修改，而不需要重新编译测试程序。

2. 发明授权

US5400263A Apparatus and method for specifying the flow of test execution and the binning for a testing system 失效
标题翻译：用于指定测试执行流程和测试系统的合并的装置和方法
公开(公告)号：US5400263A
公开(公告)日：1995-03-21
申请号：US863252
申请日：1992-04-06
申请人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
发明人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
IPC分类号： G01R31/319 , G06F11/32 , G06F15/00
CPC分类号： G01R31/31912 , G01R31/31903 , G06F11/32 , G06F2201/865
摘要： The present invention is a method for specifying test flow and binning of an integrated circuit part in an integrated circuit tester. The method comprises the steps of receiving descriptions of the tests, receiving test flow statements indicating when the tests are to be executed, receiving binning statements, executing the tests as indicated by the test flow statements, and binning the IC device as indicated by the results of the tests.
摘要翻译：本发明是用于规定集成电路测试器中的集成电路部件的测试流程和合并的方法。该方法包括以下步骤：接收测试的描述，接收测试流程语句，指示测试何时执行，接收合并语句，执行测试流程语句所示的测试，并按照结果指示对IC设备进行合并的测试。

3. 发明授权

US5381344A Apparatus and method for obtaining a list of numbers of wafers for integrated circuit testing 失效
标题翻译：用于获得用于集成电路测试的晶片数目的列表的装置和方法
公开(公告)号：US5381344A
公开(公告)日：1995-01-10
申请号：US863257
申请日：1992-04-06
申请人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes P. Gil , Robert W. Proulx
发明人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes P. Gil , Robert W. Proulx
IPC分类号： G01R31/28 , G01R31/3185 , H01L21/66 , H01L23/544 , G06F15/46
CPC分类号： H01L22/20 , G01R31/2834 , G01R31/318516 , H01L23/544 , H01L2924/0002
摘要： The invention is a method for enabling a user to enter wafer numbers into a computer-based integrated circuit production test system. The method comprises the steps of: (a) prompting the user for the wafer numbers; (b) displaying the wafer numbers in a graphical representation of a wafer cassette; (c) enabling the user to edit the wafer numbers on the graphical representation; and (d) transmitting the wafer numbers to the computer-based IC production test system.
摘要翻译：本发明是一种使用户能够将晶片数进入基于计算机的集成电路生产测试系统的方法。该方法包括以下步骤：（a）提示用户晶片数; （b）以晶片盒的图示方式显示晶片号码; （c）使用户能够在图形表示上编辑晶片号码; 和（d）将晶片号码发送到基于计算机的IC生产测试系统。

4. 发明授权

US5390131A Apparatus and method for displaying wafer test results in real time 失效
标题翻译：用于实时显示晶片测试结果的装置和方法
公开(公告)号：US5390131A
公开(公告)日：1995-02-14
申请号：US863253
申请日：1992-04-06
申请人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
发明人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
IPC分类号： G01R31/319 , G06F11/32 , G06F11/00
CPC分类号： G01R31/31912 , G06F11/321
摘要： The invention is a method for displaying wafer test results from an integrated circuit tester in real time. The method comprising the steps of: (a) receiving wafer dimensions and die dimensions from a wafer handler; (b) creating a template representative of a wafer having cells representative of a die from the wafer dimensions and the die dimensions; (c) displaying the template; (d) invoking a tester to test a selected die of a selected wafer; (e) receiving test results from the tester; (f) displaying the test results on a selected cell which corresponds to the selected die; and (g) repeating steps (d)-(f) as required.
摘要翻译：本发明是用于从集成电路测试仪实时显示晶片测试结果的方法。该方法包括以下步骤：（a）从晶片处理器接收晶片尺寸和模具尺寸; （b）从晶片尺寸和模具尺寸创建代表晶片的模板代表模具的模板; （c）显示模板; （d）调用测试器来测试所选晶片的所选芯片; （e）从测试人员接收测试结果; （f）将测试结果显示在与所选择的模具对应的所选单元上; 和（g）根据需要重复步骤（d） - （f）。

5. 发明授权

US5943297A Calendar clock circuit for computer workstations 失效
标题翻译：计算机工作站的日历时钟电路
公开(公告)号：US5943297A
公开(公告)日：1999-08-24
申请号：US850123
申请日：1997-05-01
申请人： Thomas H. Baker
发明人： Thomas H. Baker
IPC分类号： G04G3/00 , G06F1/14 , G04B47/00 , G04F5/00 , G06F15/02
CPC分类号： G04G3/00 , G06F1/14
摘要： A computer date and time clock including an incrementing binary 32 bit register, used to main elapsed date and time in seconds, and an external 1 Hz clock signal, provided by an oscillator, that increments the register. The oscillator and register are both powered by a battery, to make them independent of computer system power. On computer systems having a 32 bit bus, the register can be read or written with a single I/O cycle on the system bus. Operating system software typically performs time calculations using elapsed seconds since a fixed date and time, thus the register count can represent a number of seconds since the fixed date and time. The 1 Hz clock signal is derived from a higher frequency oscillator using a divider circuit, and a reset circuit within the date and time clock clears the divider circuit each time data is stored in the register.
摘要翻译：计算机日期和时间时钟，包括用于主要经过的日期和时间（以秒为单位）的递增二进制32位寄存器和由振荡器提供的外部1Hz时钟信号，其增加寄存器。振荡器和寄存器均由电池供电，使其独立于计算机系统电源。在具有32位总线的计算机系统上，可以通过系统总线上的单个I / O周期来读取或写入寄存器。操作系统软件通常使用从固定的日期和时间开始的经过秒数来执行时间计算，因此寄存器计数可以表示自固定日期和时间以来的秒数。 1Hz时钟信号是由使用分频电路的较高频率的振荡器导出的，并且日期和时间时钟内的复位电路每当数据存储在寄存器中时都清除分频电路。

6. 发明授权

US06832824B1 Color-calibration sensor system for incremental printing 有权
标题翻译：用于增量打印的色彩校准传感器系统
公开(公告)号：US06832824B1
公开(公告)日：2004-12-21
申请号：US09183819
申请日：1998-10-30
申请人： Thomas H. Baker , Nathan M. Moroney , Josep Miguel Canal
发明人： Thomas H. Baker , Nathan M. Moroney , Josep Miguel Canal
IPC分类号： B41J2938
CPC分类号： B41J29/393 , B41J2/2135
摘要： In one form of the invention, one sensor determines mutual alignment of pens; a second sensor measures color of dots formed on a print medium by the pens. Another form has two carriages—one moving pens to mark on a medium and the second used to refine quality of images produced. In a third form, a sensor measures color of test patterns by one or more pens; a hood—generally around the sensor laterally relative to a sensing direction—excludes ambient light from the sensor during measuring; a mechanism advances the hood along the sensing direction toward the patterns. In a fourth form, a pen ejects multiple liquid-ink drops onto a medium, and a sensor infrequently measures color of resulting dots—only when the pen is not forming images. In addition to these four forms of the invention, three others are detailed in the text.
摘要翻译：在本发明的一种形式中，一个传感器确定笔的相互对准; 第二传感器测量由笔形成在打印介质上的点的颜色。另一种形式有两个托架 - 一个移动笔在一个介质上标记，另一个用于提炼所产生图像的质量。在第三种形式中，传感器通过一个或多个笔测量测试图案的颜色; 通常围绕传感器相对于感测方向横向传感的罩 - 在测量期间排除来自传感器的环境光; 机构沿传感方向使罩沿着图案移动。在第四种形式中，笔将多个液体墨滴喷射到介质上，并且传感器不经常地测量所得到的点的颜色，只有当笔不形成图像时。除了这四种形式的本发明之外，其他三种在本文中是详细的。

7. 发明授权

US06234689B1 Apparatus and method for mapping a custom routine to an interface button 失效
标题翻译：将定制例程映射到界面按钮的装置和方法
公开(公告)号：US06234689B1
公开(公告)日：2001-05-22
申请号：US08557869
申请日：1995-11-14
申请人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
发明人： John G. Rohrbaugh , Thomas H. Baker , Michael J. Bennett , Mercedes E. Gil , Robert W. Proulx
IPC分类号： G06F944
CPC分类号： G06F9/451
摘要： The present invention is a method for accessing a user defined custom routine through a graphical interface of an application program. The method comprises the steps of: (a) linking the user defined custom routine to the application program; (b) displaying a means for accessing the user defined custom routine on a graphical interface; and (c) transferring control to the user defined custom routine when a user activates the means.
摘要翻译：本发明是一种通过应用程序的图形界面访问用户定义的定制例程的方法。该方法包括以下步骤：（a）将用户定义的定制例程链接到应用程序; （b）显示用于在图形界面上访问用户定义的定制例程的装置; 和（c）当用户激活装置时，将控制转移到用户定义的定制例程。

8. 发明授权

US5586123A Interface and loopback circuit for character based computer peripheral devices 失效
标题翻译：基于字符的计算机外围设备的接口和回送电路
公开(公告)号：US5586123A
公开(公告)日：1996-12-17
申请号：US317440
申请日：1994-10-04
申请人： Thomas H. Baker
发明人： Thomas H. Baker
IPC分类号： G06F3/023 , G06F11/267 , G06F11/00
CPC分类号： G06F11/2221 , G06F3/023
摘要： An interface circuit for keyboards and other serial peripheral devices that adds loopback capability through multiplexers in the clock and data lines, and also provides a receiver clock delayed from the transmitter clock to avoid race conditions between the data and clock lines. The circuit also provides a means of forcing a zero bit onto the data line after a byte is sent, to indicate to the transmitter that the byte was received by the receiver. The circuit also provides a way to hold off the transmitter, to simulate the normal keyboard action of holding off transmitter while it processes the character just sent.
摘要翻译：用于键盘和其他串行外围设备的接口电路，通过时钟和数据线中的多路复用器增加了环回能力，并且还提供从发射机时钟延迟的接收机时钟，以避免数据和时钟线之间的竞争条件。该电路还提供了在发送字节之后将零位强制到数据线上的装置，以向发送器指示接收器接收到该字节。该电路还提供了一种阻止发射机的方法，以模拟正在发射的字符串的正常键盘动作。

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