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1. 发明授权

US08200897B2 Storage system and data management method 有权
标题翻译：存储系统和数据管理方法
公开(公告)号：US08200897B2
公开(公告)日：2012-06-12
申请号：US13179403
申请日：2011-07-08
申请人： Tatsuya Ninomiya , Kazuo Tanaka
发明人： Tatsuya Ninomiya , Kazuo Tanaka
IPC分类号： G06F12/08
CPC分类号： G06F12/0868 , G06F12/0811 , G06F2212/284
摘要： The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.
摘要翻译：本发明包括向外部设备发送/接收数据的CHA 110，从HDD单元200发送/接收数据的DKA140，具有主高速缓存存储器124的主高速缓存单元120，辅助缓存单元120 高速缓存单元130安装在主缓存单元120和DKA 140之间，并且具有二级高速缓存存储器134，存储由CHA 110接收的写目标数据在一级高速缓冲存储器124中的CCP 121和存储在二次高速缓存存储器134中的写入目标数据，并将存储在二次高速缓冲存储器134中的写入目标数据传送到DKA 140。

2. 发明申请

US20120200763A1 DRIVING CIRCUIT AND METHOD FOR VOICE COIL MOTOR WITH SPRING RETURN 有权
标题翻译：具有回波功能的语音线圈电机的驱动电路和方法
公开(公告)号：US20120200763A1
公开(公告)日：2012-08-09
申请号：US13206665
申请日：2011-08-10
申请人： Tatsuya NINOMIYA
发明人： Tatsuya NINOMIYA
IPC分类号： H04N5/232 , G02B7/09 , H02K41/035
CPC分类号： H02P25/028 , H02P25/034
摘要： A driving circuit drives a voice coil motor having a spring return mechanism. A driving current generating unit supplies, to a coil of the voice coil motor, a driving current that corresponds to an analog control signal. Waveform memory stores digital waveform data which indicates the time waveform of a driving current to be supplied to the voice coil motor. A predetermined frequency component is removed from the frequency components of the waveform data. A control unit reads out the waveform data from the waveform memory at a rate that corresponds to the resonance frequency of the voice coil motor, and outputs the waveform data thus read out as a digital code. A D/A converter converts a digital code into an analog control signal, and outputs the analog control signal to the driving current generating unit.
摘要翻译：驱动电路驱动具有弹簧复位机构的音圈电机。驱动电流产生单元向音圈电动机的线圈提供对应于模拟控制信号的驱动电流。波形存储器存储指示要提供给音圈电机的驱动电流的时间波形的数字波形数据。从波形数据的频率分量中去除预定的频率分量。控制单元以对应于音圈马达的共振频率的速度从波形存储器中读出波形数据，并输出这样读出的波形数据作为数字代码。 D / A转换器将数字代码转换为模拟控制信号，并将模拟控制信号输出到驱动电流产生单元。

3. 发明授权

US08006036B2 Storage system and data management method 有权
标题翻译：存储系统和数据管理方法
公开(公告)号：US08006036B2
公开(公告)日：2011-08-23
申请号：US12019026
申请日：2008-01-24
申请人： Tatsuya Ninomiya , Kazuo Tanaka
发明人： Tatsuya Ninomiya , Kazuo Tanaka
IPC分类号： G06F12/08
CPC分类号： G06F12/0868 , G06F12/0811 , G06F2212/284
摘要： The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.
摘要翻译：本发明包括向外部设备发送/接收数据的CHA 110，从HDD单元200发送/接收数据的DKA140，具有主高速缓存存储器124的主高速缓存单元120，辅助缓存单元120 高速缓存单元130安装在主缓存单元120和DKA 140之间，并且具有二级高速缓存存储器134，存储由CHA 110接收的写目标数据在一级高速缓冲存储器124中的CCP 121和存储在二次高速缓存存储器134中的写入目标数据，并将存储在二次高速缓冲存储器134中的写入目标数据传送到DKA 140。

4. 发明授权

US08896746B2 Driving circuit and method for voice coil motor with spring return 有权
标题翻译：具有弹簧复位功能的音圈电机的驱动电路及方法
公开(公告)号：US08896746B2
公开(公告)日：2014-11-25
申请号：US13206665
申请日：2011-08-10
申请人： Tatsuya Ninomiya
发明人： Tatsuya Ninomiya
IPC分类号： H04N5/232 , H02P25/02
CPC分类号： H02P25/028 , H02P25/034
摘要： A driving circuit drives a voice coil motor having a spring return mechanism. A driving current generating unit supplies, to a coil of the voice coil motor, a driving current that corresponds to an analog control signal. Waveform memory stores digital waveform data which indicates the time waveform of a driving current to be supplied to the voice coil motor. A predetermined frequency component is removed from the frequency components of the waveform data. A control unit reads out the waveform data from the waveform memory at a rate that corresponds to the resonance frequency of the voice coil motor, and outputs the waveform data thus read out as a digital code. A D/A converter converts a digital code into an analog control signal, and outputs the analog control signal to the driving current generating unit.
摘要翻译：驱动电路驱动具有弹簧复位机构的音圈电机。驱动电流产生单元向音圈电动机的线圈提供对应于模拟控制信号的驱动电流。波形存储器存储指示要提供给音圈电机的驱动电流的时间波形的数字波形数据。从波形数据的频率分量中去除预定的频率分量。控制单元以与音圈马达的共振频率相对应的速度从波形存储器读出波形数据，并输出这样读出的波形数据作为数字代码。 D / A转换器将数字代码转换为模拟控制信号，并将模拟控制信号输出到驱动电流产生单元。

5. 发明申请

US20080222359A1 STORAGE SYSTEM AND DATA MANAGEMENT METHOD 有权
标题翻译：存储系统和数据管理方法
公开(公告)号：US20080222359A1
公开(公告)日：2008-09-11
申请号：US12019026
申请日：2008-01-24
申请人： Tatsuya NINOMIYA , Kazuo TANAKA
发明人： Tatsuya NINOMIYA , Kazuo TANAKA
IPC分类号： G06F12/08 , G06F9/312 , G06F11/14
CPC分类号： G06F12/0868 , G06F12/0811 , G06F2212/284
摘要： The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.
摘要翻译：本发明包括向外部设备发送/接收数据的CHA 110，从HDD单元200发送/接收数据的DKA140，具有主高速缓存存储器124的主高速缓存单元120，辅助缓存单元120 高速缓存单元130安装在主缓存单元120和DKA 140之间，并且具有二级高速缓存存储器134，存储由CHA 110接收的写目标数据在一级高速缓冲存储器124中的CCP 121和存储在二次高速缓存存储器134中的写入目标数据，并将存储在二次高速缓冲存储器134中的写入目标数据传送到DKA 140。

6. 发明申请

US20120233398A1 STORAGE SYSTEM AND DATA MANAGEMENT METHOD 审中-公开
标题翻译：存储系统和数据管理方法
公开(公告)号：US20120233398A1
公开(公告)日：2012-09-13
申请号：US13480034
申请日：2012-05-24
申请人： Tatsuya NINOMIYA , Kazuo TANAKA
发明人： Tatsuya NINOMIYA , Kazuo TANAKA
IPC分类号： G06F12/08
CPC分类号： G06F12/0868 , G06F12/0811 , G06F2212/284
摘要： The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.
摘要翻译：本发明包括向外部设备发送/接收数据的CHA 110，从HDD单元200发送/接收数据的DKA140，具有主高速缓存存储器124的主高速缓存单元120，辅助缓存单元120 高速缓存单元130安装在主缓存单元120和DKA 140之间，并且具有二级高速缓存存储器134，存储由CHA 110接收的写目标数据在一级高速缓冲存储器124中的CCP 121和存储在二次高速缓存存储器134中的写入目标数据，并将存储在二次高速缓冲存储器134中的写入目标数据传送到DKA 140。

7. 发明申请

US20110271066A1 STORAGE SYSTEM AND DATA MANAGEMENT METHOD 有权
标题翻译：存储系统和数据管理方法
公开(公告)号：US20110271066A1
公开(公告)日：2011-11-03
申请号：US13179403
申请日：2011-07-08
申请人： Tatsuya NINOMIYA , Kazuo Tanaka
发明人： Tatsuya NINOMIYA , Kazuo Tanaka
IPC分类号： G06F12/00
CPC分类号： G06F12/0868 , G06F12/0811 , G06F2212/284
摘要： The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit 120 and the DKA 140 and has a secondary cache memory 134, a CCP 121 which stores write target data received by the CHA 110 in the primary cache memory 124, and a CCP 131 which stores the write target data in the secondary cache memory 134, and transfers the write target data stored in the secondary cache memory 134 to the DKA 140.
摘要翻译：本发明包括向外部设备发送/接收数据的CHA 110，从HDD单元200发送/接收数据的DKA140，具有主高速缓存存储器124的主高速缓存单元120，辅助缓存单元120 高速缓存单元130安装在主缓存单元120和DKA 140之间，并且具有二级高速缓存存储器134，存储由CHA 110接收的写目标数据在一级高速缓冲存储器124中的CCP 121和存储在二次高速缓存存储器134中的写入目标数据，并将存储在二次高速缓冲存储器134中的写入目标数据传送到DKA 140。

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