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1. 发明授权

US08779830B2 Inverse level shift circuit 有权
标题翻译：反电平移位电路
公开(公告)号：US08779830B2
公开(公告)日：2014-07-15
申请号：US13802576
申请日：2013-03-13
申请人： Takaki Nakashima , Motoki Imanishi , Kenji Sakai
发明人： Takaki Nakashima , Motoki Imanishi , Kenji Sakai
IPC分类号： H03L5/00
CPC分类号： H03K17/063 , H03K2217/0063
摘要： A voltage conversion mask signal generation circuit generates a first main signal and a first mask signal by converting an output signal of the first transistor to a low-side voltage, and generating a second main signal and a second mask signal by converting an output signal of the second transistor to a low-side voltage. A mask signal generation circuit generating a third mask signal with higher sensitivity than the first and second mask signals with respect to a fluctuation in the high-side reference potential. A mask logical circuit generating a fourth mask signal by performing a AND operation between the first mask signal and the second mask signal, and masking the first and second main signals with the third and fourth mask signals; and a SR flip flop circuit generating the output signal from the masked first and second main signals.
摘要翻译：电压转换掩模信号产生电路通过将第一晶体管的输出信号转换为低侧电压来产生第一主信号和第一屏蔽信号，并且通过将第一主信号和第二屏蔽信号的输出信号第二晶体管为低端电压。掩模信号生成电路相对于高侧基准电位的波动产生比第一和第二掩模信号高的灵敏度的第三掩模信号。一种掩模逻辑电路，通过在第一屏蔽信号和第二屏蔽信号之间执行“与”运算，并用第三和第四屏蔽信号屏蔽第一和第二主信号来产生第四屏蔽信号; 以及SR触发器电路，从被掩蔽的第一和第二主信号产生输出信号。

2. 发明申请

US20140062571A1 INVERSE LEVEL SHIFT CIRCUIT 有权
标题翻译：反相电平转换电路
公开(公告)号：US20140062571A1
公开(公告)日：2014-03-06
申请号：US13802576
申请日：2013-03-13
申请人： Takaki NAKASHIMA , Motoki IMANISHI , Kenji SAKAI
发明人： Takaki NAKASHIMA , Motoki IMANISHI , Kenji SAKAI
IPC分类号： H03K17/06
CPC分类号： H03K17/063 , H03K2217/0063
摘要： A voltage conversion mask signal generation circuit generates a first main signal and a first mask signal by converting an output signal of the first transistor to a low-side voltage, and generating a second main signal and a second mask signal by converting an output signal of the second transistor to a low-side voltage. A mask signal generation circuit generating a third mask signal with higher sensitivity than the first and second mask signals with respect to a fluctuation in the high-side reference potential. A mask logical circuit generating a fourth mask signal by performing a AND operation between the first mask signal and the second mask signal, and masking the first and second main signals with the third and fourth mask signals; and a SR flip flop circuit generating the output signal from the masked first and second main signals.
摘要翻译：电压转换掩模信号产生电路通过将第一晶体管的输出信号转换为低侧电压来产生第一主信号和第一屏蔽信号，并且通过将第一主信号和第二屏蔽信号的输出信号第二晶体管为低端电压。掩模信号生成电路相对于高侧基准电位的波动产生比第一和第二掩模信号高的灵敏度的第三掩模信号。一种掩模逻辑电路，通过在第一屏蔽信号和第二屏蔽信号之间执行“与”运算，并用第三和第四屏蔽信号屏蔽第一和第二主信号来产生第四屏蔽信号; 以及SR触发器电路，从被掩蔽的第一和第二主信号产生输出信号。

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