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1. 发明授权

US5054069A Apparatus for scrambling/descrambling data by word-by-word processing 失效
公开(公告)号：US5054069A
公开(公告)日：1991-10-01
申请号：US574147
申请日：1990-08-28
申请人： Takahiro Maeno , Yasunori Sato
发明人： Takahiro Maeno , Yasunori Sato
IPC分类号： H04L7/00 , H03K3/84 , H04L25/03
CPC分类号： H04L25/03872
摘要： A scrambling/descrambling apparatus has a data memory for storing a data word, a bit invert flag, and numerical data. A bit shift operating section performs, on receiving a bit of data to be outputted or a bit of input data, a bit shift operation with that bit and stores resultant data in the data memory in the form of a first data word. A randomizing/derandomizing section randomizes or derandomizes the input data by using the first data word and based on a generating polynomial and, depending on a state represented by the bit invert flag, inverts the bit of the data to be outputted to develop output data. A count processing section increments or decrements the numerical value stored in the data memory and, depending on the numerical value, selectively sets the bit invert flag to a predetermined state. A count controlling section replaces the numerical value with a predetermined initial value on the basis of the first data word and bit invert flag. The data memory holds a second and a third data word, bits of which corresponding in position to a particular bit of the first data word are a ZERO and a ONE, respectively. The count controlling section reads selectively either one of the second and third data words out of the data memory depending on the value of the bit which is inputted to the bit shift operating section, Exclusive-ORs the data word read out and the first data word, performs a masking operation with a data word resulting from the Exclusive-ORing for validating a bit corresponding in position to the particular bit position of the first data word while invalidating the remaining bits, and replaces the numerical value with the initial value when a data word resulting from the masking operation is indicative of a ZERO or when the bit invert flag is in the predetermined state. Alternatively, the count controlling section may read the first data word out of the data memory and, depending on the value of the bit which is inputted to the bit shift operating section, NOT or transfer the first data word, performs a masking operation with a data word representative of a result of NOTing or that of transfer for validating a bit corresponding in position to the particular bit position of the first data word while invalidating the remaining bits, and replace the numerical value with the initial value when a data word resulting from the masking operation is indicative of a ZERO or when the bit invert flag is in the predetermined state.

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