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1. 发明授权

US07555045B2 MPEG video decoder and MPEG video decoding method 失效
标题翻译： MPEG视频解码器和MPEG视频解码方法
公开(公告)号：US07555045B2
公开(公告)日：2009-06-30
申请号：US10614054
申请日：2003-07-08
申请人： Tadayoshi Kono , Mitsuhiko Ota , Hirohiko Inagaki
发明人： Tadayoshi Kono , Mitsuhiko Ota , Hirohiko Inagaki
IPC分类号： H04N7/12 , H04N5/91
CPC分类号： H04N19/90 , H04N19/127 , H04N19/152 , H04N19/172 , H04N19/423 , H04N19/44 , H04N19/50 , H04N19/61
摘要： A picture decoding section starts to decode a bit-stream for one picture when a decoding start command is supplied from a decoding start command generating section, and outputs a decoding completion command when the decoding is completed. Decoded picture data is stored in a decoding frame buffer. The decoding frame buffer outputs a bufferfull notification when a certain quantity of picture data is stored. The decoding start command generating section outputs the decoding start command to the picture decoding section when a decoding completion command is outputted from the picture decoding section and the bufferfull notification is not outputted from the decoding frame buffer.
摘要翻译：当从解码开始命令产生部分提供解码开始命令时，图像解码部分开始解码一个图像的比特流，并且在解码完成时输出解码完成命令。经解码的图像数据被存储在解码帧缓冲器中。当存储一定量的图像数据时，解码帧缓冲器输出缓冲区通知。解码开始指令生成部在从图像解码部输出解码完成指令并且不从解码帧缓冲器输出缓冲区通知的情况下，将解码开始命令输出到图像解码部。

2. 发明授权

US06628719B1 MPEG video decoder and MPEG video decoding method 有权
公开(公告)号：US06628719B1
公开(公告)日：2003-09-30
申请号：US09372039
申请日：1999-08-11
申请人： Tadayoshi Kono , Mitsuhiko Ota , Hirohiko Inagaki
发明人： Tadayoshi Kono , Mitsuhiko Ota , Hirohiko Inagaki
IPC分类号： H04N712
CPC分类号： H04N19/90 , H04N19/127 , H04N19/152 , H04N19/172 , H04N19/423 , H04N19/44 , H04N19/50 , H04N19/61
摘要： A picture decoding section starts to decode a bit-stream for one picture when a decoding start command is supplied from a decoding start command generating section, and outputs a decoding completion command when the decoding is completed. Decoded picture data is stored in a decoding frame buffer. The decoding frame buffer outputs a bufferfull notification when a certain quantity of picture data is stored. The decoding start command generating section outputs the decoding start command to the picture decoding section when a decoding completion command is outputted from the picture decoding section and the bufferfull notification is not outputted from the decoding frame buffer.

3. 发明授权

US4766858A Internal combustion engine 失效
标题翻译：内燃机
公开(公告)号：US4766858A
公开(公告)日：1988-08-30
申请号：US842483
申请日：1986-03-21
申请人： Toshio Yoshidome , Takanori Nagai , Tadayoshi Kono , Mikio Goto
发明人： Toshio Yoshidome , Takanori Nagai , Tadayoshi Kono , Mikio Goto
IPC分类号： F16C33/74 , F01M11/00 , F01M13/00 , F02B75/18 , F02B75/20 , F02F7/00 , F02F11/00 , F16C9/02 , F01M1/06
CPC分类号： F02B75/20 , F01M13/00 , F02B2075/1816 , F02F7/006 , Y10T74/2142
摘要： This invention relates to an internal combustion engine including an oil seal ring between a cylinder block and a crank shaft, a crank shaft cap and a conduit. The cylinder block includes a plurality of cylinders, a crank shaft support portion and an oil seal retainer. The crank shaft support portion is located under the plurality of cylinders and the oil seal retainer projects outwardly from the cylinder block. A crank case is defined within the cylinder block. The crank shaft cap is secured to the crank shaft support portion and an opening is defined therebetween. The crank shaft includes a main journal and a flange portion. The main journal is inserted into the opening defined between the crank shaft support portion and the crank shaft cap. The crank shaft is rotatably mounted on both the cylinder block and the crank shaft cap. The flange portion extends outwardly from the main journal and is spaced from the crank shaft support portion and the oil seal retainer of the cylinder block, so that a cavity is defined between the flange portion of the crank shaft, the oil seal retainer, the crank shaft support portion of the cylinder block and the crank shaft cap. The oil seal ring is located between the oil seal retainer of the cylinder block and the outer peripheral surface of the flange portion. The conduit is defined within the crank shaft support portion or the crank shaft cap. The conduit communicates the cavity with the crank case.
摘要翻译：本发明涉及一种内燃机，其包括在气缸体和曲轴之间的油封环，曲柄轴盖和导管。气缸体包括多个气缸，曲轴支撑部分和油封保持器。曲轴支撑部分位于多个气缸下方，油封保持器从气缸体向外突出。曲轴箱定义在气缸体内。曲柄轴盖固定在曲柄轴支撑部分上，并且在其之间限定开口。曲轴包括主轴颈和凸缘部。主轴颈插入到曲柄轴支撑部分和曲柄轴盖之间限定的开口中。曲柄轴可旋转地安装在气缸体和曲柄轴盖上。凸缘部分从主轴颈向外延伸并且与曲轴支撑部分和气缸体的油封保持器间隔开，从而在曲轴的凸缘部分，油封保持器，曲柄气缸体的轴支撑部分和曲柄轴盖。油封环位于气缸体的油封保持架和凸缘部的外周面之间。导管限定在曲柄轴支撑部分或曲柄轴盖内。导管将空腔与曲轴箱连通。

4. 发明授权

US07460599B2 Video decoding device and method, and program product therefor 有权
标题翻译：视频解码装置及方法及程序产品
公开(公告)号：US07460599B2
公开(公告)日：2008-12-02
申请号：US10105215
申请日：2002-03-26
申请人： Tadayoshi Kono , Mitsuhiko Ohta
发明人： Tadayoshi Kono , Mitsuhiko Ohta
IPC分类号： H04B1/66
CPC分类号： H04N19/112
摘要： A video decoding device which enables smooth reverse playback of 3:2 pulldown video streams. A video data storage unit stores pictures constituting a video stream that is being played back, where each picture consists of a first field and a second field. An attribute data storage unit stores attribute data which describes how each picture should be displayed. The attribute data includes a repeat-first-field flag for each picture. When playing back the video stream in a reverse direction, a reverse playback unit determines whether the repeat-first-field flag is set or cleared, and reads out the first and second fields of each picture in the same order as that in forward playback mode if the repeat-first-field flag is set. If the repeat-first-field flag is cleared, it reads out the first and second fields in the opposite order to that in the forward playback mode.
摘要翻译：一种视频解码装置，能够平滑地反转3：2下拉视频流。视频数据存储单元存储构成正在播放的视频流的图像，其中每个图像由第一场和第二场组成。属性数据存储单元存储描述每个图像应如何显示的属性数据。属性数据包括每个图片的重复首字段标志。当反向播放视频流时，反向重放单元确定是否设置或清除重复首字段标志，并且以与正向重放模式中相同的顺序读出每个图片的第一和第二字段如果重复首字段标志被设置。如果重复第一场标志被清除，它将以与正向重放模式相反的顺序读出第一和第二场。

5. 发明授权

US07218676B2 Method and a decoder for decoding MPEG video 有权
标题翻译： MPEG视频解码方法和解码器
公开(公告)号：US07218676B2
公开(公告)日：2007-05-15
申请号：US09747957
申请日：2000-12-27
申请人： Tadayoshi Kono , Mitsuhiko Ohta
发明人： Tadayoshi Kono , Mitsuhiko Ohta
IPC分类号： H04B1/66
CPC分类号： H04N19/423 , H04N5/4401 , H04N19/174 , H04N19/176 , H04N19/61
摘要： A decoded picture and parameters of a sequence layer, a GOP layer and a picture layer respectively for displaying the decoded picture are stored as a set in each of picture banks and parameter banks of a frame memory. Parameters of each layer stored as a set with a picture decoded immediately before are read out. Parameters attached to a picture to be decoded are decoded overwritten. Thus, the parameters of each layer stored as a set with the picture to be decoded are generated.
摘要翻译：解码图像和分别用于显示解码图像的序列层，GOP层和图像层的参数作为一组存储在帧存储器的每个图像组和参数组中。作为具有紧接在之前解码的图像的集合存储的每个层的参数被读出。附加到要解码的图像的参数被解码覆盖。因此，生成作为具有要解码的图像的集合存储的各层的参数。

6. 发明授权

US07027714B2 Apparatus for reproduction of video and audio with suspension function 有权
标题翻译：用于再现具有悬挂功能的视频和音频的装置
公开(公告)号：US07027714B2
公开(公告)日：2006-04-11
申请号：US09810497
申请日：2001-03-19
申请人： Mitsuhiko Ohta , Tadayoshi Kono
发明人： Mitsuhiko Ohta , Tadayoshi Kono
IPC分类号： H04N5/91
CPC分类号： H04N21/4307 , H04N5/783 , H04N9/8042 , H04N21/2368 , H04N21/4341 , H04N21/440209
摘要： An apparatus for reproducing video and audio includes a video decoder which receives video data coded by a unit of a first time length, an audio decoder which receives audio data coded by a unit of a second time length different from the first time length, and a synchronization control unit which suspends video output of said video decoder and audio output of said audio decoder, and resumes the audio output a certain time period after resuming the video output where the certain time period corresponds to a period from the suspension of the video output to the suspension of the audio output.
摘要翻译：一种用于再现视频和音频的装置包括：视频解码器，其接收由第一时间长度单位编码的视频数据，接收由第一时间长度不同的第二时间长度编码的音频数据的音频解码器，以及同步控制单元，其暂停所述视频解码器的视频输出和所述音频解码器的音频输出，并且在恢复视频输出之后的特定时间段内恢复音频输出，其中所述特定时间段对应于从视频输出暂停到暂停播放音频输出。

7. 发明授权

US06459736B1 Moving picture decoding apparatus and method 失效
标题翻译：运动图像解码装置及方法
公开(公告)号：US06459736B1
公开(公告)日：2002-10-01
申请号：US09093939
申请日：1998-06-09
申请人： Mitsuhiko Ohta , Tadayoshi Kono , Masanori Ishizuka , Hirohiko Inagaki , Koichi Yamashita
发明人： Mitsuhiko Ohta , Tadayoshi Kono , Masanori Ishizuka , Hirohiko Inagaki , Koichi Yamashita
IPC分类号： H04N712
CPC分类号： H04N21/654 , H04N19/102 , H04N19/44 , H04N19/46 , H04N19/70 , H04N21/6332
摘要： A moving picture decoding apparatus includes an input part which adds at least one picture tag to a bit stream, having a plurality of pictures, which has been subjected to intraframe or interframe encoding, the picture tag or tags having a value monotonously changing on a picture-by-picture basis, independent of picture content, a buffer memory storing the bit stream and a controller controlling one or more of the plurality of pictures stored in the buffer memory by referring to the corresponding picture tag or tags.
摘要翻译：运动图像解码装置包括输入部分，其将至少一个图像标签添加到比特流中，具有已经经过帧内或帧间编码的多个图像，具有在图像上单调变化的图像标签或标签独立于图像内容，存储比特流的缓冲存储器和通过参考对应的图片标签或标签控制存储在缓冲存储器中的多个图片中的一个或多个的控制器的控制器。

8. 发明授权

US06408100B2 Method and device of moving picture decoding 失效
标题翻译：运动图像解码的方法和装置
公开(公告)号：US06408100B2
公开(公告)日：2002-06-18
申请号：US09154702
申请日：1998-09-17
申请人： Katsuki Miyawaki , Hirohiko Inagaki , Tadayoshi Kono , Mitsuhiko Ohta , Koichi Yamashita
发明人： Katsuki Miyawaki , Hirohiko Inagaki , Tadayoshi Kono , Mitsuhiko Ohta , Koichi Yamashita
IPC分类号： G06K936
CPC分类号： H04N19/85 , H04N19/423 , H04N19/61
摘要： A display parameter synchronous holding circuit 20 comprises a register group 21 for receiving display parameters DP separated by variable length decoding circuit, a selector 24 for selecting and outputting either the display parameters DP or the output of the register group 21, register group 22 for receiving the output of the selector 24, a register group 23 for storing the output of the register group 22 in response to VSYNC, and a control circuit 25 for causing the selector 24 to select the output of the register group 21 and making latch signals SH2 and SH1 to register groups 22 and 21 active in the order when the picture coding type PCT indicates I-picture or P-picture, and for causing the selector 24 to select DP and making SH2 active when PCT indicates B-picture.
摘要翻译：显示参数同步保持电路20包括用于接收由可变长度解码电路分离的显示参数DP的寄存器组21，用于选择和输出显示参数DP或寄存器组21的输出的选择器24，用于接收的寄存器组22 选择器24的输出，用于响应于VSYNC存储寄存器组22的输出的寄存器组23以及控制电路25，用于使选择器24选择寄存器组21的输出并使锁存信号SH2和 SH1，当图像编码类型PCT指示I图像或P图像，并且当PCT指示B图像时使选择器24选择DP并使SH2有效时，按顺序激活寄存器组22和21。

9. 发明授权

US07039849B2 Data decoder and method of decoding data 失效
公开(公告)号：US07039849B2
公开(公告)日：2006-05-02
申请号：US10436144
申请日：2003-05-13
申请人： Tadayoshi Kono , Mitsuhiko Ohta
发明人： Tadayoshi Kono , Mitsuhiko Ohta
IPC分类号： H03M13/00
CPC分类号： H04N9/8042 , G11B27/105 , G11B27/3027 , G11B2220/2562 , H04N5/85 , H04N9/8063 , H04N9/8227 , H04N21/234318 , H04N21/4307
摘要： A detecting circuit detects a boundary in a bit stream which is coded in compliance with a predetermined rule. The boundary is a point at which discontinuity of reproduction time occurs. An inverting circuit inverts a specific bit in a header of a succeeding bit stream immediately subsequent to the boundary, in response to the detection of the boundary by the detecting circuit. The boundary can thus be detected easily by simply monitoring the specific bit, for example, in outputting the decoded bit streams. This consequently facilitates synchronous management and the like of the bit streams. The specific bit is included in the bit stream. Thus, detecting the specific bit allows simple and accurate detection of the boundary at which discontinuity of the reproduction time occurs.

10. 发明授权

US6011869A Method and apparatus of decoding moving image 失效
标题翻译：解码运动图像的方法和装置
公开(公告)号：US6011869A
公开(公告)日：2000-01-04
申请号：US17671
申请日：1998-02-03
申请人： Mitsuhiko Ohta , Katsuki Miyawaki , Masanori Ishizuka , Tadayoshi Kono , Hirohiko Inagaki
发明人： Mitsuhiko Ohta , Katsuki Miyawaki , Masanori Ishizuka , Tadayoshi Kono , Hirohiko Inagaki
IPC分类号： H04N5/907 , G06T9/00 , H03M7/30 , H04N5/92 , H04N5/93 , H04N19/00 , H04N19/423 , H04N19/44 , H04N19/46 , H04N19/587 , H04N19/625 , H04N19/70 , H04N19/85 , H04N19/91 , G06K9/36
CPC分类号： H04N19/423 , H04N19/44 , H04N19/61
摘要： In storing decoded image data of a picture into a memory 23, PTS1 and a valid/invalid flag F1 corresponding to the picture are stored at the top boundary address ADR1 of a storage area within the memory 23, ADR1 is temporarily held in a register circuit 211. whether a read address ADR coincides with any one of addresses ADR1 to ADR3 within the register circuit 211 is detected while sequentially reading data from the memory 23 to display a picture. When coincidence is detected, the data read from the memory 23 are retrieved as PTS and F, and control corresponding to a time difference between STC and retrieved PTS is executed if F indicates validity. When coincidence is not detected, the data read from the memory 23 are used as display decoded image data DAT4.
摘要翻译：在将图像的解码图像数据存储到存储器23中时，PTS1和对应于图像的有效/无效标志F1被存储在存储器23内的存储区域的顶部边界地址ADR1上，ADR1暂时保持在寄存器电路在从存储器23顺序地读取数据以显示图像的同时检测读取地址ADR是否与寄存器电路211内的地址ADR1至ADR3中的任何一个一致。当检测到符合时，从存储器23读取的数据被检索为PTS和F，并且如果F表示有效性，则执行对应于STC和检索到的PTS之间的时间差的控制。当未检测到一致时，将从存储器23读取的数据用作显示解码图像数据DAT4。

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