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1. 发明授权

US07042068B2 Leadframe and semiconductor package made using the leadframe 有权
公开(公告)号：US07042068B2
公开(公告)日：2006-05-09
申请号：US09845601
申请日：2001-04-27
申请人： Byung Hoon Ahn , Jae Hun Ku , Young Suk Chung , Suk Gu Ko , Sung Sik Jang , Young Nam Choi , Won Chul Do
发明人： Byung Hoon Ahn , Jae Hun Ku , Young Suk Chung , Suk Gu Ko , Sung Sik Jang , Young Nam Choi , Won Chul Do
IPC分类号： H01L23/495
CPC分类号： H01L23/495 , H01L23/3107 , H01L23/49541 , H01L23/49548 , H01L24/48 , H01L24/73 , H01L2224/05599 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/484 , H01L2224/73265 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85455 , H01L2224/85464 , H01L2924/00014 , H01L2924/01002 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： Metal leadframes, semiconductor packages made using the leadframes, and methods of making the leadframes and packages are disclosed. In one embodiment, the leadframe includes a rectangular frame. A chip pad and a plurality of leads are within the frame. The lower side of the chip pad and the leads includes one or more vertically recessed horizontal surfaces. The upper side of the chip pad may include a groove around a chip mounting region. In a package, the chip pad supports a semiconductor chip electrically connected to the leads. The lower side of the chip pad and leads are exposed at an exterior surface of the package body. Encapsulant material underfills the recessed lower surfaces of the chip pad and leads, thereby locking them to the encapsulant material. A wire may be reliably bonded to the chip pad within the groove formed in the upper side thereof.

2. 发明授权

US08410585B2 Leadframe and semiconductor package made using the leadframe 有权
标题翻译：引线框和使用引线框制成的半导体封装
公开(公告)号：US08410585B2
公开(公告)日：2013-04-02
申请号：US11372597
申请日：2006-03-10
申请人： Byung Hoon Ahn , Jae Hun Ku , Young Suk Chung , Suk Gu Ko , Sung Sik Jang , Young Nam Choi , Won Chul Do
发明人： Byung Hoon Ahn , Jae Hun Ku , Young Suk Chung , Suk Gu Ko , Sung Sik Jang , Young Nam Choi , Won Chul Do
IPC分类号： H01L23/495
CPC分类号： H01L23/495 , H01L23/3107 , H01L23/49541 , H01L23/49548 , H01L24/48 , H01L24/73 , H01L2224/05599 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/484 , H01L2224/73265 , H01L2224/85439 , H01L2224/85444 , H01L2224/85447 , H01L2224/85455 , H01L2224/85464 , H01L2924/00014 , H01L2924/01002 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： Metal leadframes, semiconductor packages made using the leadframes, and methods of making the leadframes and packages are disclosed. In one embodiment, the leadframe includes a rectangular frame. A chip pad and a plurality of leads are within the frame. The lower side of the chip pad and the leads includes one or more vertically recessed horizontal surfaces. The upper side of the chip pad may include a groove around a chip mounting region. In a package, the chip pad supports a semiconductor chip electrically connected to the leads. The lower side of the chip pad and leads are exposed at an exterior surface of the package body. Encapsulant material underfills the recessed lower surfaces of the chip pad and leads, thereby locking them to the encapsulant material. A wire may be reliably bonded to the chip pad within the groove formed in the upper side thereof.
摘要翻译：公开了使用引线框制造的金属引线框，半导体封装以及制造引线框和封装的方法。在一个实施例中，引线框架包括矩形框架。芯片焊盘和多个引线在框架内。芯片焊盘的下侧和引线包括一个或多个垂直凹入的水平表面。芯片焊盘的上侧可以包括围绕芯片安装区域的凹槽。在封装中，芯片焊盘支撑与引线电连接的半导体芯片。芯片焊盘的下侧和引线在封装体的外表面露出。封装材料底部填充芯片焊盘和引线的凹陷的下表面，从而将它们锁定到密封材料上。电线可以可靠地结合到在其上侧形成的槽内的芯片焊盘。

3. 发明授权

US07220915B1 Memory card and its manufacturing method 有权
标题翻译：存储卡及其制造方法
公开(公告)号：US07220915B1
公开(公告)日：2007-05-22
申请号：US11060263
申请日：2005-02-17
申请人： Chul Woo Park , Sang Jae Jang , Sung Su Park , Choon Heung Lee , Suk Gu Ko
发明人： Chul Woo Park , Sang Jae Jang , Sung Su Park , Choon Heung Lee , Suk Gu Ko
IPC分类号： H05K3/28 , H01L23/02 , H01L23/495
CPC分类号： G11C29/48 , G11C29/1201 , H01L23/49855 , H01L24/48 , H01L2224/32225 , H01L2224/48137 , H01L2224/48227 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A memory card comprising a circuit board having opposed upper and lower circuit board surfaces, at least one test pad disposed on the upper circuit board surface, and a conductive pattern disposed on the lower circuit board surface and electrically connected to the test pad. Electrically connected to the conductive pattern of the circuit board is a leadframe which includes a plurality of leads, each of the leads having a signal pad portion. At least one electronic circuit element is attached to the lower circuit board surface and electrically connected to the leadframe and to the conductive pattern of the circuit board. A body at least partially encapsulates the circuit board, the leadframe and the electronic circuit element such that the test pad of the circuit board is exposed in an upper body surface of the body, and the signal pad portions of the leads of the leadframe are exposed in a lower body surface of the body.
摘要翻译：一种存储卡，包括具有相对的上电路板表面和下电路板表面的电路板，设置在上电路板表面上的至少一个测试焊盘和布置在下电路板表面上并电连接到测试焊盘的导电图案。电连接到电路板的导电图案的是引线框架，其包括多个引线，每个引线具有信号焊盘部分。至少一个电子电路元件附接到下电路板表面并电连接到引线框架和电路板的导电图案。主体至少部分地封装电路板，引线框架和电子电路元件，使得电路板的测试焊盘暴露在主体的上体表面中，并且引线框的引线的信号焊盘部分被暴露在身体的下半身表面。

4. 发明授权

US07633763B1 Double mold memory card and its manufacturing method 有权
标题翻译：双模存储卡及其制造方法
公开(公告)号：US07633763B1
公开(公告)日：2009-12-15
申请号：US10766101
申请日：2004-01-28
申请人： Chul Woo Park , Suk Gu Ko , Sang Jae Jang , Sung Su Park , Choon Heung Lee
发明人： Chul Woo Park , Suk Gu Ko , Sang Jae Jang , Sung Su Park , Choon Heung Lee
IPC分类号： H05K7/02 , H05K7/06 , H05K7/08 , H05K7/10
CPC分类号： G06K19/07743 , G06K19/07724 , H01L2224/48091 , H01L2924/1815 , H05K1/117 , H05K3/284 , H05K2201/09036 , H05K2201/10159 , H05K2203/1316 , H05K2203/1572 , H01L2924/00014
摘要： A memory card comprising a substrate having opposed top and bottom surfaces and a plurality of terminals disposed on the bottom surface thereof. Mounted to the top surface of the substrate is at least one component which is itself electrically connected to the terminals of the substrate. Formed on the bottom surface of the substrate is a first encapsulation part. Formed on the top surface of the substrate is a second encapsulation part which encapsulates the component mounted thereto.
摘要翻译：一种存储卡，包括具有相对的顶表面和底表面的基底和设置在其底表面上的多个端子。安装到基板的顶表面的是至少一个本身电连接到基板的端子的部件。形成在基板的底面上的是第一封装部。形成在基板的顶表面上的是封装安装在其上的部件的第二封装部分。

5. 发明授权

US07201327B1 Memory card and its manufacturing method 有权
标题翻译：存储卡及其制造方法
公开(公告)号：US07201327B1
公开(公告)日：2007-04-10
申请号：US10967462
申请日：2004-10-18
申请人： Chul Woo Park , Sang Jae Jang , Sung Su Park , Choon Heung Lee , Suk Gu Ko
发明人： Chul Woo Park , Sang Jae Jang , Sung Su Park , Choon Heung Lee , Suk Gu Ko
IPC分类号： G06K19/06
CPC分类号： G06K19/077 , G06K19/07732 , H01L2224/32225 , H01L2224/32245 , H01L2224/48137 , H01L2224/48247 , H01L2224/73265 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/00012
摘要： A memory card comprising a die paddle having opposed, generally planar first and second die paddle surfaces and multiple peripheral edge segments. Disposed along and in spaced relation to one of the peripheral edge segments of the die paddle is a plurality of contacts, each of which has opposed, generally planar first and second contact surfaces. An inner body partially encapsulates the die paddle and the contacts, the first contact surface of each of the contacts and the first die paddle surface of the die paddle being exposed in and substantially flush with a generally planar first inner body surface of the inner body. The inner body further defines a generally planar second inner body surface which is disposed in opposed relation to the first inner body surface, the second contact surface of each of the contacts being exposed in the second inner body surface. At least one electronic circuit element is attached to the first die paddle surface and electrically connected to at least one of the contacts. An outer body partially encapsulates the inner body such that the first die paddle surface, the first contact surface of each of the contacts, the first inner body surface and the electronic circuit element are covered by the outer body, with the second inner body surface and hence the second contact surface of each of the contacts not being covered by the outer body and thus exposed.
摘要翻译：一种存储卡，其包括具有相对的，大致平面的第一和第二管芯片表面和多个外围边缘部分的管芯焊盘。与模板的周边边缘部分中的一个相互间隔设置有多个触点，每个触点具有相对的大致平面的第一和第二接触表面。内部主体部分地封装管芯焊盘和触头，每个触头的第一接触表面和管芯焊盘的第一裸片焊盘表面暴露于内部主体的大致平面的第一内部主体表面并基本上与其平齐。内体进一步限定大致平坦的第二内体表面，其以与第一内体表面相对的方式设置，每个触头的第二接触表面暴露在第二内体表面中。至少一个电子电路元件附接到第一裸片表面并电连接到至少一个触点。外部主体部分地封装内部主体，使得第一裸片表面，每个触点的第一接触表面，第一内部主体表面和电子电路元件被外部主体覆盖，具有第二内部主体表面和因此每个触点的第二接触表面不被外体覆盖并因此被暴露。

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