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1. 发明授权

US08672603B2 Auto-sequencing inline processing apparatus 有权
标题翻译：自动排序内联处理设备
公开(公告)号：US08672603B2
公开(公告)日：2014-03-18
申请号：US12965791
申请日：2010-12-10
申请人： Wendell Thomas Blonigan , Masato Toshima , Kam S. Law , David Eric Berkstresser , Steve Kleinke , Craig Lyle Stevens
发明人： Wendell Thomas Blonigan , Masato Toshima , Kam S. Law , David Eric Berkstresser , Steve Kleinke , Craig Lyle Stevens
IPC分类号： H01L21/677
CPC分类号： H01L21/67745 , C23C16/45565 , G06T7/0004 , H01J37/32733 , H01L21/67173 , H01L21/67739 , H01L21/67748 , H01L21/67754 , Y10T29/49948
摘要： An apparatus and method for concurrent processing of several substrates. The system employs a novel architecture which, while being linear, may autonomously sequence processing and move substrates in different directions as necessary. The system moves several substrates concurrently; however, unlike the prior art it does not utilize trays.
摘要翻译：一种并行处理多个基板的装置和方法。该系统采用一种新颖的架构，其在线性的情况下可以根据需要自主地对处理进行顺序处理和移动基板。系统同时移动多个基板; 然而，与现有技术不同，它不利用托盘。

2. 发明授权

US08082044B2 Apparatus and methods for precompiling program sequences processing for wafer processing 有权
标题翻译：用于预编译用于晶片处理的程序序列处理的装置和方法
公开(公告)号：US08082044B2
公开(公告)日：2011-12-20
申请号：US12338781
申请日：2008-12-18
申请人： Jaideep Jain , Qiang Zhou , Steve Kleinke
发明人： Jaideep Jain , Qiang Zhou , Steve Kleinke
IPC分类号： G05B15/02
CPC分类号： G05B19/4148 , G05B2219/33104 , G05B2219/45031
摘要： Disclosed are apparatus and methods for embodiments for efficiently and flexibly controlling hardware devices in a semiconductor processing system are provided for use in a distributed control arrangement. In general, the distributed arrangement includes at least one upper-level controller that is configurable with a computer program sequence of instructions for controlling one or more hardware devices of a processing tool. The hardware devices are controlled through one or more lower-level controllers. Prior to execution of the program sequence of the upper-level controller, at least one instruction of this program is pre-compiled so as to translate the instruction for execution by a selected lower-level controller and to add an at least one interlock check to such pre-compiled instruction and make the translated instruction accessible to at least one lower-level controller. The interlock check specifies one or more condition(s) for the selected lower-level controller to execute the pre-compiled instruction. Any number of instructions of the upper-level controller may be translated for use by any number of selected lower-level controllers, where some of the translated instructions include one or more interlock checks.
摘要翻译：公开了用于有效和灵活地控制半导体处理系统中的硬件设备的实施例的装置和方法，用于分布式控制装置。通常，分布式布置包括至少一个上级控制器，其可配置有用于控制处理工具的一个或多个硬件设备的计算机程序序列。硬件设备通过一个或多个下级控制器进行控制。在执行上级控制器的程序序列之前，对该程序的至少一个指令进行预编译，以便转换由所选择的下级控制器执行的指令，并将至少一个互锁检查添加到这样的预编译指令并且使翻译的指令可访问至少一个下级控制器。互锁检查指定所选下级控制器执行预编译指令的一个或多个条件。上级控制器的任何数量的指令可以被翻译以供任何数量的所选择的下级控制器使用，其中一些转换的指令包括一个或多个互锁检查。

3. 发明授权

US06405101B1 Wafer centering system and method 失效
标题翻译：晶圆定心系统及方法
公开(公告)号：US06405101B1
公开(公告)日：2002-06-11
申请号：US09434099
申请日：1999-11-05
申请人： William R. Johanson , Craig Stevens , Steve Kleinke , Damon Genetti
发明人： William R. Johanson , Craig Stevens , Steve Kleinke , Damon Genetti
IPC分类号： G06F700
CPC分类号： H01L21/681
摘要： Disclosed is a system and method for detecting the position of a wafer with respect to a calibrated reference position. In one embodiment of the invention, sensors are used to detect the edges of the wafer as the wafer is being passed over the sensors. This wafer detection information is then used to calculate the amount by which the wafer is off-centered such that corrections can be made before the wafer is placed onto a destination location.
摘要翻译：公开了一种用于检测晶片相对于校准基准位置的位置的系统和方法。在本发明的一个实施例中，当晶片通过传感器时，传感器用于检测晶片的边缘。然后，该晶片检测信息用于计算晶片偏心的量，使得可以在将晶片放置在目的位置之前进行校正。

4. 发明授权

US08444364B2 Auto-sequencing multi-directional inline processing apparatus 有权
标题翻译：自动排序多向在线处理设备
公开(公告)号：US08444364B2
公开(公告)日：2013-05-21
申请号：US12965798
申请日：2010-12-10
申请人： Wendell Thomas Blonigan , Masato Toshima , Kam S. Law , David Eric Berkstresser , Steve Kleinke , Craig Lyle Stevens
发明人： Wendell Thomas Blonigan , Masato Toshima , Kam S. Law , David Eric Berkstresser , Steve Kleinke , Craig Lyle Stevens
IPC分类号： B65G53/46
CPC分类号： H01L21/67745 , C23C16/45565 , G06T7/0004 , H01J37/32733 , H01L21/67173 , H01L21/67739 , H01L21/67748 , H01L21/67754 , Y10T29/49948
摘要： An apparatus and method for concurrent processing of several substrates. The system employs a novel architecture which, while being linear, may autonomously sequence processing and move substrates in different directions as necessary. The system moves several substrates concurrently; however, unlike the prior art it does not utilize trays.
摘要翻译：一种并行处理多个基板的装置和方法。该系统采用一种新颖的架构，其在线性的情况下可以根据需要自主地对处理进行顺序处理和移动基板。系统同时移动多个基板; 然而，与现有技术不同，它不利用托盘。

5. 发明申请

US20110142573A1 AUTO-SEQUENCING MULTI-DIRECTIONAL INLINE PROCESSING APPARATUS 有权
标题翻译：自动排序多向在线处理设备
公开(公告)号：US20110142573A1
公开(公告)日：2011-06-16
申请号：US12965798
申请日：2010-12-10
申请人： Wendell Thomas BLONIGAN , Masato TOSHIMA , Kam S. LAW , David Eric BERKSTRESSER , Steve KLEINKE , Craig Lyle STEVENS
发明人： Wendell Thomas BLONIGAN , Masato TOSHIMA , Kam S. LAW , David Eric BERKSTRESSER , Steve KLEINKE , Craig Lyle STEVENS
IPC分类号： H01L21/677
CPC分类号： H01L21/67745 , C23C16/45565 , G06T7/0004 , H01J37/32733 , H01L21/67173 , H01L21/67739 , H01L21/67748 , H01L21/67754 , Y10T29/49948
摘要： An apparatus and method for concurrent processing of several substrates. The system employs a novel architecture which, while being linear, may autonomously sequence processing and move substrates in different directions as necessary. The system moves several substrates concurrently; however, unlike the prior art it does not utilize trays.
摘要翻译：一种并行处理多个基板的装置和方法。该系统采用一种新颖的架构，其在线性的情况下可以根据需要自主地对处理进行顺序处理和移动基板。系统同时移动多个基板; 然而，与现有技术不同，它不利用托盘。

6. 发明申请

US20110142572A1 AUTO-SEQUENCING INLINE PROCESSING APPARATUS 有权
标题翻译：自动排序在线处理设备
公开(公告)号：US20110142572A1
公开(公告)日：2011-06-16
申请号：US12965791
申请日：2010-12-10
申请人： Wendell Thomas BLONIGAN , Masato Toshima , Kam S. Law , David Eric Berkstresser , Steve Kleinke , Craig Lyle Stevens
发明人： Wendell Thomas BLONIGAN , Masato Toshima , Kam S. Law , David Eric Berkstresser , Steve Kleinke , Craig Lyle Stevens
IPC分类号： H01L21/677 , H05B6/64
CPC分类号： H01L21/67745 , C23C16/45565 , G06T7/0004 , H01J37/32733 , H01L21/67173 , H01L21/67739 , H01L21/67748 , H01L21/67754 , Y10T29/49948
摘要： An apparatus and method for concurrent processing of several substrates. The system employs a novel architecture which, while being linear, may autonomously sequence processing and move substrates in different directions as necessary. The system moves several substrates concurrently; however, unlike the prior art it does not utilize trays.
摘要翻译：一种并行处理多个基板的装置和方法。该系统采用一种新颖的架构，其在线性的情况下可以根据需要自主地对处理进行顺序处理和移动基板。系统同时移动多个基板; 然而，与现有技术不同，它不利用托盘。

7. 发明申请

US20090132062A1 APPARATUS AND METHODS FOR PRECOMPILING PROGRAM SEQUENCES FOR WAFER PROCESSING 有权
标题翻译：用于预处理过程的程序序列的装置和方法
公开(公告)号：US20090132062A1
公开(公告)日：2009-05-21
申请号：US12338781
申请日：2008-12-18
申请人： Jaideep Jain , Qiang Zhou , Steve Kleinke
发明人： Jaideep Jain , Qiang Zhou , Steve Kleinke
IPC分类号： G05B15/02 , G06F9/455 , G05D7/00 , G05B9/02 , G05B17/02 , G06G7/66
CPC分类号： G05B19/4148 , G05B2219/33104 , G05B2219/45031
摘要： Disclosed are apparatus and methods for embodiments for efficiently and flexibly controlling hardware devices in a semiconductor processing system are provided for use in a distributed control arrangement. In general, the distributed arrangement includes at least one upper-level controller that is configurable with a computer program sequence of instructions for controlling one or more hardware devices of a processing tool. The hardware devices are controlled through one or more lower-level controllers. Prior to execution of the program sequence of the upper-level controller, at least one instruction of this program is pre-compiled so as to translate the instruction for execution by a selected lower-level controller and to add an at least one interlock check to such pre-compiled instruction and make the translated instruction accessible to at least one lower-level controller. The interlock check specifies one or more condition(s) for the selected lower-level controller to execute the pre-compiled instruction. Any number of instructions of the upper-level controller may be translated for use by any number of selected lower-level controllers, where some of the translated instructions include one or more interlock checks.
摘要翻译：公开了用于有效和灵活地控制半导体处理系统中的硬件设备的实施例的装置和方法，用于分布式控制装置。通常，分布式布置包括至少一个上级控制器，其可配置有用于控制处理工具的一个或多个硬件设备的计算机程序序列。硬件设备通过一个或多个下级控制器进行控制。在执行上级控制器的程序序列之前，对该程序的至少一个指令进行预编译，以便转换由所选择的下级控制器执行的指令，并将至少一个互锁检查添加到这样的预编译指令并且使翻译的指令可访问至少一个下级控制器。互锁检查指定所选下级控制器执行预编译指令的一个或多个条件。上级控制器的任何数量的指令可以被翻译以供任何数量的所选择的下级控制器使用，其中一些转换的指令包括一个或多个互锁检查。

8. 发明授权

US07477948B1 Apparatus and methods for precompiling program sequences for wafer processing 有权
标题翻译：用于预编译用于晶片处理的程序序列的装置和方法
公开(公告)号：US07477948B1
公开(公告)日：2009-01-13
申请号：US11556989
申请日：2006-11-06
申请人： Jaideep Jain , Qiang Zhou , Steve Kleinke
发明人： Jaideep Jain , Qiang Zhou , Steve Kleinke
IPC分类号： G05B15/02
CPC分类号： G05B19/4148 , G05B2219/33104 , G05B2219/45031
摘要： Disclosed are apparatus and methods for embodiments for efficiently and flexibly controlling hardware devices in a semiconductor processing system are provided for use in a distributed control arrangement. In general, the distributed arrangement includes at least one upper-level controller that is configurable with a computer program sequence of instructions for controlling one or more hardware devices of a processing tool. The hardware devices are controlled through one or more lower-level controllers. Prior to execution of the program sequence of the upper-level controller, at least one instruction of this program is pre-compiled so as to translate the instruction for execution by a selected lower-level controller and to add an at least one interlock check to such pre-compiled instruction and make the translated instruction accessible to at least one lower-level controller. The interlock check specifies one or more condition(s) for the selected lower-level controller to execute the pre-compiled instruction. Any number of instructions of the upper-level controller may be translated for use by any number of selected lower-level controllers, where some of the translated instructions include one or more interlock checks.
摘要翻译：公开了用于有效和灵活地控制半导体处理系统中的硬件设备的实施例的装置和方法，用于分布式控制装置。通常，分布式布置包括至少一个上级控制器，其可配置有用于控制处理工具的一个或多个硬件设备的计算机程序序列。硬件设备通过一个或多个下级控制器进行控制。在执行上级控制器的程序序列之前，对该程序的至少一个指令进行预编译，以便转换由所选择的下级控制器执行的指令，并将至少一个互锁检查添加到这样的预编译指令并且使翻译的指令可访问至少一个下级控制器。互锁检查指定所选下级控制器执行预编译指令的一个或多个条件。上级控制器的任何数量的指令可以被翻译以供任何数量的所选择的下级控制器使用，其中一些转换的指令包括一个或多个互锁检查。

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