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1. 发明授权

US07106536B2 Write head demagnetizer 有权
标题翻译：写磁头去磁器
公开(公告)号：US07106536B2
公开(公告)日：2006-09-12
申请号：US10954599
申请日：2004-09-30
申请人： Hao Fang , Stephen Carl Kuehne
发明人： Hao Fang , Stephen Carl Kuehne
IPC分类号： G11B5/02
CPC分类号： H01F13/006 , G11B5/465
摘要： A demagnetizer for an inductive load having a driver circuit including at least one transistor and a ramp-down voltage source switchably connected to the driver circuit, so that when the ramp-down voltage source is connected to the transistor, it drives the voltage of the transistor below its threshold voltage.
摘要翻译：一种用于感性负载的去磁器，具有包括至少一个晶体管的驱动器电路和可切换地连接到驱动器电路的斜降电压源，使得当斜坡下降电压源连接到晶体管时，其驱动电压晶体管低于其阈值电压。

2. 发明授权

US6162711A In-situ boron doped polysilicon with dual layer and dual grain structure for use in integrated circuits manufacturing 有权
标题翻译：具有双层和双晶结构的原位硼掺杂多晶硅，用于集成电路制造
公开(公告)号：US6162711A
公开(公告)日：2000-12-19
申请号：US232114
申请日：1999-01-15
申请人： Yi Ma , Stefanie Chaplin , Stephen Carl Kuehne , Brittin Charles Kane , Michael A. Laughery
发明人： Yi Ma , Stefanie Chaplin , Stephen Carl Kuehne , Brittin Charles Kane , Michael A. Laughery
IPC分类号： H01L21/28 , H01L21/8238 , H01L21/20
CPC分类号： H01L21/28035 , H01L21/8238
摘要： A method and structure providing a dual layer silicon gate film having a uniform boron distribution therein and an ordered, uniform grain structure. Rapid thermal annealing is used to cause the diffusion of boron from an originally doped film to an originally undoped film, resulting in a uniform boron distribution within the structure, thereby rendering the structure resistant to vertical and lateral diffusion of the boron during subsequent processing at elevated temperatures.
摘要翻译：提供其中具有均匀硼分布的双层硅栅极膜和有序的均匀晶粒结构的方法和结构。使用快速热退火来使硼从原始掺杂的膜扩散到最初未掺杂的膜，导致在结构内形成均匀的硼分布，从而使结构在随后的高温处理期间对硼的垂直和横向扩散具有抗性温度。

3. 发明授权

US5950096A Process for improving device yield in integrated circuit fabrication 失效
标题翻译：在集成电路制造中提高器件产量的工艺
公开(公告)号：US5950096A
公开(公告)日：1999-09-07
申请号：US935362
申请日：1997-09-22
申请人： Robert Y.S. Huang , David Kou-Fong Hwang , Stephen Carl Kuehne , Jean Ling Lee , Jane Qian Liu , Yi Ma , Minseok Oh
发明人： Robert Y.S. Huang , David Kou-Fong Hwang , Stephen Carl Kuehne , Jean Ling Lee , Jane Qian Liu , Yi Ma , Minseok Oh
IPC分类号： H01L21/762 , H01L21/76
CPC分类号： H01L21/76202
摘要： In the fabrication of an integrated circuit, undesirable bird's beak pull back due to damage caused during ion implantation is alleviated by means of rapid thermal annealing step prior to chemical etching.
摘要翻译：在集成电路的制造中，由化学蚀刻之前的快速热退火步骤减轻了离子注入过程中造成的损坏引起的不希望有的鸟喙拉回。

4. 发明授权

US6146975A Shallow trench isolation 失效
标题翻译：浅沟隔离
公开(公告)号：US6146975A
公开(公告)日：2000-11-14
申请号：US113583
申请日：1998-07-10
申请人： Stephen Carl Kuehne , Alvaro Maury
发明人： Stephen Carl Kuehne , Alvaro Maury
IPC分类号： H01L21/762 , H01L21/76 , H01L29/00
CPC分类号： H01L21/76229
摘要： The specification describes a dual patterned polish stop layer technique for shallow trench isolation. The shallow trenches are formed by etching trenches in a semiconductor substrate wafer, backfilling with oxide, and polishing by chemical-mechanical polishing (CMP) to produce a planar, trench isolated, wafer. To ensure planarity of the wafer after CMP, and avoid dishing of the field oxide, a dual silicon nitride polish stop layer is used. The first polish stop layer is applied selectively to protect the active device regions, and the second polish stop layer is applied selectively to protect the field oxide regions.
摘要翻译：该说明书描述了用于浅沟槽隔离的双重图案化抛光停止层技术。浅沟槽通过蚀刻半导体衬底晶片中的沟槽，用氧化物回填和通过化学机械抛光（CMP）进行抛光来形成，以产生平面的，沟槽隔离的晶片。为了确保CMP之后的晶片的平面度，并且避免场氧化物的凹陷，则使用双重氮化硅抛光停止层。选择性地施加第一抛光停止层以保护有源器件区域，并且选择性地施加第二抛光停止层以保护场氧化物区域。

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