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1. 发明申请

US20090147440A1 LOW INDUCTANCE, HIGH RATING CAPACITOR DEVICES 审中-公开
标题翻译：低电感，高额定电容器件
公开(公告)号：US20090147440A1
公开(公告)日：2009-06-11
申请号：US12329129
申请日：2008-12-05
申请人： Stanley P. Cygan , Andrew P. Ritter , John L. Galvagni
发明人： Stanley P. Cygan , Andrew P. Ritter , John L. Galvagni
IPC分类号： H01G4/228
CPC分类号： H01G4/232 , H01G4/38 , H05K1/0231 , H05K3/3426 , H05K2201/10515 , H05K2201/1053 , H05K2201/10636 , Y02P70/611 , Y10T29/43
摘要： Methodologies and structures are disclosed for providing multilayer electronic devices having low inductance and high ratings, such as for capacitor devices for uses involving faster pulsing and higher currents. Plural layer devices are constructed for relatively lowered inductance by relatively altering typical orientation of capacitors such that their electrodes are placed into a vertical position relative to an associated circuit board. Optionally, individual leads may be formed so that the resulting structure can be used as an array. Internal electrodes may be arranged for reducing current loops for associated circuits on a circuit board, to correspondingly reduce the associated inductance of the circuit board mounted device. Leads associated with such devices may have added tab-like structures which serve to more precisely place the lead, to improve the lead to capacitor strength, and to promote lower resistance and inductance. Disclosed designs for reducing associated inductance may be practiced in conjunction with various electric devices, including capacitors, resistors, inductors, or varistors.
摘要翻译：公开了用于提供具有低电感和高额定值的多层电子器件的方法和结构，例如用于涉及更快脉冲和较高电流的用途的电容器器件。通过相对地改变电容器的典型取向使得它们的电极相对于相关联的电路板被放置在垂直位置，多层器件被构造用于相对降低的电感。可选地，可以形成各个引线，使得所得到的结构可以用作阵列。可以布置内部电极以减少用于电路板上的相关电路的电流回路，以相应地减小电路板安装的装置的相关电感。与这种装置相关联的引线可以具有附加的片状结构，其用于更精确地放置引线，以改善导致电容器强度，并且促进较低的电阻和电感。用于减小相关电感的公开的设计可以结合包括电容器，电阻器，电感器或变阻器的各种电气设备来实施。

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