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1. 发明授权

US07202648B2 Fully integrated DC-to-DC regulator utilizing on-chip inductors with high frequency magnetic materials 有权
标题翻译：采用高频磁性材料的片上电感器完全集成的DC-DC调节器
公开(公告)号：US07202648B2
公开(公告)日：2007-04-10
申请号：US10430627
申请日：2003-05-05
申请人： Donald S. Gardner , Volkan Kursun , Siva Narendra
发明人： Donald S. Gardner , Volkan Kursun , Siva Narendra
IPC分类号： G05F1/40 , H01L29/00
CPC分类号： H01L28/10 , G06F1/26 , G06F1/32 , H01L23/5227 , H01L2924/0002 , H02M3/156 , H01L2924/00
摘要： An fully integrated DC-to-DC switching converter having an inductor, where the inductor has magnetic material that may be amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys. The magnetic material allows for a relatively high switching frequency. In one embodiment, the inductor has two sub-structures, where each of the two sub-structures are parallel to each other and each includes a conductor having upper and lower portions. The conductors of the two sub-structures are electrically connected to each other, and the upper and lower portions are arranged so that magnetic flux from one of the sub-structures couples with the magnetic flux from the other sub-structure so as to provide a relatively high inductance with small form factor. In another embodiment, the inductor is a simple conductor surrounded by high-frequency magnetic material. In both structures, oxide insulates the conductors from the magnetic material.
摘要翻译：具有电感器的完全集成的DC-DC开关转换器，其中电感器具有可以是无定形CoZrTa，CoFeHfO，CoAlO，FeSiO，CoFeAlO，CoNbTa，CoZr和其它非晶态钴合金的磁性材料。磁性材料允许相对较高的开关频率。在一个实施例中，电感器具有两个子结构，其中两个子结构中的每一个彼此平行并且每个包括具有上部和下部的导体。两个子结构的导体彼此电连接，并且上部和下部布置成使得来自一个子结构的磁通与来自另一个子结构的磁通耦合，从而提供电感较小，体积小。在另一个实施例中，电感器是由高频磁性材料包围的简单导体。在这两种结构中，氧化物绝缘导体与磁性材料。

2. 发明申请

US20060164157A1 Bias generator for body bias 有权
标题翻译：偏置发生器用于身体偏倚
公开(公告)号：US20060164157A1
公开(公告)日：2006-07-27
申请号：US11038134
申请日：2005-01-21
申请人： James Tschanz , Stephen Tang , Victor Zia , Badarinath Kommandur , Siva Narendra , Vivek De
发明人： James Tschanz , Stephen Tang , Victor Zia , Badarinath Kommandur , Siva Narendra , Vivek De
IPC分类号： H01L29/861
CPC分类号： G05F3/205
摘要： A bias generator unit is provided that includes a central bias generator to provide a bias voltage, a local bias generator to receive the bias voltage and a reference voltage and to provide a forward body bias signal or a reverse body bias signal. The bias generator may include a charge pump to output (or provide) a reference voltage to a reference generator, which in turn provides reference signals to the central bias generator. As a result, the local bias generator may control the body bias signal provided by the local bias generator.
摘要翻译：提供偏置发生器单元，其包括中心偏置发生器以提供偏置电压，局部偏置发生器以接收偏置电压和参考电压，并提供正向偏置信号或反向偏置信号。偏置发生器可以包括电荷泵以将参考电压输出（或提供）到参考发生器，基准电压器又向中心偏置发生器提供参考信号。结果，本地偏置发生器可以控制由局部偏置发生器提供的体偏置信号。

3. 发明申请

US20060066407A1 Amplification gain stages having replica stages for DC bias control 失效
标题翻译：具有用于DC偏置控制的复制级的放大增益级
公开(公告)号：US20060066407A1
公开(公告)日：2006-03-30
申请号：US10953178
申请日：2004-09-30
申请人： Siva Narendra , Vivek De
发明人： Siva Narendra , Vivek De
IPC分类号： H03F3/04
CPC分类号： H03F1/301 , H03F2200/453
摘要： An amplification apparatus is provided that includes a plurality of gain stages including a first gain stage having first and second transistors and a second gain stage having third and fourth transistors. A plurality of replica stages may also be provided that includes a first replica stage and a second replica stage. Each replica stage may correspond/match one of the plurality of gain stages. An amplifying device may be provided to adjust a body potential of at least the first transistor of the first gain based on an output of the first replica stage and an output of the second replica stage.
摘要翻译：提供一种放大装置，其包括多个增益级，包括具有第一和第二晶体管的第一增益级和具有第三和第四晶体管的第二增益级。还可以提供多个复制阶段，其包括第一复制阶段和第二复制阶段。每个复制阶段可以对应/匹配多个增益级中的一个。可以提供放大装置，用于基于第一副本级的输出和第二副本级的输出来调整至少第一增益的第一晶体管的体电位。

4. 发明申请

US20060066376A1 Frequency management apparatus, systems, and methods 有权
标题翻译：频率管理装置，系统和方法
公开(公告)号：US20060066376A1
公开(公告)日：2006-03-30
申请号：US10953199
申请日：2004-09-28
申请人： Siva Narendra , James Tschanz , Vivek De , Nasser Kurd , Javed Barkatullah
发明人： Siva Narendra , James Tschanz , Vivek De , Nasser Kurd , Javed Barkatullah
IPC分类号： G06F1/04
CPC分类号： G06F1/324 , G06F1/06 , G06F1/206 , G06F1/3203 , Y02D10/126
摘要： Apparatus and systems, as well as methods and articles, may operate to select a microprocessor clock frequency responsive to a desired voltage and/or a desired temperature of operation.
摘要翻译：装置和系统以及方法和物品可以操作以响应于期望电压和/或期望的操作温度来选择微处理器时钟频率。

5. 发明申请

US20050269402A1 System and method for securing financial transactions 审中-公开
标题翻译：确保金融交易的制度和方法
公开(公告)号：US20050269402A1
公开(公告)日：2005-12-08
申请号：US11144363
申请日：2005-06-03
申请人： Thomas Spitzer , Prabhakar Tadepalli , Siva Narendra
发明人： Thomas Spitzer , Prabhakar Tadepalli , Siva Narendra
IPC分类号： G06F1/00 , G06F21/00 , G06K5/00 , G06K7/08 , G06Q20/00 , G07F7/10
CPC分类号： G07F7/1008 , G06Q20/04 , G06Q20/20 , G06Q20/32 , G06Q20/327 , G06Q20/341 , G06Q20/3572 , G06Q20/385 , G06Q20/4014 , G07F7/0886
摘要： A financial transaction system utilizes multi-factor authentication to secure financial transactions.
摘要翻译：金融交易系统利用多因素认证来确保金融交易。

6. 发明申请

US20050219784A1 System and method for extracting energy from an ultracapacitor 有权
标题翻译：从超级电容器中提取能量的系统和方法
公开(公告)号：US20050219784A1
公开(公告)日：2005-10-06
申请号：US10811806
申请日：2004-03-30
申请人： Siva Narendra , Shekhar Borkar
发明人： Siva Narendra , Shekhar Borkar
IPC分类号： H01G9/14 , H01H9/00 , H01L23/522 , H02J7/00
CPC分类号： H01G9/14 , H01C3/20 , H01L23/5222 , H01L2924/0002 , H02J7/0065 , Y02E60/13 , H01L2924/00
摘要： An extraction system detects a voltage stored in a capacitor and then extracts energy from the capacitor when the voltage falls below a predetermined value. The capacitor may be an ultracapacitor formed in silicon or another semiconductor material, and the predetermined value may equal or be based on a minimum operating voltage of a load driven by the ultracapacitor. Once the energy is extracted, the system converts the energy into a voltage sufficient to continue driving the load. Energy extraction may be performed by a variety of circuits including a linear regulator, a switched capacitor voltage converter, an adiabatic amplifier, and a DC-to-DC boost converter. The system may further include a monitoring circuit which detects dynamic changes in the converted ultracapacitor voltage over to maintain the operating voltage of the load.
摘要翻译：提取系统检测存储在电容器中的电压，然后当电压降到预定值以下时从电容器中提取能量。电容器可以是在硅或另一种半导体材料中形成的超级电容器，并且预定值可以等于或基于由超级电容器驱动的负载的最小工作电压。一旦提取能量，系统将能量转换成足以继续驱动负载的电压。可以通过包括线性调节器，开关电容器电压转换器，绝热放大器和DC-DC升压转换器的各种电路来执行能量提取。该系统还可以包括监测电路，其检测转换的超级电容器电压的动态变化以维持负载的工作电压。

7. 发明申请

US20070260848A1 Power mangement integrated circuit 有权
标题翻译：电力管理集成电路
公开(公告)号：US20070260848A1
公开(公告)日：2007-11-08
申请号：US11825252
申请日：2007-07-03
申请人： Siva Narendra , James Tschanz , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
发明人： Siva Narendra , James Tschanz , Howard Wilson , Donald Gardner , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Nitin Borkar , Vivek De , Shekhar Borkar
IPC分类号： G06F15/00 , H01L21/50 , H01L23/34
CPC分类号： H01L25/0657 , H01L25/18 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16145 , H01L2224/16227 , H01L2225/06513 , H01L2225/06527 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
摘要翻译：公开了一种集成电路（IC）封装。 IC封装包括第一裸片; 以及以三维封装布局结合到CPU管芯的第二管芯。

8. 发明申请

US20070024322A1 Leakage current reduction scheme for domino circuits 审中-公开
标题翻译：多米诺骨电路泄漏电流削减方案
公开(公告)号：US20070024322A1
公开(公告)日：2007-02-01
申请号：US11194946
申请日：2005-08-01
申请人： Yibin Ye , Siva Narendra , Vivek De
发明人： Yibin Ye , Siva Narendra , Vivek De
IPC分类号： H03K19/096
CPC分类号： H03K19/0016
摘要： A method and system for leakage current reduction in domino circuits is described. The system includes a domino circuit with a dynamic gate, a static gate, and a standby signal to set the domino circuit to an evaluate phase during an inactive mode. The inputs to the static gate are set to low and the inputs to the dynamic gate are set to high during the inactive mode. The standby signal may be an input to a device in the dynamic gate or an input to a latch coupled to the dynamic gate.
摘要翻译：描述了多米诺骨电路中泄漏电流降低的方法和系统。该系统包括具有动态门，静态门和备用信号的多米诺骨牌电路，以在非活动模式期间将多米诺骨牌电路设置为评估阶段。静态门的输入被设置为低电平，并且在非活动模式期间将动态门的输入设置为高电平。备用信号可以是对动态门中的设备的输入或耦合到动态门的锁存器的输入。

9. 发明申请

US20060226863A1 Method and apparatus to adjust die frequency 审中-公开
标题翻译：调整芯片频率的方法和装置
公开(公告)号：US20060226863A1
公开(公告)日：2006-10-12
申请号：US11094574
申请日：2005-03-31
申请人： Siva Narendra , James Tschanz , Victor Zia , Badarinath Kommandur , Tawfik Arabi , Grant McFarland , Vivek De
发明人： Siva Narendra , James Tschanz , Victor Zia , Badarinath Kommandur , Tawfik Arabi , Grant McFarland , Vivek De
IPC分类号： G01R31/26
CPC分类号： G01R31/2882 , G01R31/2879
摘要： A method and apparatus are provided for adjusting a frequency of a die. This may include measuring characteristics of a die at various combinations of power supply voltage, body bias voltage and/or temperature and determining operating characteristics, such as power supply voltage and body bias voltage, based on the measured characteristics.
摘要翻译：提供了一种用于调整管芯频率的方法和装置。这可以包括基于所测量的特性，在电源电压，体偏置电压和/或温度的各种组合下测量管芯的特性，并确定诸如电源电压和体偏置电压的操作特性。

10. 发明申请

US20060132218A1 Body biasing methods and circuits 审中-公开
标题翻译：车身偏置方式和电路
公开(公告)号：US20060132218A1
公开(公告)日：2006-06-22
申请号：US11018016
申请日：2004-12-20
申请人： James Tschanz , Siva Narendra , Vivek De
发明人： James Tschanz , Siva Narendra , Vivek De
IPC分类号： H03K3/01
CPC分类号： G05F3/205 , H03K2217/0018
摘要： In some embodiments, a chip is provided that comprises a group of transistors and a body bias generator. The group of transistors is coupled to the body bias generator. The body bias generator is configured to body bias the transistors at a level based on one or more measured parameters associated with the chip and on an operating mode. Other embodiments are disclosed herein and/or are otherwise claimed.
摘要翻译：在一些实施例中，提供了包括一组晶体管和体偏置发生器的芯片。晶体管组耦合到体偏置发生器。身体偏置发生器被配置为基于与芯片相关联的一个或多个测量参数和在操作模式上将晶体管偏置在一个电平上。其他实施方案在此公开和/或以其他方式要求保护。

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