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    • 3. 发明申请
    • PACKAGE OF ENVIRONMENTAL SENSITIVE ELECTRONIC ELEMENT
    • 环境敏感电子元件包装
    • US20130126932A1
    • 2013-05-23
    • US13354298
    • 2012-01-19
    • Kuang-Jung ChenJian-Lin WuShu-Tang Yeh
    • Kuang-Jung ChenJian-Lin WuShu-Tang Yeh
    • H01L33/56
    • H01L51/5256
    • A package of an environmental sensitive electronic element including a first substrate, a second substrate, an environmental sensitive electronic element, a flexible structure layer and a filler layer is provided. The environmental sensitive electronic element is disposed on the first substrate and located between the first substrate and the second substrate. The environmental sensitive electronic element includes an anode layer, a hole injecting layer, a hole transporting layer, an organic light emitting layer, a cathode layer and an electron injection layer. The flexible structure layer is disposed on the environmental sensitive electronic element and includes a soft layer, a trapping layer and a protective layer. The material of the trapping layer is the same as the material of the electron injection layer. The filler layer is disposed between the first substrate and the second substrate and encapsulates the environmental sensitive electronic element and the flexible structure layer.
    • 提供一种包括第一基板,第二基板,环境敏感电子元件,柔性结构层和填充层的环境敏感电子元件的封装。 环境敏感电子元件设置在第一基板上并且位于第一基板和第二基板之间。 环境敏感电子元件包括阳极层,空穴注入层,空穴传输层,有机发光层,阴极层和电子注入层。 柔性结构层设置在环境敏感电子元件上,并且包括软层,捕获层和保护层。 捕获层的材料与电子注入层的材料相同。 填充层设置在第一基板和第二基板之间,并且封装环境敏感的电子元件和柔性结构层。
    • 7. 发明授权
    • Method for fabricating isolation structures for flash memory semiconductor devices
    • 闪存半导体器件隔离结构的制造方法
    • US07427552B2
    • 2008-09-23
    • US11556131
    • 2006-11-02
    • Da JinShu Shu TangZuo Ya Yang
    • Da JinShu Shu TangZuo Ya Yang
    • H01L21/76
    • H01L27/115H01L27/11521
    • A method for fabricating integrated circuit devices, e.g., Flash memory devices, embedded Flash memory devices. The method includes providing a semiconductor substrate, e.g., silicon, silicon on insulator, epitaxial silicon. In a specific embodiment, the semiconductor substrate has a peripheral region and a cell region. The method includes forming a first dielectric layer (e.g., silicon dioxide) having a first thickness overlying a cell region and a second dielectric layer (e.g., silicon dixode) having a second thickness overlying the peripheral region. In a specific embodiment, the cell region is for Flash memory devices and/or other like structures. The method forms a pad oxide layer overlying the first dielectric layer and forms a nitride layer overlying the pad oxide layer. The method includes patterning at least the nitride layer to expose a first trench region in the peripheral region and to expose a second trench region in the cell region, while a portion of the first dielectric layer having the first thickness in the cell region is maintained. The method includes forming a first trench structure having a first depth in the first trench region, while the portion of the first dielectric layer having the first thickness in the cell region protects the second trench region. The method includes removing the portion of the first dielectric layer to expose the second trench region. In a specific embodiment, the method includes subjecting the first trench region, including the first trench structure, and the second trench region with an etching process to continue to form the first trench structure from the first depth to a second depth and to form a second trench structure having a third depth within the second trench region. In the third depth is less than the second depth.
    • 集成电路器件的制造方法,例如闪存器件,嵌入式闪存器件。 该方法包括提供半导体衬底,例如硅,绝缘体上的硅,外延硅。 在具体实施例中,半导体衬底具有周边区域和单元区域。 该方法包括形成具有覆盖在单元区域上的第一厚度的第一介电层(例如二氧化硅)和覆盖周边区域的第二厚度的第二介电层(例如硅二极管)。 在特定实施例中,单元区域用于闪速存储器件和/或其它类似结构。 该方法形成覆盖在第一介电层上的衬垫氧化层,并形成覆盖衬垫氧化物层的氮化物层。 该方法包括图案化至少该氮化物层以露出外围区域中的第一沟槽区域并露出该单元区域中的第二沟槽区域,同时保持该单元区域中具有第一厚度的第一介电层的一部分。 该方法包括在第一沟槽区域中形成具有第一深度的第一沟槽结构,而在单元区域中具有第一厚度的第一介电层的部分保护第二沟槽区。 该方法包括移除第一电介质层的部分以暴露第二沟槽区域。 在一个具体实施例中,该方法包括用蚀刻工艺对包括第一沟槽结构的第一沟槽区域和第二沟槽区域进行处理,以继续从第一深度到第二深度形成第一沟槽结构,并形成第二沟槽区域 沟槽结构在第二沟槽区域内具有第三深度。 在第三深度小于第二深度。
    • 9. 发明授权
    • Package of environmental sensitive electronic element
    • 环保敏感电子元件包装
    • US09142798B2
    • 2015-09-22
    • US13354298
    • 2012-01-19
    • Kuang-Jung ChenJian-Lin WuShu-Tang Yeh
    • Kuang-Jung ChenJian-Lin WuShu-Tang Yeh
    • H01L33/56H01L51/52
    • H01L51/5256
    • A package of an environmental sensitive electronic element including a first substrate, a second substrate, an environmental sensitive electronic element, a flexible structure layer and a filler layer is provided. The environmental sensitive electronic element is disposed on the first substrate and located between the first substrate and the second substrate. The environmental sensitive electronic element includes an anode layer, a hole injecting layer, a hole transporting layer, an organic light emitting layer, a cathode layer and an electron injection layer. The flexible structure layer is disposed on the environmental sensitive electronic element and includes a soft layer, a trapping layer and a protective layer. The material of the trapping layer is the same as the material of the electron injection layer. The filler layer is disposed between the first substrate and the second substrate and encapsulates the environmental sensitive electronic element and the flexible structure layer.
    • 提供一种包括第一基板,第二基板,环境敏感电子元件,柔性结构层和填充层的环境敏感电子元件的封装。 环境敏感电子元件设置在第一基板上并且位于第一基板和第二基板之间。 环境敏感电子元件包括阳极层,空穴注入层,空穴传输层,有机发光层,阴极层和电子注入层。 柔性结构层设置在环境敏感电子元件上,并且包括软层,捕获层和保护层。 捕获层的材料与电子注入层的材料相同。 填充层设置在第一基板和第二基板之间,并且封装环境敏感的电子元件和柔性结构层。