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1. 发明授权

US5477966A Packing box for lead terminal type semiconductor product 失效
标题翻译：引线端子型半导体产品包装盒
公开(公告)号：US5477966A
公开(公告)日：1995-12-26
申请号：US263352
申请日：1994-06-21
申请人： Shogo Ogawa
发明人： Shogo Ogawa
IPC分类号： B65D25/10 , B65D85/00 , B65D85/86 , H01L21/673 , H05K9/00 , H05K13/00 , B65D73/02
CPC分类号： H05K13/0084 , H05K9/0067
摘要： A packing device for semiconductor devices with lead terminals includes a packing box, partitions for separating a space in the packing box, and a cover. A conductive sponge used as a cushioned packing material is attached to the back surface of the cover. The semiconductor devices are placed in the packing box 3 with the lead terminals 2 facing upwardly. In this packed state, the conductive sponge is pressed against the lead terminals to collectively hold the semiconductor devices securely in the box. Thus, short-circuitting of the lead terminals is made to prevent gate of the semiconductor devices from breaking down as a result of electrostatic voltage.
摘要翻译：具有引线端子的半导体器件的包装装置包括一个包装盒，用于分隔包装盒中空间的隔板和一个盖子。用作缓冲包装材料的导电海绵附着到盖的背面。将半导体器件放置在包装盒3中，引线端子2朝上。在这种打包状态下，导电海绵被压靠在引线端子上，以将半导体器件牢固地固定在盒子中。因此，引起端子的短路是为了防止半导体器件的栅极由于静电电压而分解。

2. 发明授权

US08542420B2 Image reading apparatus, image forming apparatus and method 有权
标题翻译：图像读取装置，图像形成装置及方法
公开(公告)号：US08542420B2
公开(公告)日：2013-09-24
申请号：US13170061
申请日：2011-06-27
申请人： Shogo Ogawa , Yoshio Yoshimura , Tadashi Mokudai
发明人： Shogo Ogawa , Yoshio Yoshimura , Tadashi Mokudai
IPC分类号： H04N1/46 , H04N1/407 , H04N1/04 , H04N1/40 , G03F3/08 , G06K15/00 , G06K1/00 , G06K9/32 , G06F3/12 , G03G15/01 , A61B1/04 , H02P7/285
CPC分类号： H04N1/46 , H04N1/486
摘要： Certain embodiments provide an image reading apparatus including: a monochrome CCD sensor including a first photo-diode array; plural color CCD sensors each including a second photodiode array; an AD converter configured to apply analog-to-digital conversion to each of analog outputs from the second photodiode array and the first photodiode array; a delay processing unit configured to delay at least one of color image data of plural colors from the AD converter and interpolate, with delayed any one or more of the color image data, a blank of image data that is to be read on a line in a sub-scanning direction; and an inter-line correction unit configured to correct, by the intervals and a set reduction magnification, a positional deviation in the sub-scanning direction between the monochrome image data and the color image data, respective timings of which are aligned on the line by the delay processing unit.
摘要翻译：某些实施例提供一种图像读取装置，包括：单色CCD传感器，包括第一光电二极管阵列; 多个彩色CCD传感器，每个包括第二光电二极管阵列; AD转换器，被配置为对来自第二光电二极管阵列和第一光电二极管阵列的模拟输出进行模数转换; 延迟处理单元，被配置为延迟来自所述AD转换器的多种颜色的彩色图像数据中的至少一种，并且通过延迟所述彩色图像数据中的任何一个或多个来内插，将要在一行中读取的图像数据的空白副扫描方向; 以及行间校正单元，被配置为通过所述间隔和设定的缩小倍率来校正所述单色图像数据和所述彩色图像数据之间的副扫描方向上的位置偏差，其各自的定时在所述行上被排列延迟处理单元。

3. 发明授权

US5599864A Polyarylene sulfide resin composition and optical pick-up parts formed from the same 失效
标题翻译：聚芳硫醚树脂组合物和由其组成的光学拾取部件
公开(公告)号：US5599864A
公开(公告)日：1997-02-04
申请号：US316470
申请日：1994-10-03
申请人： Shogo Ogawa , Hajime Hata , Ikuo Kasuga , Hiromasa Marumo , Masamichi Hayakawa
发明人： Shogo Ogawa , Hajime Hata , Ikuo Kasuga , Hiromasa Marumo , Masamichi Hayakawa
IPC分类号： C08K3/00 , C08K3/38 , C08K7/04 , C08K5/01
CPC分类号： C08K3/38 , C08K3/0033 , C08K7/04
摘要： A polyarylene sulfide resin composition having an excellent fluidability and a good moldability is disclosed. The resin composition is useful as a material for an optical pick-up part which has a high reliability and a high tenacity and does not generate deviation of an optical axis with changes in environmental conditions such as temperature and humidity. The polyarylene sulfide resin composition comprises, as main components, a polyarylene sulfide resin, a fibrous filler and a particulate filler, and, optionally, a silane coupling agent and an alicyclic hydrocarbon.
摘要翻译：公开了具有优异的流动性和良好成型性的聚芳硫醚树脂组合物。该树脂组合物可用作光学拾取部件的材料，其具有高可靠性和高韧性，并且不会随温度和湿度等环境条件的变化而产生光轴的偏差。作为主要成分，聚芳硫醚树脂组合物包括聚芳硫醚树脂，纤维状填料和颗粒填料，以及任选的硅烷偶联剂和脂环族烃。

4. 发明申请

US20140169054A1 SEMICONDUCTOR MODULE, UPPER AND LOWER ARM KIT, AND THREE-LEVEL INVERTER 有权
标题翻译：半导体模块，上位机和下位机，三电平逆变器
公开(公告)号：US20140169054A1
公开(公告)日：2014-06-19
申请号：US14124871
申请日：2012-06-06
申请人： Shogo Ogawa
发明人： Shogo Ogawa
IPC分类号： H02M7/5387 , H03K17/56
CPC分类号： H02M7/537 , H01L25/072 , H01L25/115 , H01L25/18 , H01L29/7393 , H01L29/861 , H01L2224/0603 , H01L2224/48139 , H01L2224/49111 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19107 , H02M7/003 , H02M7/487 , H02M7/5387 , H03K17/56 , H01L2924/00
摘要： A semiconductor module, an upper and lower arm kit, and a three-level inverter can be provided with low cost and broad current ratings and voltage ratings using existing packages, without developing new packages.A first semiconductor module (100) on an upper arm side and a second semiconductor module (200) on a lower arm side are formed using an existing package, and the semiconductor modules (100) and (200) are used to configure an upper and lower arm kit (300). Further, the upper and lower arm kit (300) is used to configure a three-level inverter (500). These devices can be formed using existing packages (56), and semiconductor modules (100), (200), an upper and lower arm kit (300), and a three-level inverter (500) can be therefore provided with low cost and broad current ratings and voltage ratings.
摘要翻译：半导体模块，上下臂套件和三电平逆变器可以使用现有封装提供低成本和宽电流额定值和额定电压，而不需要开发新的封装。使用现有的封装形成上臂侧的第一半导体模块（100）和下臂侧的第二半导体模块（200），并且半导体模块（100）和（200）用于构成上部和下部下臂套件（300）。此外，上下臂组件（300）用于构成三电平逆变器（500）。这些装置可以使用现有的封装（56）形成，因此可以以低成本提供半导体模块（100），（200），上下臂套件（300）和三电平逆变器（500）宽电流额定值和额定电压。

5. 发明申请

US20120002254A1 IMAGE READING APPARATUS, IMAGE FORMING APPARATUS AND METHOD 有权
标题翻译：图像读取装置，图像形成装置和方法
公开(公告)号：US20120002254A1
公开(公告)日：2012-01-05
申请号：US13170061
申请日：2011-06-27
申请人： Shogo Ogawa , Yoshio Yoshimura , Tadashi Mokudai
发明人： Shogo Ogawa , Yoshio Yoshimura , Tadashi Mokudai
IPC分类号： H04N1/46
CPC分类号： H04N1/46 , H04N1/486
摘要： Certain embodiments provide an image reading apparatus including: a monochrome CCD sensor including a first photo-diode array; plural color CCD sensors each including a second photodiode array; an AD converter configured to apply analog-to-digital conversion to each of analog outputs from the second photodiode array and the first photodiode array; a delay processing unit configured to delay at least one of color image data of plural colors from the AD converter and interpolate, with delayed any one or more of the color image data, a blank of image data that is to be read on a line in a sub-scanning direction; and an inter-line correction unit configured to correct, by the intervals and a set reduction magnification, a positional deviation in the sub-scanning direction between the monochrome image data and the color image data, respective timings of which are aligned on the line by the delay processing unit.
摘要翻译：某些实施例提供一种图像读取装置，包括：单色CCD传感器，包括第一光电二极管阵列; 多个彩色CCD传感器，每个包括第二光电二极管阵列; AD转换器，被配置为对来自第二光电二极管阵列和第一光电二极管阵列的模拟输出进行模数转换; 延迟处理单元，被配置为延迟来自所述AD转换器的多种颜色的彩色图像数据中的至少一种，并且通过延迟所述彩色图像数据中的任何一个或多个来内插，将要在一行中读取的图像数据的空白副扫描方向; 以及行间校正单元，被配置为通过所述间隔和设定的缩小倍率来校正所述单色图像数据和所述彩色图像数据之间的副扫描方向上的位置偏差，其各自的定时在所述行上被排列延迟处理单元。

6. 发明授权

US09685888B2 Semiconductor module, upper and lower arm kit, and three-level inverter 有权
公开(公告)号：US09685888B2
公开(公告)日：2017-06-20
申请号：US14124871
申请日：2012-06-06
申请人： Shogo Ogawa
发明人： Shogo Ogawa
IPC分类号： H02M7/5387 , H01L25/18 , H02M7/00 , H02M7/487 , H03K17/56 , H01L25/07
CPC分类号： H02M7/537 , H01L25/072 , H01L25/115 , H01L25/18 , H01L29/7393 , H01L29/861 , H01L2224/0603 , H01L2224/48139 , H01L2224/49111 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19107 , H02M7/003 , H02M7/487 , H02M7/5387 , H03K17/56 , H01L2924/00
摘要： A semiconductor module, an upper and lower arm kit, and a three-level inverter can be provided at low cost and with broad current ratings and voltage ratings using existing packages, without developing new packages. A first semiconductor module (100) on an upper arm side and a second semiconductor module (200) on a lower arm side are made using an existing package, and the semiconductor modules (100) and (200) are used to configure an upper and lower arm kit (300). Further, the upper and lower arm kit (300) is used to configure a three-level inverter (500). These devices can be formed using existing packages (56), and semiconductor modules (100), (200), the upper and lower arm kit (300), and the three-level inverter (500) can be therefore provided at low cost and with broad current ratings and voltage ratings.

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