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1. 发明授权

US08965996B2 Communication apparatus, information processing apparatus, and method for controlling communication apparatus 有权
标题翻译：通信装置，信息处理装置和控制通信装置的方法
公开(公告)号：US08965996B2
公开(公告)日：2015-02-24
申请号：US13007288
申请日：2011-01-14
申请人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
发明人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
IPC分类号： G06F15/167 , G06F15/16 , G06F9/54 , H04L29/08
CPC分类号： G06F9/544 , H04L67/1097
摘要： A communication apparatus including: a receiving portion that receives alignment specifying information, the alignment specifying information indicating which of main memories included in a first information processing apparatus and a second information processing apparatus to align the requested data; a division location calculating portion that calculates a divisional location of the requested data so that the divisional location of the requested data becomes an alignment boundary on the main memory included in any one of the first and the second information processing apparatuses specified by the received alignment specifying information, the alignment boundary being integral multiples of a given data width; and a transmitting portion that divides the requested data stored into the main memory in the second information processing apparatus based on the calculated divisional location, and transmits the divided data to the first information processing apparatus.
摘要翻译：一种通信装置，包括：接收对准指定信息的接收部分，指示包括在第一信息处理设备中的主存储器中的哪个存储器和对准所请求的数据的第二信息处理设备的对准指定信息; 分割位置计算部分，其计算所请求数据的分割位置，使得所请求数据的分割位置变为在由所接收的对准指定指定的第一和第二信息处理设备中的任一个中包括的主存储器上的对准边界信息，对齐边界是给定数据宽度的整数倍; 以及发送部，其基于所计算的分割位置，将存储在第二信息处理装置中的主存储器中的请求数据分割，并将分割后的数据发送到第一信息处理装置。

2. 发明授权

US08725879B2 Network interface device 有权
标题翻译：网络接口设备
公开(公告)号：US08725879B2
公开(公告)日：2014-05-13
申请号：US12699392
申请日：2010-02-03
申请人： Yuichiro Ajima , Tomohiro Inoue , Shinya Hiramoto
发明人： Yuichiro Ajima , Tomohiro Inoue , Shinya Hiramoto
IPC分类号： G06F15/16 , H04L29/08
CPC分类号： H04L67/14 , H04L67/142 , H04L69/161 , H04L69/162
摘要： A network interface device is provided. The network interface device is connected to a computer and performs communications via a network includes a first management unit that identifies a communication connection by a port number, and manages a communication connection state of each port by a context that is stored in a storage unit and is associated with a port number, a second management unit that manages a storage state of the context, and a control unit that refers to the context, and performs an exemplary operation to establish a communication connection and an exemplary operation to cut off a communication connection between ports.
摘要翻译：提供网络接口设备。网络接口设备连接到计算机并且经由网络执行通信包括通过端口号识别通信连接的第一管理单元，并且通过存储在存储单元中的上下文管理每个端口的通信连接状态，以及与端口号相关联，管理上下文的存储状态的第二管理单元，以及参考上下文的控制单元，并且执行建立通信连接的示例性操作和用于切断通信连接的示例性操作在端口之间。

3. 发明授权

US08572615B2 Parallel computing system, synchronization device, and control method of parallel computing system 有权
标题翻译：并行计算系统，同步装置和并行计算系统的控制方法
公开(公告)号：US08572615B2
公开(公告)日：2013-10-29
申请号：US13325152
申请日：2011-12-14
申请人： Tomohiro Inoue , Yuichiro Ajima , Shinya Hiramoto
发明人： Tomohiro Inoue , Yuichiro Ajima , Shinya Hiramoto
IPC分类号： G06F9/46
CPC分类号： G06F15/17325 , G06F9/522
摘要： A synchronization device includes a receiver that receives data from at least two synchronization devices establishing synchronization, and extracts synchronization information and register selection information from the received data, a transmitter that transmits data to each of the at least two synchronization devices establishing synchronization among a plurality of synchronization devices, a first and a second receiving state register that each stores the extracted synchronization information, a second receiving state register that stores the extracted synchronization information, and a controller that stores the extracted synchronization information into the first receiving state register and the second receiving state register alternately based on the register selection information, and controls the transmitter to transmit data including the register selection information to each of the at least two synchronization devices when the extracted synchronization information is completed in one of the first and the second receiving state register.
摘要翻译：同步装置包括从至少两个建立同步的同步装置接收数据的接收机，并从接收到的数据中提取同步信息和寄存器选择信息;向多个同步装置中的至少两个同步装置中的每一个发送数据的发送器，的同步装置，分别存储所提取的同步信息的第一和第二接收状态寄存器，存储所提取的同步信息的第二接收状态寄存器，以及将所提取的同步信息存储到第一接收状态寄存器中的控制器，基于寄存器选择信息交替地接收状态寄存器，并且当所提取的同步信息完成时，控制发送器将包括寄存器选择信息的数据发送到至少两个同步设备中的每一个在第一和第二接收状态寄存器之一中。

4. 发明申请

US20120060019A1 REDUCTION OPERATION DEVICE, A PROCESSOR, AND A COMPUTER SYSTEM 有权
标题翻译：还原操作装置，处理器和计算机系统
公开(公告)号：US20120060019A1
公开(公告)日：2012-03-08
申请号：US13166114
申请日：2011-06-22
申请人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
发明人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
IPC分类号： G06F9/302
CPC分类号： G06F9/522 , G06F9/30
摘要： A reduction operation device detects a non-correspondence of an operation type or a data type in a reduction arithmetic operation of a parallel processing. The reduction operation device is inputted a plurality of the synchronization signals and data, sets each transmission destinations of the plurality of inputted synchronization signals and the plurality of data corresponding to a next stage of a reduction operation and executes the reduction operation. The synchronization unit in the reduction operation device detects the non-correspondence between the operation type or the data type included in an instruction of the reduction operation after the synchronization is established and controls the arithmetic operation of the arithmetic unit.
摘要翻译：还原操作装置在并行处理的缩小算术运算中检测操作类型或数据类型的不对应。减速操作装置输入多个同步信号和数据，设定多个输入的同步信号的各个发送目的地以及与下一个减速操作相对应的多个数据，并执行缩小操作。缩小操作装置中的同步单元检测在建立同步之后的缩小操作的指令中包括的操作类型或数据类型之间的不对应，并且控制算术单元的算术运算。

5. 发明申请

US20100198998A1 I/O CONTROLLER AND DESCRIPTOR TRANSFER METHOD 有权
标题翻译： I / O控制器和描述符传输方法
公开(公告)号：US20100198998A1
公开(公告)日：2010-08-05
申请号：US12632368
申请日：2009-12-07
申请人： Shinya HIRAMOTO , Yuichiro Ajima , Tomohiro Inoue
发明人： Shinya HIRAMOTO , Yuichiro Ajima , Tomohiro Inoue
IPC分类号： G06F13/28
CPC分类号： G06F13/124
摘要： An I/O controller and method are provided. The I/O controller to which an I/O device can be connected, and instructs the I/O device to execute a process includes a descriptor transfer device that transfers a descriptor indicating contents of a process to be executed, and execution instruction unit that instructs the I/O device to execute the process, based on the descriptor transferred from the descriptor transfer device, wherein the descriptor transfer device includes a memory for storing the descriptor; descriptor reading unit that reads, according to an indication regarding a descriptor read source from a processor, an indicated descriptor from a main memory or said memory which stores the descriptor, and descriptor transfer unit that transfers the read descriptor to the execution instruction unit.
摘要翻译：提供了I / O控制器和方法。可以连接I / O设备并指示I / O设备执行处理的I / O控制器包括传送指示要执行的处理的内容的描述符的描述符传送设备，以及执行指令单元，指示I / O设备基于从描述符传送设备传送的描述符执行该过程，其中描述符传送设备包括用于存储描述符的存储器; 描述符读取单元，根据来自处理器的描述符读取源的指示，从存储描述符的主存储器或所述存储器中指示的描述符以及将读取的描述符传送到执行指令单元的描述符传送单元。

6. 发明授权

US09619300B2 Reduction operation device, a processor, and a computer system 有权
公开(公告)号：US09619300B2
公开(公告)日：2017-04-11
申请号：US13166114
申请日：2011-06-22
申请人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
发明人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
IPC分类号： G06F9/52 , G06F9/30
CPC分类号： G06F9/522 , G06F9/30
摘要： A reduction operation device detects a non-correspondence of an operation type or a data type in a reduction arithmetic operation of a parallel processing. The reduction operation device is inputted a plurality of the synchronization signals and data, sets each transmission destinations of the plurality of inputted synchronization signals and the plurality of data corresponding to a next stage of a reduction operation and executes the reduction operation. The synchronization unit in the reduction operation device detects the non-correspondence between the operation type or the data type included in an instruction of the reduction operation after the synchronization is established and controls the arithmetic operation of the arithmetic unit.

7. 发明申请

US20120250514A1 INFORMATION PROCESSING APPARATUS, PARALLEL COMPUTER SYSTEM, AND CONTROL METHOD OF PARALLEL COMPUTER SYSTEM 有权
标题翻译：信息处理装置，并行计算机系统和并行计算机系统的控制方法
公开(公告)号：US20120250514A1
公开(公告)日：2012-10-04
申请号：US13359635
申请日：2012-01-27
申请人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
发明人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
IPC分类号： H04L12/24
CPC分类号： H04L45/125 , H04L43/0882 , H04L45/121 , H04L45/127 , H04L45/70 , H04L47/115
摘要： An information processing apparatus connected to another information apparatus in a parallel computer system via a plurality of routes, includes: an arithmetic processing device to issue an instruction for collection of congestion information and for communication; a route information holding unit to hold route information for performing communication; a transmission unit to transmit a congestion information collection packet to any of the plurality of routes; a reception unit to receive a congestion information collection response packet corresponding to the congestion information collection packet from any of the plurality of routes; and a control unit to cause the transmission unit to transmit a congestion information collection packet, to select route information from the route information holding unit based on congestion information included in the congestion information collection response packet, and to cause the transmission unit to perform communication instructed by the arithmetic processing device based on the selected route information.
摘要翻译：一种信息处理装置，其通过多条路径与并行计算机系统中的另一信息装置连接，包括：发出用于收集拥塞信息和通信的指令的运算处理装置; 路由信息保持单元，保存用于进行通信的路由信息; 发送单元，向所述多个路由中的任一个发送拥塞信息收集分组; 接收单元，用于从所述多个路由中的任一个接收与所述拥塞信息收集分组相对应的拥塞信息收集响应分组; 以及控制单元，用于使所述发送单元发送拥塞信息收集包，基于所述拥挤信息收集响应包中包含的拥塞信息，从所述路径信息保持单元选择路由信息，并使所述发送单元进行通信指示由算术处理装置基于所选择的路线信息。

8. 发明申请

US20120159121A1 PARALLEL COMPUTER SYSTEM, SYNCHRONIZATION APPARATUS, AND CONTROL METHOD FOR THE PARALLEL COMPUTER SYSTEM 有权
标题翻译：并行计算机系统，同步计算机系统和并行计算机系统的控制方法
公开(公告)号：US20120159121A1
公开(公告)日：2012-06-21
申请号：US13323936
申请日：2011-12-13
申请人： Tomohiro INOUE , Yuichiro Ajima , Shinya Hiramoto
发明人： Tomohiro INOUE , Yuichiro Ajima , Shinya Hiramoto
IPC分类号： G06F15/76 , G06F9/06
CPC分类号： G06F15/17325
摘要： A synchronization apparatus includes a receiver that receives data from a synchronization apparatus of another node that performs synchronization with its own node from among the plurality of synchronization apparatuses and extracts synchronization information from the received data, a transmitter that transmits the data to the synchronization apparatus of the other node, a receiving state register that stores the extracted synchronization information, a delay unit that delays the received data by a specified period of time, and a controller that stores the extracted synchronization information and synchronization information from its own controller in the reception state register and causes the transmitter to transmit the data to the other node and returns the data to its own node back to its own controller via the delay unit when the extracted synchronization information and the synchronization information from its own controller are stored in the reception state register.
摘要翻译：同步装置包括从多个同步装置中与其自身节点进行同步的另一节点的同步装置接收数据的接收机，从接收到的数据中提取同步信息的发送机，发送数据到同步装置的同步装置另一个节点，存储所提取的同步信息的接收状态寄存器，将接收到的数据延迟指定时间段的延迟单元，以及将来自其自身的控制器的所提取的同步信息和同步信息存储在接收状态的控制器注册并使得发送器将数据发送到另一个节点，并且当提取的同步信息和来自其自己的控制器的同步信息被存储在接收状态寄存器中时，经由延迟单元将数据返回到其自己的节点返回到其自己的控制器。

9. 发明申请

US20100124241A1 BARRIER SYNCHRONIZATION APPARATUS, BARRIER SYNCHRONIZATION SYSTEM, AND BARRIER SYNCHRONIZATION METHOD 有权
标题翻译：障碍同步装置，障碍同步系统和障碍同步方法
公开(公告)号：US20100124241A1
公开(公告)日：2010-05-20
申请号：US12582119
申请日：2009-10-20
申请人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
发明人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
IPC分类号： H04J3/06
CPC分类号： G06F9/522 , G06F9/4843
摘要： A barrier synchronization apparatus includes a receiving device which transmits a first synchronization signal to a synchronization device when the first synchronization signal in which a transmission destination is set in advance according to setting conditions including an algorithm of the barrier synchronization and an execution condition is received. A synchronization device synchronizes n first synchronization signals which are set in advance according to the setting conditions, wherein n is a positive integer, and designates transmission of m second synchronization signals in which transmission destinations are set in advance according to the setting conditions after the synchronization is established, wherein m is a positive integer. A transmitting device transmits the second synchronization signals to m transmission destinations set in advance, when a transmission designation information indicating the transmission designation is received from the synchronization device.
摘要翻译：屏障同步装置包括接收装置，当接收到根据包括屏障同步的算法和执行条件的设定条件，预先设定发送目的地的第一同步信号时，向同步装置发送第一同步信号。同步装置根据设定条件同步预先设定的n个第一同步信号，其中n为正整数，并根据同步后的设定条件，指定发送目的地预先设定的m个第二同步信号的发送其中m是正整数。当从同步装置接收到指示发送指定的发送指定信息时，发送装置将第二同步信号发送到预先设定的m个发送目的地。

10. 发明授权

US09143436B2 Information processing apparatus, parallel computer system, and control method of parallel computer system 有权
标题翻译：信息处理装置，并行计算机系统和并行计算机系统的控制方法
公开(公告)号：US09143436B2
公开(公告)日：2015-09-22
申请号：US13359635
申请日：2012-01-27
申请人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
发明人： Shinya Hiramoto , Yuichiro Ajima , Tomohiro Inoue
IPC分类号： H04L12/801 , H04L12/729 , H04L12/727 , H04L12/721 , H04L12/26
CPC分类号： H04L45/125 , H04L43/0882 , H04L45/121 , H04L45/127 , H04L45/70 , H04L47/115
摘要： An information processing apparatus connected to another information apparatus in a parallel computer system via a plurality of routes, includes: an arithmetic processing device to issue an instruction for collection of congestion information and for communication; a route information holding unit to hold route information for performing communication; a transmission unit to transmit a congestion information collection packet to any of the plurality of routes; a reception unit to receive a congestion information collection response packet corresponding to the congestion information collection packet from any of the plurality of routes; and a control unit to cause the transmission unit to transmit a congestion information collection packet, to select route information from the route information holding unit based on congestion information included in the congestion information collection response packet, and to cause the transmission unit to perform communication instructed by the arithmetic processing device based on the selected route information.
摘要翻译：一种信息处理装置，其通过多条路径与并行计算机系统中的另一信息装置连接，包括：发出用于收集拥塞信息和通信的指令的运算处理装置; 路由信息保持单元，保存用于进行通信的路由信息; 发送单元，向所述多个路由中的任一个发送拥塞信息收集分组; 接收单元，用于从所述多个路由中的任一个接收与所述拥塞信息收集分组相对应的拥塞信息收集响应分组; 以及控制单元，用于使所述发送单元发送拥塞信息收集包，基于所述拥挤信息收集响应包中包含的拥塞信息，从所述路径信息保持单元选择路由信息，并使所述发送单元进行通信指示由算术处理装置基于所选择的路线信息。

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