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1. 发明授权

US08003991B2 Silicon carbide MOS field effect transistor with built-in Schottky diode and method for fabrication thereof 有权
标题翻译：具有内置肖特基二极管的碳化硅MOS场效应晶体管及其制造方法
公开(公告)号：US08003991B2
公开(公告)日：2011-08-23
申请号：US12281391
申请日：2006-12-27
申请人： Tsutomu Yatsuo , Shinsuke Harada , Kenji Fukuda , Mitsuo Okamoto
发明人： Tsutomu Yatsuo , Shinsuke Harada , Kenji Fukuda , Mitsuo Okamoto
IPC分类号： H01L29/15
CPC分类号： H01L21/8213 , H01L27/0727 , H01L29/0619 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/7806
摘要： This invention has a cell incorporating a built-in Schottky diode region disposed in at least part of an elementary cell that constitutes an SiC vertical MOSFET provided in a low-density p-type deposit film with a channel region and a base region inverted to an n-type by ion implantation. This built-in Schottky diode region has built therein a Schottky diode of low on-resistance that is formed of a second deficient pan disposed in a high-density gate layer, a second n-type base layer penetrating a low-density p-type deposit layer formed thereon, reaching an n-type drift layer of the second deficient part and attaining its own formation in consequence of inversion of the p-type deposit layer into an n-type by the ion implantation of an n-type impurity from the surface, and a source electrode connected in the manner of forming a Schottky barrier to the surface-exposed part of the second n-type base layer.
摘要翻译：本发明具有一个电池，该电池结合了内置的肖特基二极管区域，该区域设置在构成在具有沟道区域和基极区域的低密度p型沉积膜中提供的SiC垂直MOSFET的基本单元的至少一部分中 n型离子注入。该内置的肖特基二极管区域内置有低导通电阻的肖特基二极管，该二极管由设置在高密度栅极层中的第二缺陷盘形成，第二n型基极层穿透低密度p型沉积层形成在其上，到达第二缺陷部分的n型漂移层，并且由于p型沉积层通过从n型杂质离子注入n型杂质而转变为n型，从而形成其自身的形成表面以及以与第二n型基底层的表面暴露部分形成肖特基势垒的方式连接的源电极。

2. 发明申请

US20110121316A1 SILICON CARBIDE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：硅碳化硅半导体器件
公开(公告)号：US20110121316A1
公开(公告)日：2011-05-26
申请号：US12926166
申请日：2010-10-29
申请人： Shinsuke Harada
发明人： Shinsuke Harada
IPC分类号： H01L29/161
CPC分类号： H01L29/7813 , H01L29/045 , H01L29/0696 , H01L29/1608 , H01L29/41741 , H01L29/41766 , H01L29/4238 , H01L29/66068
摘要： The area of each body region is minimized, and the gate oxide films at the bottoms of the trenches are more effectively protected by depletion layers extending from the body regions.According to the present invention, an n−-type drift layer and a p-type base region are stacked on an n+-type silicon carbide substrate, and an n+-type source region is formed in a predetermined region of a surface portion in the base region. A gate trench is formed in a trench groove that reaches the drift layer. A p-type body region is formed at a deeper location than the gate trench. The p-type body region is adjacent to the gate trench but is not in contact with the gate trench. When viewed from above, the gate trench having a hexagonal shape surrounds the p-type body region. The side faces of the gate trench are formed only by {11-20} planes of silicon carbide.
摘要翻译：每个体区域的面积被最小化，并且沟槽底部的栅极氧化膜被从身体区域延伸的耗尽层更有效地保护。根据本发明，在n +型碳化硅基板上层叠n型漂移层和p型基极区域，在n +型碳化硅基板的表面部分的规定区域形成n +型源极区域基地区。在沟槽中形成栅极沟槽，该槽沟到达漂移层。在比栅极沟槽更深的位置处形成p型体区。 p型体区域与栅极沟槽相邻，但不与栅极沟槽接触。当从上方观察时，具有六边形形状的栅极沟槽围绕p型体区域。栅极沟槽的侧面仅由碳化硅的{11-20}面形成。

3. 发明授权

US07880173B2 Semiconductor device and method of manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07880173B2
公开(公告)日：2011-02-01
申请号：US12025445
申请日：2008-02-04
申请人： Kenji Fukuda , Junji Senzaki , Shinsuke Harada , Makoto Kato , Tsutomu Yatsuo , Mitsuo Okamoto
发明人： Kenji Fukuda , Junji Senzaki , Shinsuke Harada , Makoto Kato , Tsutomu Yatsuo , Mitsuo Okamoto
IPC分类号： H01L29/15
CPC分类号： H01L29/7802 , H01L21/049 , H01L21/8213 , H01L21/823807 , H01L21/823857 , H01L21/823885 , H01L27/092 , H01L29/045 , H01L29/1608 , H01L29/66068 , H01L29/7395 , H01L29/7835
摘要： A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high blocking voltage and high channel mobility is manufactured by optimizing the heat-treatment method used following the gate oxidation. The method of manufacturing a semiconductor device includes the steps of forming a gate insulation layer on a semiconductor region formed of silicon carbide having a (000-1) face orientation, forming a gate electrode on the gate insulation layer, forming an electrode on the semiconductor region, cleaning the semiconductor region surface. The gate insulation layer is formed in an atmosphere containing 1% or more H2O (water) vapor at a temperature of from 800° C. to 1150° C. to reduce the interface trap density of the interface between the gate insulation layer and the semiconductor region.
摘要翻译：提供半导体器件和使用（000-1）面的碳化硅衬底的器件的制造方法。通过优化栅极氧化后使用的热处理方法来制造具有高阻断电压和高沟道迁移率的SiC半导体器件。制造半导体器件的方法包括以下步骤：在由具有（000-1）面取向的碳化硅形成的半导体区上形成栅极绝缘层，在栅极绝缘层上形成栅电极，在半导体上形成电极区域，清洁半导体区域表面。栅极绝缘层在800℃至1150℃的温度下在含有1％或更多的H 2 O（水）蒸汽的气氛中形成，以降低栅绝缘层和半导体之间的界面的界面陷阱密度地区。

4. 发明申请

US20060151806A1 Semiconductor device and power converter, driving inverter, general-purpose inverter and high-power high-frequency communication device using same 失效
公开(公告)号：US20060151806A1
公开(公告)日：2006-07-13
申请号：US10536192
申请日：2003-11-25
申请人： Kenji Fukuda , Ryoji Kosugi , Junji Senzaki , Shinsuke Harada
发明人： Kenji Fukuda , Ryoji Kosugi , Junji Senzaki , Shinsuke Harada
IPC分类号： H01L29/74
CPC分类号： H01L29/7828 , H01L21/0445 , H01L29/1608 , H01L29/41766 , H01L29/7802 , H01L29/7838 , H01L29/861 , H01L29/872
摘要： In a semiconductor device that uses a silicon carbide semiconductor substrate having p type, n type impurity semiconductor regions formed by ion implantation, the electrical characteristics of the end semiconductor device can be improved by decreasing the roughness of the silicon carbide semiconductor substrate surface. The semiconductor device of this invention is a Schottky barrier diode or a p-n type diode comprising at least one of a p type semiconductor region and n type semiconductor region selectively formed in a silicon carbide semiconductor region having an outermost surface layer surface that is a (000-1) surface or a surface inclined at an angle to the (000-1) surface, and a metal electrode formed on the outermost surface layer surface, that controls a direction in which electric current flows in a direction perpendicular to the outermost surface layer surface from application of a voltage to the metal electrode.

5. 发明授权

US09184230B2 Silicon carbide vertical field effect transistor 有权
标题翻译：碳化硅垂直场效应晶体管
公开(公告)号：US09184230B2
公开(公告)日：2015-11-10
申请号：US14006548
申请日：2012-04-06
申请人： Yuichi Harada , Shinsuke Harada , Yasuyuki Hoshi , Noriyuki Iwamuro
发明人： Yuichi Harada , Shinsuke Harada , Yasuyuki Hoshi , Noriyuki Iwamuro
IPC分类号： H01L29/15 , H01L29/06 , H01L29/78 , H01L29/10 , H01L29/08 , H01L29/16
CPC分类号： H01L29/0615 , H01L29/0626 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/7802 , H01L29/7808 , H01L29/7827
摘要： A silicon carbide vertical field effect transistor includes a first-conductive-type silicon carbide substrate; a low-concentration first-conductive-type silicon carbide layer formed on a surface of the first-conductive-type silicon carbide substrate; second-conductive-type regions selectively formed on a surface of the first-conductive-type silicon carbide layer; first-conductive-type source regions formed in the second-conductive-type regions; a high-concentration second-conductive-type region formed between the first-conductive-type source regions in the second-conductive-type region; a source electrode electrically connected to the high-concentration second-conductive-type region and a first-conductive-type source region; a gate insulating film formed from the first-conductive-type source regions formed in adjacent second-conductive-type regions, onto the second-conductive-type regions and the first-conductive-type silicon carbide layer; a gate electrode formed on the gate insulating film; and a drain electrode on the back side of the first-conductive-type silicon carbide substrate, wherein an avalanche generating unit is disposed between the second-conductive-type region and the first-conductive-type silicon carbide layer.
摘要翻译：碳化硅垂直场效应晶体管包括第一导电型碳化硅衬底; 形成在第一导电型碳化硅衬底的表面上的低浓度第一导电型碳化硅层; 选择性地形成在第一导电型碳化硅层的表面上的第二导电型区域; 形成在第二导电型区域中的第一导电型源极区域; 形成在第二导电型区域中的第一导电型源极区域之间的高浓度第二导电型区域; 与高浓度第二导电型区域电连接的源电极和第一导电型源极区域; 由形成在相邻的第二导电型区域的第一导电型源极区域形成在第二导电型区域和第一导电型碳化硅层上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; 以及在第一导电型碳化硅衬底的背侧上的漏电极，其中雪崩产生单元设置在第二导电型区域和第一导电型碳化硅层之间。

6. 发明申请

US20140040462A1 DEVICE MANAGEMENT SYSTEM, DEVICE MANAGEMENT APPARATUS, AND DEVICE MANAGEMENT METHOD 审中-公开
标题翻译：设备管理系统，设备管理设备和设备管理方法
公开(公告)号：US20140040462A1
公开(公告)日：2014-02-06
申请号：US13957591
申请日：2013-08-02
申请人： Shinsuke Harada
发明人： Shinsuke Harada
IPC分类号： H04L12/26
CPC分类号： H04L43/04 , H04L41/0213 , H04L41/0856
摘要： A device management system manages an electronic device and a lighting device via a network and includes an acquiring section configured to acquire, from the first device, first operating history information relating to an operating history of the first device and acquire, from a monitor connected to the second device, second operating history information relating to an operating history of the second device, the second operating history information being of a type different from that of the first operating history information; a first generating section configured to generate first management information based on the first operating history information; and a second generating section configured to generate second management information of a type identical to that of the first management information based on the second operating history information.
摘要翻译：一种设备管理系统经由网络管理电子设备和照明设备，并且包括：获取单元，用于从所述第一设备获取与所述第一设备的操作历史有关的第一操作历史信息，并且从连接到所述第二设备，与所述第二设备的操作历史相关的第二操作历史信息，所述第二操作历史信息是与所述第一操作历史信息的类型不同的类型; 第一生成部，被配置为基于所述第一操作历史信息生成第一管理信息; 以及第二生成部，被配置为基于所述第二操作历史信息生成与所述第一管理信息的类型相同的类型的第二管理信息。

7. 发明申请

US20090173949A1 SILICON CARBIDE MOS FIELD EFFECT TRANSISTOR WITH BUILT-IN SCHOTTKY DIODE AND METHOD FOR MANUFACTURING SUCH TRANSISTOR 有权
标题翻译：具有内置肖特基二极管的硅碳化物磁场效应晶体管及其制造方法
公开(公告)号：US20090173949A1
公开(公告)日：2009-07-09
申请号：US12281391
申请日：2006-12-27
申请人： Tsutomu Yatsuo , Shinsuke Harada , Kenji Fukuda , Mitsuo Okamoto
发明人： Tsutomu Yatsuo , Shinsuke Harada , Kenji Fukuda , Mitsuo Okamoto
IPC分类号： H01L29/24 , H01L21/336
CPC分类号： H01L21/8213 , H01L27/0727 , H01L29/0619 , H01L29/1095 , H01L29/1608 , H01L29/66068 , H01L29/7806
摘要： This invention has a cell incorporating a built-in Schottky diode region disposed in at least part of an elementary cell that constitutes an SiC vertical MOSFET provided in a low-density p-type deposit film with a channel region and a base region inverted to an n-type by ion implantation. This built-in Schottky diode region has built therein a Schottky diode of low on-resistance that is formed of a second deficient pan disposed in a high-density gate layer, a second n-type base layer penetrating a low-density p-type deposit layer formed thereon, reaching an n-type drift layer of the second deficient part and attaining its own formation in consequence of inversion of the p-type deposit layer into an n-type by the ion implantation of an n-type impurity from the surface, and a source electrode connected in the manner of forming a Schottky barrier to the surface-exposed part of the second n-type base layer.
摘要翻译：本发明具有一个电池，该电池结合了内置的肖特基二极管区域，该区域设置在构成在具有沟道区域和基极区域的低密度p型沉积膜中提供的SiC垂直MOSFET的基本单元的至少一部分中 n型离子注入。该内置的肖特基二极管区域内置有低导通电阻的肖特基二极管，该二极管由设置在高密度栅极层中的第二缺陷盘形成，第二n型基极层穿透低密度p型沉积层形成在其上，到达第二缺陷部分的n型漂移层，并且由于p型沉积层通过从n型杂质离子注入n型杂质而转变为n型，从而形成其自身的形成表面以及以与第二n型基底层的表面暴露部分形成肖特基势垒的方式连接的源电极。

8. 发明申请

US20090072244A1 METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE, AND SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：制造硅碳化硅半导体器件的方法和碳化硅半导体器件
公开(公告)号：US20090072244A1
公开(公告)日：2009-03-19
申请号：US12281902
申请日：2007-01-16
申请人： Shinsuke Harada , Makoto Katou , Kenji Fukuda , Tsutomu Yatsuo
发明人： Shinsuke Harada , Makoto Katou , Kenji Fukuda , Tsutomu Yatsuo
IPC分类号： H01L29/24 , H01L21/44
CPC分类号： H01L21/31658 , H01L21/02126 , H01L21/02236 , H01L21/02255 , H01L21/02337 , H01L21/046 , H01L21/0485 , H01L21/324 , Y10S438/931
摘要： The object is to provide a method for the fabrication of a semiconductor device having undergone an anneal treatment for the purpose of forming such ohmic contact as enables decrease of ohmic contact resistance and being provided on the (000-1) plane of silicon carbide with an insulating film and provide the semiconductor device. The method for the fabrication of a silicon carbide semiconductor device includes the steps of performing thermal oxidation on the (000-1) plane of a silicon carbide semiconductor in a gas containing at least oxygen and moisture, thereby forming an insulating film in such a manner as to contact the (000-1) plane of the silicon carbide semiconductor, removing part of the insulating film, thereby forming an opening part therein, depositing contact metal on at least part of the opening part, and performing a heat treatment, thereby forming a reaction layer of the contact metal and silicon carbide, wherein the heat treatment is implemented in a mixed gas of an inert gas and hydrogen.
摘要翻译：本发明的目的是提供一种用于制造半导体器件的方法，该半导体器件为了形成这种欧姆接触的目的而进行了退火处理，以能够降低欧姆接触电阻并且提供在碳化硅的（000-1）面上，绝缘膜并提供半导体器件。制造碳化硅半导体器件的方法包括以下步骤：在至少包含氧和水分的气体中在碳化硅半导体的（000-1）面上进行热氧化，从而以这种方式形成绝缘膜为了接触碳化硅半导体的（000-1）面，除去绝缘膜的一部分，从而在其中形成开口部，在开口部的至少一部分上沉积接触金属，进行热处理，从而形成接触金属和碳化硅的反应层，其中热处理在惰性气体和氢气的混合气体中实施。

9. 发明申请

US20090057686A1 SEMICONDUCTOR DEVICE AND ELECTRIC POWER CONVERTER, DRIVE INVERTER, GENERAL-PURPOSE INVERTER AND SUPER-POWER HIGH-FREQUENCY COMMUNICATION EQUIPMENT USING THE SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件和电力转换器，驱动变频器，一般用途逆变器和使用半导体器件的超级高频通信设备
公开(公告)号：US20090057686A1
公开(公告)日：2009-03-05
申请号：US12261930
申请日：2008-10-30
申请人： Kenji FUKUDA , Ryoji Kosugi , Junji Senzaki , Shinsuke Harada
发明人： Kenji FUKUDA , Ryoji Kosugi , Junji Senzaki , Shinsuke Harada
IPC分类号： H01L29/24
CPC分类号： H01L29/7828 , H01L21/0445 , H01L29/1608 , H01L29/41766 , H01L29/7802 , H01L29/7838 , H01L29/861 , H01L29/872
摘要： In a semiconductor device that uses a silicon carbide semiconductor substrate having p type, n type impurity semiconductor regions formed by ion implantation, the electrical characteristics of the end semiconductor device can be improved by decreasing the roughness of the silicon carbide semiconductor substrate surface. The semiconductor device of this invention is a Schottky barrier diode or a p-n type diode comprising at least one of a p type semiconductor region and n type semiconductor region selectively formed in a silicon carbide semiconductor region having an outermost surface layer surface that is a (000-1) surface or a surface inclined at an angle to the (000-1) surface, and a metal electrode formed on the outermost surface layer surface, that controls a direction in which electric current flows in a direction perpendicular to the outermost surface layer surface from application of a voltage to the metal electrode.
摘要翻译：在使用具有p型的碳化硅半导体衬底的半导体器件中，通过离子注入形成n型杂质半导体区域，可以通过降低碳化硅半导体衬底表面的粗糙度来改善端部半导体器件的电特性。本发明的半导体器件是肖特基势垒二极管或pn型二极管，其包括选择性地形成在具有最外表面层表面的碳化硅半导体区域中的至少一个p型半导体区域和n型半导体区域， 1）表面或与（000-1）表面成角度倾斜的表面，以及形成在最外表面层表面上的金属电极，其控制电流在垂直于最外表面层表面的方向上流动的方向从电压施加到金属电极。

10. 发明申请

US20080203400A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080203400A1
公开(公告)日：2008-08-28
申请号：US12025445
申请日：2008-02-04
申请人： Kenji Fukuda , Junji Senzaki , Shinsuke Harada , Makoto Kato , Tsutomu Yatsuo , Mitsuo Okamoto
发明人： Kenji Fukuda , Junji Senzaki , Shinsuke Harada , Makoto Kato , Tsutomu Yatsuo , Mitsuo Okamoto
IPC分类号： H01L29/161
CPC分类号： H01L29/7802 , H01L21/049 , H01L21/8213 , H01L21/823807 , H01L21/823857 , H01L21/823885 , H01L27/092 , H01L29/045 , H01L29/1608 , H01L29/66068 , H01L29/7395 , H01L29/7835
摘要： A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high blocking voltage and high channel mobility is manufactured by optimizing the heat-treatment method used following the gate oxidation. The method of manufacturing a semiconductor device includes the steps of forming a gate insulation layer on a semiconductor region formed of silicon carbide having a (000-1) face orientation, forming a gate electrode on the gate insulation layer, forming an electrode on the semiconductor region, cleaning the semiconductor region surface. The gate insulation layer is formed in an atmosphere containing 1% or more H2O (water) vapor at a temperature of from 800° C. to 1150° C. to reduce the interface trap density of the interface between the gate insulation layer and the semiconductor region.
摘要翻译：提供半导体器件和使用（000-1）面的碳化硅衬底的器件的制造方法。通过优化栅极氧化后使用的热处理方法来制造具有高阻断电压和高沟道迁移率的SiC半导体器件。制造半导体器件的方法包括以下步骤：在由具有（000-1）面取向的碳化硅形成的半导体区上形成栅极绝缘层，在栅极绝缘层上形成栅电极，在半导体上形成电极区域，清洁半导体区域表面。在800℃至1150℃的温度下，在含有1％或更多的H 2 O（水）蒸气的气氛中形成栅极绝缘层，以降低界面陷阱密度栅极绝缘层和半导体区域之间的界面。

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