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1. 发明申请

US20110316170A1 Wiring Substrate, Semiconductor Device, and Method for Manufacturing Wiring Substrate 有权
标题翻译：接线基板，半导体器件和制造接线基板的方法
公开(公告)号：US20110316170A1
公开(公告)日：2011-12-29
申请号：US13166083
申请日：2011-06-22
申请人： Shigetsugu Muramatsu , Satoshi Sunohara
发明人： Shigetsugu Muramatsu , Satoshi Sunohara
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L2224/10175 , H01L2224/16225 , H01L2224/16227 , H01L2224/26175 , H01L2224/27013 , H01L2224/32225 , H01L2224/73204 , H01L2924/01322 , H01L2924/15151 , H01L2924/00012 , H01L2924/00
摘要： A wiring substrate includes a wiring pattern in an uppermost layer that includes pads. A solder resist layer covers the wiring pattern. A recess exposes part of the wiring pattern from the solder resist layer to form pads. The solder resist layer includes a portion formed in a region corresponding to the recess, a portion formed outward from the recess, and a portion formed inward from the recess. The upper surface of the solder resist layer at the portion corresponding to the recess is higher than the upper surface of the pads but lower than the upper surfaces of the other portions of the solder resist layer.
摘要翻译：布线基板包括在包括焊盘的最上层中的布线图案。阻焊层覆盖布线图案。凹陷使得阻焊层的部分布线图案露出以形成焊盘。阻焊层包括形成在与凹部对应的区域中的部分，从凹部向外形成的部分和从凹部向内形成的部分。阻焊层的与凹部对应的部分的上表面高于焊盘的上表面，但低于阻焊层的其它部分的上表面。

2. 发明申请

US20110253422A1 WIRING BOARD AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：接线板及其制造方法
公开(公告)号：US20110253422A1
公开(公告)日：2011-10-20
申请号：US13150691
申请日：2011-06-01
申请人： Shigetsugu Muramatsu , Yasuhiko Kusama
发明人： Shigetsugu Muramatsu , Yasuhiko Kusama
IPC分类号： H05K1/02
CPC分类号： H05K3/4007 , H05K1/111 , H05K3/0044 , H05K3/243 , H05K3/28 , H05K3/3452 , H05K3/4644 , H05K2201/0367 , H05K2201/0376 , H05K2201/09736 , H05K2203/025 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A wiring board includes: an uppermost wiring layer formed on a prescribed number of underlying wiring layers, a portion of the uppermost wiring layer being exposed and used as a pad for connection with a component to be mounted; and an insulation resin layer covering the uppermost wiring layer, wherein the thickness of the portion of the uppermost wiring layer is larger than that of other portions thereof.
摘要翻译：布线基板包括：形成在规定数量的底层布线层上的最上布线层，最上布线层的一部分露出并用作与要安装的部件连接的垫; 以及覆盖最上层布线层的绝缘树脂层，其中最上层布线层的部分的厚度大于其最大布线层的厚度。

3. 发明授权

US06628527B2 Mounting structure for electronic parts and manufacturing method thereof 失效
标题翻译：电子零件的安装结构及其制造方法
公开(公告)号：US06628527B2
公开(公告)日：2003-09-30
申请号：US09741481
申请日：2000-12-20
申请人： Shigetsugu Muramatsu , Takuya Kazama
发明人： Shigetsugu Muramatsu , Takuya Kazama
IPC分类号： H05K702
CPC分类号： H01L23/13 , H01L24/97 , H01L25/0652 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16235 , H01L2224/97 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/15331 , H05K1/141 , H05K1/144 , H05K1/182 , H05K3/3436 , H05K3/368 , H05K2201/09036 , H05K2201/10515 , H05K2201/10674 , Y10T29/4913 , Y10T29/49135 , H01L2224/81 , H01L2224/05599
摘要： A unit interconnection substrate for mounting leadless type electronic parts on a mount substrate by superposing them on each other in two or more stages, comprising an insulating surface on the top surface of which an interconnection circuit with conductor pads and connection terminals is formed, depressions for holding electronic parts formed in a bottom surface of the insulating substrate, connection terminals provided on the bottom surface of the insulating substrate on the periphery of the depression, and connection terminals electrically connected to the connection terminals of the top surface of the insulating substrate via conductor via holes provided in the insulating substrate. Electronic parts are electrically connected to the conductor pads on the top surface of the insulating substrate, thereby to make it possible to mount the electronic parts on the insulating substrate. Together with this, holding of the electronic parts mounted on the mount substrate in the depressions of the bottom surface of the insulating substrate is made possible.
摘要翻译：一种单元互连基板，用于通过将安装基板上的无引线型电子部件彼此叠置在两个或更多个阶段中来安装无引线型电子部件，所述两个或多个阶段包括在其顶表面上形成有与导体焊盘和连接端子的互连电路的绝缘表面，保持形成在所述绝缘基板的底面的电子部件，设置在所述凹部的周围的所述绝缘基板的底面上的连接端子，以及通过导体电连接到所述绝缘基板的上表面的连接端子的连接端子通孔设置在绝缘基板中。电子部件电连接到绝缘基板的顶表面上的导体焊盘，从而可以将电子部件安装在绝缘基板上。与此同时，能够将安装在安装基板上的电子部件保持在绝缘基板的底面的凹部中。

4. 发明授权

US06404214B1 Substrate for inspecting electronic device, method of manufacturing substrate, and method of inspecting electronic device 失效
标题翻译：用于检查电子装置的基板，基板的制造方法以及检查电子装置的方法
公开(公告)号：US06404214B1
公开(公告)日：2002-06-11
申请号：US09468060
申请日：1999-12-20
申请人： Shigetsugu Muramatsu , Michio Horiuchi , Takuya Kazama
发明人： Shigetsugu Muramatsu , Michio Horiuchi , Takuya Kazama
IPC分类号： G01R3102
CPC分类号： H05K1/112 , G01R31/2886 , H01L2224/16237 , H05K1/0393 , H05K3/06 , H05K3/325 , H05K2201/0394 , H05K2201/09472 , H05K2201/10734
摘要： A substrate for inspecting an electronic device used for an electrical test of the electronic device having bump-shaped connection terminals, comprises: opening sections, the diameter of each opening being determined so that a connection terminal can be inserted into and drawn out from the opening, are formed penetrating the insulating substrate in a region on one side of an insulating substrate on which the electronic device is mounted, corresponding to an arrangement of the connection terminals; and wiring patterns, each of which is composed of a pad section being exposed onto a bottom face of the opening so that the pad can come into contact with the connection terminal so as to accomplish electrical continuity, a connecting pad section formed in a region outside of the region in which the pad section is formed, which comes into contact with a contact terminal of an inspection device so as to accomplish electrical continuity, and a wiring section for electrically connecting the pad section with the connecting pad section, are formed on the other side of the insulating substrate.
摘要翻译：一种用于检查用于具有凸起形连接端子的电子设备的电气测试的电子设备的基板，包括：开口部分，每个开口的直径被确定为使得连接端子能够从开口插入和拉出对应于连接端子的布置，在安装有电子设备的绝缘基板的一侧的区域中穿过绝缘基板; 以及布线图案，每个布线图案由暴露于开口的底面的焊盘部分组成，使得焊盘能够与连接端子接触以实现电连续性;连接焊盘部分形成在外部区域形成有与检查装置的接触端子接触以实现电连续性的形成有焊盘部的区域，以及用于将焊盘部与连接焊盘部电连接的布线部，形成在绝缘基板的另一侧。

5. 发明授权

US09741647B2 Wiring substrate, semiconductor device, and method of manufacturing wiring substrate 有权
公开(公告)号：US09741647B2
公开(公告)日：2017-08-22
申请号：US13293857
申请日：2011-11-10
申请人： Shigetsugu Muramatsu , Noritaka Katagiri
发明人： Shigetsugu Muramatsu , Noritaka Katagiri
IPC分类号： H01L23/498
CPC分类号： H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2924/15311
摘要： A wiring substrate is provided with a first wiring layer including a first land, a first insulative layer formed on the first wiring layer, a second wiring layer formed on the first insulative layer, a second insulative layer formed on the second wiring layer, and a via formed extending through the first insulative layer and the second insulative layer in a thicknesswise direction. The via includes one end, which is electrically connected to the first land of the first wiring layer, and another end, which is located opposed to the one end and serves as a pad to which a mounted electronic component is electrically connected. The second wiring layer includes a coupling portion electrically connected to the via. The coupling portion of the second wiring has a width that is smaller than a diameter of the via.

6. 发明授权

US08508050B2 Wiring substrate, semiconductor device, and method for manufacturing wiring substrate 有权
标题翻译：布线基板，半导体装置以及布线基板的制造方法
公开(公告)号：US08508050B2
公开(公告)日：2013-08-13
申请号：US13166083
申请日：2011-06-22
申请人： Shigetsugu Muramatsu , Satoshi Sunohara
发明人： Shigetsugu Muramatsu , Satoshi Sunohara
IPC分类号： H01L23/48
CPC分类号： H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L2224/10175 , H01L2224/16225 , H01L2224/16227 , H01L2224/26175 , H01L2224/27013 , H01L2224/32225 , H01L2224/73204 , H01L2924/01322 , H01L2924/15151 , H01L2924/00012 , H01L2924/00
摘要： A wiring substrate includes a wiring pattern in an uppermost layer that includes pads. A solder resist layer covers the wiring pattern. A recess exposes part of the wiring pattern from the solder resist layer to form pads. The solder resist layer includes a portion formed in a region corresponding to the recess, a portion formed outward from the recess, and a portion formed inward from the recess. The upper surface of the solder resist layer at the portion corresponding to the recess is higher than the upper surface of the pads but lower than the upper surfaces of the other portions of the solder resist layer.
摘要翻译：布线基板包括在包括焊盘的最上层中的布线图案。阻焊层覆盖布线图案。凹陷使得阻焊层的部分布线图案露出以形成焊盘。阻焊层包括形成在与凹部对应的区域中的部分，从凹部向外形成的部分和从凹部向内形成的部分。阻焊层的与凹部对应的部分的上表面高于焊盘的上表面，但低于阻焊层的其它部分的上表面。

7. 发明授权

US08115300B2 Wiring substrate and manufacturing method thereof, and semiconductor apparatus 有权
标题翻译：配线基板及其制造方法以及半导体装置
公开(公告)号：US08115300B2
公开(公告)日：2012-02-14
申请号：US11763053
申请日：2007-06-14
申请人： Shigetsugu Muramatsu , Tsuyoshi Kobayashi , Takashi Kurihara
发明人： Shigetsugu Muramatsu , Tsuyoshi Kobayashi , Takashi Kurihara
IPC分类号： H01L23/12
CPC分类号： H05K3/4647 , H01L21/486 , H01L23/49827 , H01L2224/16225 , H01L2224/48227 , H05K1/111 , H05K3/108 , H05K3/4007 , H05K2201/0367 , H05K2201/09909 , Y02P70/611
摘要： In a semiconductor apparatus, a semiconductor element is mounted on a wiring substrate. Wiring patterns and protrusions are formed on a surface of a substrate with the wiring patterns extending on tops of the protrusions. The surface of the substrate on which the wiring patterns are formed are covered with an insulating layer. Surfaces of connection parts of the wiring patterns formed on the tops of the protrusions are formed with the surfaces of the connection parts exposed to a surface of the insulating layer on a level with the surface of the insulating layer or in a position lower than the surface of the insulating layer. The connection parts are formed as pads for connection formed in alignment with connection electrodes of the semiconductor element. The semiconductor element is mounted by making electrical connection to the connection parts by flip chip bonding.
摘要翻译：在半导体装置中，将半导体元件安装在布线基板上。布线图案和突起形成在基板的表面上，布线图案在突起的顶部延伸。其上形成有布线图案的基板的表面被绝缘层覆盖。形成在突起的顶部上的布线图形的连接部分的表面形成有连接部分的表面暴露于绝缘层的表面与绝缘层的表面或低于表面的位置的绝缘层。连接部分形成为与半导体元件的连接电极对准形成的用于连接的焊盘。半导体元件通过倒装芯片接合与连接部分进行电连接来安装。

8. 发明授权

US08037596B2 Method for manufacturing a wiring board 有权
标题翻译：线路板制造方法
公开(公告)号：US08037596B2
公开(公告)日：2011-10-18
申请号：US11946360
申请日：2007-11-28
申请人： Shigetsugu Muramatsu , Yasuhiko Kusama
发明人： Shigetsugu Muramatsu , Yasuhiko Kusama
IPC分类号： H05K3/02 , H05K1/00
CPC分类号： H05K3/4007 , H05K1/111 , H05K3/0044 , H05K3/243 , H05K3/28 , H05K3/3452 , H05K3/4644 , H05K2201/0367 , H05K2201/0376 , H05K2201/09736 , H05K2203/025 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A wiring board includes: an uppermost wiring layer formed on a prescribed number of underlying wiring layers, a portion of the uppermost wiring layer being exposed and used as a pad for connection with a component to be mounted; and an insulation resin layer covering the uppermost wiring layer, wherein the thickness of the portion of the uppermost wiring layer is larger than that of other portions thereof.
摘要翻译：布线基板包括：形成在规定数量的底层布线层上的最上布线层，最上布线层的一部分露出并用作与要安装的部件连接的垫; 以及覆盖最上层布线层的绝缘树脂层，其中最上层布线层的部分的厚度比其它部分的厚度大。

9. 发明申请

US20100252304A1 WIRING BOARD AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：接线板及其制造方法
公开(公告)号：US20100252304A1
公开(公告)日：2010-10-07
申请号：US12752692
申请日：2010-04-01
申请人： Shigetsugu Muramatsu , Yasuhiko Kusama
发明人： Shigetsugu Muramatsu , Yasuhiko Kusama
IPC分类号： H05K1/11 , H05K1/09 , H05K3/00
CPC分类号： H05K3/3452 , H01L21/563 , H01L23/3121 , H01L23/49827 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/15151 , H05K1/111 , H05K3/0044 , H05K3/243 , H05K3/305 , H05K2201/0191 , H05K2201/09036 , H05K2201/09045 , H05K2201/09736 , H05K2201/09881 , H05K2201/10674 , H05K2201/10977 , H05K2203/025 , Y10T29/49155 , H01L2924/00 , H01L2224/0401
摘要： A method of manufacturing a wiring board for use in mounting of an electronic component includes: forming an outermost wiring layer on a surface side where the electronic component is mounted; forming an insulating layer so as to cover the wiring layer; and forming a concave portion in the insulating layer. The concave portion is formed by removing, using a mask formed in a required shape by patterning, an exposed portion of the insulating layer in a step-like shape until a surface of a pad defined at a portion of the wiring layer is exposed. The concave portion is preferably formed by removing the portion of the insulating layer by sand blast.
摘要翻译：制造电子部件安装用布线基板的方法包括：在安装有电子部件的表面侧形成最外层布线层; 形成绝缘层以覆盖所述布线层; 以及在所述绝缘层中形成凹部。通过使用通过图案化形成所需形状的掩模，以阶梯状形状除去绝缘层的露出部分，直到露出布线层的一部分的焊盘的表面来形成凹部。凹部优选通过用喷砂除去绝缘层的一部分而形成。

10. 发明授权

US07438945B2 Method of producing multilayer interconnection board 失效
标题翻译：生产多层互连板的方法
公开(公告)号：US07438945B2
公开(公告)日：2008-10-21
申请号：US11033340
申请日：2005-01-11
申请人： Shigetsugu Muramatsu , Katsumi Yamazaki
发明人： Shigetsugu Muramatsu , Katsumi Yamazaki
IPC分类号： B05D5/12 , B05D3/00
CPC分类号： H05K3/005 , H05K3/107 , H05K3/4644 , H05K3/465 , H05K2203/0108 , H05K2203/0582 , H05K2203/1189 , H05K2203/308
摘要： A method of producing a multilayer interconnection board is disclosed that includes the steps of processing a resin member on an interconnection layer by imprinting press, and removing residue of the resin member at the bottom of a via hole after forming the via hole. In the method of producing a multilayer interconnection board, a thermal setting resin, which has a setting temperature higher than that of the resin member, is applied on a via-connecting portion of the interconnection layer, the resin member is formed on the interconnection layer, an interconnection groove and a via hole are formed by imprinting press on the resin member by using a tool, and an un-cured portion of the high temperature setting resin is dissolved and removed by using a resin solvent. Thereby, residue of the resin member on the thermal setting resin is removed.
摘要翻译：公开了一种制造多层互连板的方法，其包括通过压印机在互连层上处理树脂部件的步骤，以及在形成通孔之后在通孔的底部除去树脂部件的残留物。在制造多层互连板的方法中，将具有比树脂构件的设定温度高的设定温度的热定型树脂施加在互连层的过孔连接部分上，树脂构件形成在互连层通过使用工具通过压印在树脂部件上形成互连槽和通孔，并且通过使用树脂溶剂将高温固化树脂的未固化部分溶解并除去。由此，除去热固化树脂上的树脂部件的残留物。

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