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1. 发明授权

US07393763B2 Manufacturing method of monocrystalline gallium nitride localized substrate 失效
标题翻译：单晶氮化镓局部衬底的制造方法
公开(公告)号：US07393763B2
公开(公告)日：2008-07-01
申请号：US11055985
申请日：2005-02-14
申请人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
发明人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
IPC分类号： H01L21/36
CPC分类号： C30B25/02 , C30B29/406 , H01L21/02381 , H01L21/02447 , H01L21/0254 , H01L21/02639
摘要： There is provided a monocrystalline gallium nitride localized substrate suitable for manufacturing electronic-optical united devices in which electronic devices and optical devices are mixedly mounted on the same silicon substrate.An area in which monocrystalline gallium nitride 410 is grown is locally present on a silicon substrate 100 by forming silicon carbide 200 on the silicon substrate 100 to locally form the monocrystalline gallium nitride 410 on the above-mentioned silicon carbide 200. Silicon nitride 220 is used as a mask in forming the above-mentioned monocrystalline gallium nitride 410.
摘要翻译：提供了适用于制造电子器件和光学器件混合安装在同一硅衬底上的电子 - 光学联合器件的单晶氮化镓局部衬底。单晶氮化镓410生长的区域通过在硅衬底100上形成碳化硅200而在硅衬底100上局部存在，以在上述碳化硅200上局部形成单晶氮化镓410。在形成上述单晶氮化镓410时，使用氮化硅220作为掩模。

2. 发明授权

US07128788B2 Manufacturing apparatus for buried insulating layer-type semiconductor silicon carbide substrate 有权
标题翻译：埋层绝缘层型半导体碳化硅基板的制造装置
公开(公告)号：US07128788B2
公开(公告)日：2006-10-31
申请号：US10802806
申请日：2004-03-18
申请人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
发明人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
IPC分类号： C23C16/00 , H01L21/20 , H01L21/36
CPC分类号： H01L21/7624 , H01L21/02378 , H01L21/02381 , H01L21/02488 , H01L21/02529 , H01L21/02532 , H01L21/02639 , H01L21/02656 , H01L21/0445 , H01L21/7602 , H01L21/76251
摘要： A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.
摘要翻译：掩埋绝缘层型半导体碳化硅衬底的制造方法包括将具有预定厚度的表面硅层130和掩埋绝缘体120的SOI衬底100放置在加热炉200中的步骤，同时向加热炉200供给氢气G 1和烃气G 2的混合气体（G 1 + G 2），从而将SOI衬底100的变形表面硅层130 成为单晶碳化硅薄膜140。

3. 发明申请

US20050136611A1 Manufacturing device for buried insulating layer type single crystal silicon carbide substrate 失效
标题翻译：埋层绝缘层型单晶碳化硅基板制造装置
公开(公告)号：US20050136611A1
公开(公告)日：2005-06-23
申请号：US11050683
申请日：2005-02-07
申请人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
发明人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
IPC分类号： C30B29/36 , H01L21/02 , H01L21/04 , H01L21/20 , H01L21/205 , H01L21/76 , H01L21/762 , H01L27/12 , H01L21/30
CPC分类号： H01L21/7624 , C23C16/0218 , C23C16/0236 , C23C16/325 , C23C16/482 , C30B1/10 , C30B29/36 , H01L21/02381 , H01L21/02491 , H01L21/02529 , H01L21/02614 , H01L21/0445 , H01L21/2007 , H01L21/7602 , Y10T29/41
摘要： Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.
摘要翻译：提供一种绝缘层与其制造装置接触的界面的平坦度优异的掩埋绝缘层型半导体碳化硅基板的制造方法。在制造装置中，在该成膜室中配置具有位于硅衬底上的埋入绝缘层和形成在该埋置绝缘层上的表面硅层的SOI衬底。制造装置包括：成膜室，其中放置SOI基板; 气体供给单元，用于将掩模绝缘层型半导体碳化硅基板的制造所需的各种气体供给到成膜室中; 红外线照射单元，其用红外线照射SOI衬底的表面硅层; 以及用于控制气体供给单元和红外线照射单元的控制部。

4. 发明申请

US20120092295A1 Touch-Sensitive Coordinate Input Apparatus, Touch Panel and Electronic Devices Having the Same 审中-公开
标题翻译：触摸敏感坐标输入设备，触摸屏和具有相同功能的电子设备
公开(公告)号：US20120092295A1
公开(公告)日：2012-04-19
申请号：US13271526
申请日：2011-10-12
申请人： Seisaku Hirai
发明人： Seisaku Hirai
IPC分类号： G06F3/044
CPC分类号： G06F3/044 , G06F2203/04808
摘要： A touch-sensitive coordinate input apparatus includes a plurality of regions (3,4) on a substrate (1), each region being defined by four electrodes (2A, 2B, 2C, 2D; 4A, 4B, 4C, 4D) disposed rectangularly, and also includes a dielectric (6) disposed across the four electrodes in each region (3, 4). A position-detecting mechanism (7,8) obtains position information of a touch operation by calculating changes in capacitance of the four electrodes (2A, 2B, 2C, 2D; 4A, 4B, 4C, 4D) for every region caused by the touch operation to the dielectric (6) within the region (3,4), and a compound-processing mechanism (9) conducts a calculation processing based on the position information in at least two of the plurality of regions (3,4).
摘要翻译：触觉坐标输入装置包括在基板（1）上的多个区域（3,4），每个区域由矩形排列的四个电极（2A，2B，2C，2D; 4A，4B，4C，4D）并且还包括在每个区域（3,4）中横跨四个电极设置的电介质（6）。位置检测机构（7,8）通过计算由触摸引起的每个区域的四个电极（2A，2B，2C，2D; 4A，4B，4C，4D）的电容的变化来获得触摸操作的位置信息对区域（3,4）内的电介质（6）进行操作，以及复合处理机构（9）基于多个区域（3,4）中的至少两个区域中的位置信息进行计算处理。

5. 发明授权

US07084049B2 Manufacturing method for buried insulating layer-type semiconductor silicon carbide substrate 有权
标题翻译：埋层绝缘层型半导体碳化硅基板的制造方法
公开(公告)号：US07084049B2
公开(公告)日：2006-08-01
申请号：US10351385
申请日：2003-01-27
申请人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
发明人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
IPC分类号： H01L21/20 , H01L21/36 , C30B23/00 , C30B25/00 , C30B28/12
CPC分类号： H01L21/7624 , H01L21/02378 , H01L21/02381 , H01L21/02488 , H01L21/02529 , H01L21/02532 , H01L21/02639 , H01L21/02656 , H01L21/0445 , H01L21/7602 , H01L21/76251
摘要： A manufacturing method for a buried insulating layer-type semiconductor silicon carbide substrate comprises the step of placing an SOI substrate 100, which has a surface silicon layer 130 of a predetermined thickness and a buried insulator 120, in a heating furnace 200 and of increasing the temperature of the atmosphere within heating furnace 200 while supplying a mixed gas (G1+G2) of a hydrogen gas G1 and of a hydrocarbon gas G2 into heating furnace 200, thereby, of metamorphosing surface silicon layer 130 of SOI substrate 100 into a single crystal silicon carbide thin film 140.
摘要翻译：掩埋绝缘层型半导体碳化硅衬底的制造方法包括将具有预定厚度的表面硅层130和掩埋绝缘体120的SOI衬底100放置在加热炉200中的步骤，同时向加热炉200供给氢气G 1和烃气G 2的混合气体（G 1 + G 2），从而将SOI衬底100的变形表面硅层130 成为单晶碳化硅薄膜140。

6. 发明授权

US06472097B1 Rechargeable battery using pressure-crush type protective device and portable electronic device using the rechargeable battery 失效
标题翻译：使用压力式保护装置的充电电池和使用可充电电池的便携式电子装置
公开(公告)号：US06472097B1
公开(公告)日：2002-10-29
申请号：US09557986
申请日：2000-04-25
申请人： Yoshiaki Ohbayashi , Naoya Takehara , Keiji Mine , Seisaku Hirai
发明人： Yoshiaki Ohbayashi , Naoya Takehara , Keiji Mine , Seisaku Hirai
IPC分类号： H01M212
CPC分类号： H01M2/345 , H01M2/1241 , H01M2/34 , H01M2200/20
摘要： Explosion of rechargeable battery can be prevented in a relatively simple structure, at low cost, and without allowing spouting of electrolyte. A rechargeable battery 100D1 using a pressure-crush type protective device comprises a housing H including an internal electrode plate 120 spirally wound about a positive electrode and a negative electrode through a separator, a jacket 110 for accommodating this internal electrode plate 120, and a sealing body 140 for closing the opening of this jacket 110, a positive electrode (or negative electrode) output electrode 130 connected electrically to the internal electrode plate 120, a spacer 200 disposed beneath the sealing body 140 for insulating between the sealing body 140 and internal electrode plate 120, a pressure-crush type protective device A1 disposed in said spacer 200 as a pressure-sensitive element for detecting the internal pressure in the housing H, and an output terminal 400 connected electrically to one terminal of this pressure-crush type protective device A1 (one end of a conductor layer 210A1) for picking up the detection result of the internal pressure detected by the pressure-crush type protective device A1 electrically to outside, in which other terminal of the pressure-crush type protective device A1 (other end of the conductor 210A1) is connected electrically to the positive electrode (or negative electrode) output electrode 130.
摘要翻译：可以以相对简单的结构，低成本地防止可再充电电池的爆炸，并且不允许电解液喷射。使用压碎型保护装置的可充电电池100D1包括壳体H，壳体H包括通过隔板螺旋地卷绕在正极和负极上的内部电极板120，用于容纳该内部电极板120的护套110和密封用于封闭该护套110的开口的主体140，与内部电极板120电连接的正极（或负极）输出电极130，设置在密封体140下方的隔离件200，用于在密封体140和内部电极板120，作为用于检测壳体H内部压力的压敏元件而设置在所述间隔件200中的压溃型保护装置A1，以及与该压碎式保护装置的一端电连接的输出端子400 A1（导体层210A1的一端），用于拾取由该检测出的内部压力的检测结果压力破坏式保护装置A1电连接到外部，其中压压型保护装置A1（导体210A1的另一端）的另一端与电极（或负电极）130电连接。

7. 发明授权

US06393892B1 Impact sensor and impact-pressure sensor 失效
标题翻译：冲击传感器和冲击压力传感器
公开(公告)号：US06393892B1
公开(公告)日：2002-05-28
申请号：US09604652
申请日：2000-06-27
申请人： Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai
发明人： Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai
IPC分类号： G01N330
CPC分类号： H01M2/345 , G01P15/06 , H01H35/146 , H01M2/1235 , H01M2/34 , H01M2200/20
摘要： To attain an impact sensor designed compact and to be readily assembled. The impact sensor comprises main part 100 of sensor involving cavity 110, of which bottom surface serves as the fracture part 120; impact force transfer member 130 provided on said fracture part 120; weight 200 being confined in said cavity 110; and seal member 300 to close the cavity 110 with the weight 200 left confined therein, whereby the fracture part 120 is apt to be broken up by the weight 200, when an impact exceeding the predetermined value has been encountered.
摘要翻译：为了获得设计紧凑的冲击传感器并易于组装。冲击传感器包括涉及空腔110的传感器的主要部分100，其底面用作断裂部分120; 设置在所述断裂部120上的冲击力传递部件130; 重量200被限制在所述空腔110中; 以及密封构件300，其中重物200被限制在其中以关闭空腔110，由此当遇到超过预定值的冲击时，断裂部分120容易被重物200分解。

8. 发明授权

US07077875B2 Manufacturing device for buried insulating layer type single crystal silicon carbide substrate 失效
标题翻译：埋层绝缘层型单晶碳化硅基板制造装置
公开(公告)号：US07077875B2
公开(公告)日：2006-07-18
申请号：US11050683
申请日：2005-02-07
申请人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
发明人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
IPC分类号： H01L21/00 , H01L21/64
CPC分类号： H01L21/7624 , C23C16/0218 , C23C16/0236 , C23C16/325 , C23C16/482 , C30B1/10 , C30B29/36 , H01L21/02381 , H01L21/02491 , H01L21/02529 , H01L21/02614 , H01L21/0445 , H01L21/2007 , H01L21/7602 , Y10T29/41
摘要： Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.
摘要翻译：提供一种绝缘层与其制造装置接触的界面的平坦度优异的掩埋绝缘层型半导体碳化硅基板的制造方法。在制造装置中，在该成膜室中配置具有位于硅衬底上的埋入绝缘层和形成在该埋置绝缘层上的表面硅层的SOI衬底。制造装置包括：成膜室，其中放置SOI基板; 气体供给单元，用于将掩模绝缘层型半导体碳化硅基板的制造所需的各种气体供给到成膜室中; 红外线照射单元，其用红外线照射SOI衬底的表面硅层; 以及用于控制气体供给单元和红外线照射单元的控制部。

9. 发明授权

US06927144B2 Method for manufacturing buried insulating layer type single crystal silicon carbide substrate 失效
标题翻译：掩埋绝缘层型单晶碳化硅基板的制造方法
公开(公告)号：US06927144B2
公开(公告)日：2005-08-09
申请号：US10708593
申请日：2004-03-12
申请人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
发明人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
IPC分类号： C30B29/36 , H01L21/02 , H01L21/04 , H01L21/20 , H01L21/205 , H01L21/76 , H01L21/762 , H01L27/12
CPC分类号： H01L21/7624 , C23C16/0218 , C23C16/0236 , C23C16/325 , C23C16/482 , C30B1/10 , C30B29/36 , H01L21/02381 , H01L21/02491 , H01L21/02529 , H01L21/02614 , H01L21/0445 , H01L21/2007 , H01L21/7602 , Y10T29/41
摘要： Provided is a manufacturing method of a buried insulating layer type semiconductor silicon carbide substrate excellent in flatness of an interfaces in contact the insulating layer and a manufacturing device thereof. In the manufacturing device, an SOI substrate having a buried insulating layer positioned on a silicon substrate and a surface silicon layer formed on this buried insulating layer is placed in this film formation chamber. The manufacturing device includes: the film formation chamber in which the SOI substrate is placed; a gas supplying unit for supplying various types of gasses required for the manufacturing of a buried insulating layer type semiconductor silicon carbide substrate into the film formation chamber; an infrared ray irradiating unit for irradiating the surface silicon layer of the SOI substrate with infrared rays; and a control part for controlling the gas supplying unit and the infrared ray irradiating unit.
摘要翻译：提供一种绝缘层与其制造装置接触的界面的平坦度优异的掩埋绝缘层型半导体碳化硅基板的制造方法。在制造装置中，在该成膜室中配置具有位于硅衬底上的埋入绝缘层和形成在该埋置绝缘层上的表面硅层的SOI衬底。制造装置包括：成膜室，其中放置SOI基板; 气体供给单元，用于将掩模绝缘层型半导体碳化硅基板的制造所需的各种气体供给到成膜室中; 红外线照射单元，其用红外线照射SOI衬底的表面硅层; 以及用于控制气体供给单元和红外线照射单元的控制部。

10. 发明申请

US20050148108A1 Manufacturing method of monocrystalline gallium nitride localized substrate 失效
标题翻译：单晶氮化镓局部衬底的制造方法
公开(公告)号：US20050148108A1
公开(公告)日：2005-07-07
申请号：US11055985
申请日：2005-02-14
申请人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
发明人： Katsutoshi Izumi , Motoi Nakao , Yoshiaki Ohbayashi , Keiji Mine , Seisaku Hirai , Fumihiko Jobe , Tomoyuki Tanaka
IPC分类号： C30B29/38 , C30B25/02 , H01L21/20 , H01L21/205 , H01L21/00 , C30B1/00 , H01L29/24 , H01L33/00
CPC分类号： C30B25/02 , C30B29/406 , H01L21/02381 , H01L21/02447 , H01L21/0254 , H01L21/02639
摘要： There is provided a monocrystalline gallium nitride localized substrate suitable for manufacturing electronic-optical united devices in which electronic devices and optical devices are mixedly mounted on the same silicon substrate. An area in which monocrystalline gallium nitride 410 is grown is locally present on a silicon substrate 100 by forming silicon carbide 200 on the silicon substrate 100 to locally form the monocrystalline gallium nitride 410 on the above-mentioned silicon carbide 200. Silicon nitride 220 is used as a mask in forming the above-mentioned monocrystalline gallium nitride 410.
摘要翻译：提供了适用于制造电子器件和光学器件混合安装在同一硅衬底上的电子 - 光学联合器件的单晶氮化镓局部衬底。单晶氮化镓410生长的区域通过在硅衬底100上形成碳化硅200而在硅衬底100上局部存在，以在上述碳化硅200上局部形成单晶氮化镓410。在形成上述单晶氮化镓410时，使用氮化硅220作为掩模。

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