专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08436256B2 Fixing device for shield can 有权
标题翻译：屏蔽罐固定装置
公开(公告)号：US08436256B2
公开(公告)日：2013-05-07
申请号：US12912280
申请日：2010-10-26
申请人： Kun-Tak Kim , Soon-Wan Chung , Jae-Woo Jeong , Min-Young Park , Se-Young Jang
发明人： Kun-Tak Kim , Soon-Wan Chung , Jae-Woo Jeong , Min-Young Park , Se-Young Jang
IPC分类号： H05K9/00
CPC分类号： H05K9/0022
摘要： A shield can fixing device of an electronic device is provided. The fixing device includes a base having a specific length and attached to a shield can fixing line of the printed circuit board, a pair of panels, each of which is bent upwards and formed on the base to have a slit between them for inserting a lateral portion of the shield can, at least one opening portion formed in any one or both of the panels, and an insertion protrusion formed in the lateral portion located in a corresponding position to the opening portion in a protruding manner to ensure a fixing force of the shield can. The shield can fixing device is fixed by inserting a lateral portion of a shield can between double walls.
摘要翻译：提供电子装置的屏蔽可以固定装置。定影装置包括具有特定长度的基座并且附着到印刷电路板的屏蔽罐固定线上，一对面板，每个面板向上弯曲并形成在基座上以在它们之间具有狭缝以插入侧面屏蔽件的一部分可以形成在任何一个或两个面板中的至少一个开口部分和形成在侧面部分中的插入突起，该插入突起以突出的方式位于与开口部分相对应的位置，以确保所述屏蔽件的固定力盾可以。通过将屏蔽罐的侧面部分插入双壁之间来固定屏蔽件固定装置。

2. 发明申请

US20110094791A1 FIXING DEVICE FOR SHIELD CAN 有权
标题翻译：固定装置固定装置
公开(公告)号：US20110094791A1
公开(公告)日：2011-04-28
申请号：US12912280
申请日：2010-10-26
申请人： Kun-Tak KIM , Soon-Wan CHUNG , Jae-Woo JEONG , Min-Young PARK , Se-Young JANG
发明人： Kun-Tak KIM , Soon-Wan CHUNG , Jae-Woo JEONG , Min-Young PARK , Se-Young JANG
IPC分类号： H05K9/00
CPC分类号： H05K9/0022
摘要： A shield can fixing device of an electronic device is provided. The fixing device includes a base having a specific length and attached to a shield can fixing line of the printed circuit board, a pair of panels, each of which is bent upwards and formed on the base to have a slit between them for inserting a lateral portion of the shield can, at least one opening portion formed in any one or both of the panels, and an insertion protrusion formed in the lateral portion located in a corresponding position to the opening portion in a protruding manner to ensure a fixing force of the shield can. The shield can fixing device is fixed by inserting a lateral portion of a shield can between double walls.
摘要翻译：提供电子装置的屏蔽可以固定装置。定影装置包括具有特定长度的基座并且附着到印刷电路板的屏蔽罐固定线上，一对面板，每个面板向上弯曲并形成在基座上以在它们之间具有狭缝以插入侧面屏蔽件的一部分可以形成在任何一个或两个面板中的至少一个开口部分和形成在侧面部分中的插入突起，该突出部分以突出的方式位于与开口部分相对应的位置，以确保所述屏蔽件的固定力盾可以。通过将屏蔽罐的侧面部分插入双壁之间来固定屏蔽件固定装置。

3. 发明申请

US20110090662A1 METHOD AND APPARATUS FOR IMPROVING POWER NOISE OF BALL GRID ARRAY PACKAGE 审中-公开
标题翻译：改进球网阵列功率噪声的方法和装置
公开(公告)号：US20110090662A1
公开(公告)日：2011-04-21
申请号：US12905639
申请日：2010-10-15
申请人： Se-Young JANG , Jeong-Ung KIM , Kun-Tak KIM
发明人： Se-Young JANG , Jeong-Ung KIM , Kun-Tak KIM
IPC分类号： H05K1/18 , H01L21/52
CPC分类号： H05K1/0231 , H01L23/3128 , H01L24/73 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2924/14 , H01L2924/15311 , H01L2924/3011 , H05K1/183 , H05K2201/10515 , H05K2201/10636 , H05K2201/10734 , Y02P70/611 , H01L2924/00 , H01L2924/00012
摘要： An apparatus and method of improving power noise of a Ball Grid Array (BGA) package are provided. The method includes securing a space for a passive element mounting pad, on which a passive element can be mounted, adjacent to a power pad on a Printed Circuit Board (PCB) corresponding to a power pin of the BGA package, mounting the passive element on the passive element mounting pad, and mounting the BGA package at a position on the PCB, wherein the position on the PCB overlaps the passive element and further wherein the BGA package is mounted above the passive element.
摘要翻译：提供了一种改善球栅阵列（BGA）封装的功率噪声的装置和方法。该方法包括固定无源元件安装垫的空间，无源元件可以安装在其上，与对应于BGA封装的电源引脚的印刷电路板（PCB）上的电源板相邻，将无源元件安装在无源元件安装垫，并将BGA封装安装在PCB上的一个位置，其中PCB上的位置与无源元件重叠，此外，BGA封装安装在无源元件上方。

4. 发明授权

US07449907B2 Test unit to test a board having an area array package mounted thereon 失效
标题翻译：测试单元测试其上安装有面阵列封装的板
公开(公告)号：US07449907B2
公开(公告)日：2008-11-11
申请号：US11316826
申请日：2005-12-27
申请人： Se-young Jang , Masaharu Tsukue , Young-jun Moon
发明人： Se-young Jang , Masaharu Tsukue , Young-jun Moon
IPC分类号： G01R31/02
CPC分类号： G01R1/0483
摘要： A test unit to test a board having an area array package mounted therein includes the board, the area array package having an electronic component, a plurality of package pins including a plurality of contact pins connected with the electronic component and a plurality of no-contact pins not connected with the electronic component, and a plurality of contact members respectively provided on the plurality of contact pins and the plurality of no-contact pins to connect the plurality of package pins with the board, a plurality of board contact parts provided on the board and connected with the plurality of contact members to be connected with the plurality of package pins, at least one first connection part provided in the area array package to electrically connect the plurality of no-contact pins with each other in pairs, at least one second connection part provided on the board to electrically connect the plurality of board contact parts with each other in pairs to form a circuit line arranged alternately with the first connection part through the plurality of contact members, and at least one test point provided at opposite ends of the circuit line to measure a resistance between the first and second connection parts. Thus, the test unit can test a connection state of the plurality of contact members without difficulty.
摘要翻译：用于测试其中安装有区域阵列封装的板的测试单元包括板，具有电子部件的区域阵列封装，包括与电子部件连接的多个触针的多个封装引脚和多个不接触分别设置在多个接触销和多个非接触引脚上以将多个封装引脚与该板连接的多个接触构件，设置在电子部件上的多个接触部件，与所述多个接触构件连接以与所述多个封装销连接;至少一个第一连接部，设置在所述区域阵列封装中，以将所述多个非接触引脚成对地电连接至少一个第二连接部，设置在所述板上，用于将所述多个板接触部彼此成对地电连接以形成电路线a 通过多个接触构件与第一连接部分交替地摆动，以及设置在电路线的相对端的至少一个测试点，以测量第一和第二连接部分之间的电阻。因此，测试单元可以毫无困难地测试多个接触构件的连接状态。

5. 发明申请

US20070007322A1 Board assembly apparatus having electronic components disposed in a space between circuit boards and a manufacturing method thereof 审中-公开
标题翻译：具有设置在电路板之间的空间中的电子部件的板组装装置及其制造方法
公开(公告)号：US20070007322A1
公开(公告)日：2007-01-11
申请号：US11325308
申请日：2006-01-05
申请人： Jong-sung Lee , Yoon-sung Kim , Young-jun Moon , Se-young Jang
发明人： Jong-sung Lee , Yoon-sung Kim , Young-jun Moon , Se-young Jang
IPC分类号： B23K31/02 , B23K31/00
CPC分类号： H05K1/141 , H05K3/3415 , H05K3/3436 , H05K3/3484 , H05K2201/10515 , H05K2203/1572 , Y02P70/613
摘要： A board assembly apparatus and a manufacturing method includes applying solder paste onto a first surface of a first board, arranging electronic components on the first surface of the first board on which the solder paste is applied, arranging a second board above the electronic components and the first surface of the first board, and curing the solder paste.
摘要翻译：板组装设备和制造方法包括将焊膏涂覆到第一板的第一表面上，将电子部件布置在其上施加焊膏的第一板的第一表面上，在电子部件上方布置第二板，第一板的第一表面，并固化焊膏。

6. 发明申请

US20060139043A1 Test unit to test a board having an area array package mounted thereon 失效
标题翻译：测试单元测试其上安装有面阵列封装的板
公开(公告)号：US20060139043A1
公开(公告)日：2006-06-29
申请号：US11316826
申请日：2005-12-27
申请人： Se-young Jang , Masaharu Tsukue , Young-jun Moon
发明人： Se-young Jang , Masaharu Tsukue , Young-jun Moon
IPC分类号： G01R31/02
CPC分类号： G01R1/0483
摘要： A test unit to test a board having an area array package mounted therein includes the board, the area array package having an electronic component, a plurality of package pins including a plurality of contact pins connected with the electronic component and a plurality of no-contact pins not connected with the electronic component, and a plurality of contact members respectively provided on the plurality of contact pins and the plurality of no-contact pins to connect the plurality of package pins with the board, a plurality of board contact parts provided on the board and connected with the plurality of contact members to be connected with the plurality of package pins, at least one first connection part provided in the area array package to electrically connect the plurality of no-contact pins with each other in pairs, at least one second connection part provided on the board to electrically connect the plurality of board contact parts with each other in pairs to form a circuit line arranged alternately with the first connection part through the plurality of contact members, and at least one test point provided at opposite ends of the circuit line to measure a resistance between the first and second connection parts. Thus, the test unit can test a connection state of the plurality of contact members without difficulty.
摘要翻译：用于测试其中安装有区域阵列封装的板的测试单元包括板，具有电子部件的区域阵列封装，包括与电子部件连接的多个触针的多个封装引脚和多个不接触分别设置在多个接触销和多个非接触引脚上以将多个封装引脚与该板连接的多个接触构件，设置在电子部件上的多个接触部件，与所述多个接触构件连接以与所述多个封装销连接;至少一个第一连接部，设置在所述区域阵列封装中，以将所述多个非接触引脚成对地电连接至少一个第二连接部，设置在所述板上，用于将所述多个板接触部彼此成对地电连接以形成电路线a 通过多个接触构件与第一连接部分交替地摆动，以及设置在电路线的相对端的至少一个测试点，以测量第一和第二连接部分之间的电阻。因此，测试单元可以毫无困难地测试多个接触构件的连接状态。

7. 发明申请

US20050012208A1 Method of surface-mounting semiconductor chip on PCB 审中-公开
标题翻译： PCB上半导体芯片的表面贴装方法
公开(公告)号：US20050012208A1
公开(公告)日：2005-01-20
申请号：US10822669
申请日：2004-04-13
申请人： Se-young Jang , Min-young Park , Soon-min Hong
发明人： Se-young Jang , Min-young Park , Soon-min Hong
IPC分类号： H05K3/34 , H01L21/52 , H01L21/56 , H01L21/60 , H01L23/04 , H01L23/12
CPC分类号： H01L24/81 , H01L21/563 , H01L24/29 , H01L2224/13111 , H01L2224/16225 , H01L2224/16227 , H01L2224/274 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/73104 , H01L2224/73203 , H01L2224/73204 , H01L2224/81191 , H01L2224/81801 , H01L2224/83102 , H01L2224/83104 , H01L2224/83191 , H01L2224/83856 , H01L2224/92125 , H01L2924/01006 , H01L2924/01033 , H01L2924/0105 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/1579 , H01L2924/00 , H01L2924/00014 , H01L2924/0665
摘要： A method of surface-mounting a semiconductor chip on a PCB, for mounting a flip chip type semiconductor chip on the PCB mounted with electronic components, that includes forming a solder bump on a conductive contact area of each semiconductor chip on a back of a semiconductor wafer mounted with a plurality of semiconductor chips, injecting underfill material on the area of the semiconductor wafer formed with the solder bump, partially hardening the underfill material to have cohesive properties, severing the semiconductor wafer into a plurality of individual semiconductor chips, arranging the severed semiconductor chips having the hardened underfill material on the PCB, and heating the PCB with a predetermined temperature. The present invention provides the surface-mounting method of the semiconductor chip having a simplified process by removing the need to have a package for the semiconductor chip transfer in the middle of the process, and not requiring strict tolerances for the minimum distance between the electronic components.
摘要翻译：一种在PCB上表面安装半导体芯片的方法，用于将倒装芯片型半导体芯片安装在安装有电子部件的PCB上，其包括在半导体背面上的每个半导体芯片的导电接触区域上形成焊料凸块晶片安装有多个半导体芯片，在形成有焊料凸块的半导体晶片的区域上注入底部填充材料，部分硬化底部填充材料以具有内聚性，将半导体晶片切割成多个单独的半导体芯片，将切断的在PCB上具有硬化的底部填充材料的半导体芯片，并以预定温度加热PCB。本发明提供了通过在该过程的中间消除对半导体芯片传输的封装的需要而简化了工艺的半导体芯片的表面安装方法，并且不需要电子部件之间的最小距离的严格公差。

8. 发明申请

US20120100669A1 METHOD OF MANUFACTURING TMV PACKAGE-ON-PACKAGE DEVICE 审中-公开
标题翻译：制造TMV封装封装器件的方法
公开(公告)号：US20120100669A1
公开(公告)日：2012-04-26
申请号：US13279655
申请日：2011-10-24
申请人： Se Young JANG , Kun Tak KIM , Jeong Ung KIM
发明人： Se Young JANG , Kun Tak KIM , Jeong Ung KIM
IPC分类号： H01L21/60
CPC分类号： H01L25/105 , H01L21/563 , H01L24/16 , H01L24/81 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/831 , H01L2225/1023 , H01L2225/1058 , H01L2924/15331 , H01L2924/3511 , H01L2924/00012
摘要： A method of manufacturing a Through Mold Via (TMV) package-on-package device while preventing a bad solder joint from occurring in the TMV package-on-package device is provided. The method includes coating exposed portions of a lower semiconductor package with an organic soldering preservative, and stacking a top semiconductor package on the lower semiconductor package and connecting lower solder balls of the top semiconductor package with the top solder balls of the lower semiconductor package. According to the method, a bad solder joint may be prevented from occurring when a top semiconductor package is bonded to a lower semiconductor package.
摘要翻译：提供了一种制造通过模具通（TMV）封装封装器件的方法，同时防止在TMV封装封装器件中发生不良焊点。该方法包括用有机焊接防腐剂涂覆下半导体封装的暴露部分，并且在下半导体封装上堆叠顶部半导体封装并将顶部半导体封装的下焊球与下半导体封装的顶部焊球连接。根据该方法，当顶部半导体封装被接合到下半导体封装时，可以防止发生不良焊接接头。

9. 发明授权

US08847669B2 Method for controlling temperature of terminal and terminal supporting the same 有权
标题翻译：控制终端和终端支持温度的方法
公开(公告)号：US08847669B2
公开(公告)日：2014-09-30
申请号：US13543262
申请日：2012-07-06
申请人： Ki Yeon Park , Se Young Jang , Chul Eun Yun
发明人： Ki Yeon Park , Se Young Jang , Chul Eun Yun
IPC分类号： H01L35/00 , G05D23/19
CPC分类号： G05D23/1951
摘要： A method for controlling a temperature of a terminal and a terminal supporting the same are provided. A terminal supporting temperature control includes a temperature sensor for detecting a temperature of the terminal, and a controller for performing at least one of a first throttle procedure including driving the controller with a first preset driving frequency when the temperature of the terminal detected by the temperature sensor is a first preset temperature, and driving the controller with a second driving frequency higher than the first driving frequency when the temperature of the terminal is reduced to a second preset temperature lower than the first preset temperature, and a second throttle procedure including driving the controller with the first preset driving frequency for a first time, and driving the controller with the second driving frequency higher than the first driving frequency for a second time after the first time elapses.
摘要翻译：提供了一种用于控制终端的温度和支持其的终端的方法。终端支持温度控制包括用于检测终端的温度的温度传感器，以及控制器，用于当由温度检测到的终端的温度时，执行包括以第一预设驱动频率驱动控制器的第一节流程序中的至少一个传感器是第一预设温度，并且当端子的温度降低到比第一预设温度低的第二预设温度时，以比第一驱动频率高的第二驱动频率驱动控制器，以及第二节流程序，包括驱动具有第一预设驱动频率的控制器，并且在第一次经过第二次之后，以比第一驱动频率高的第二驱动频率驱动控制器。

10. 发明申请

US20090059543A1 ELECTRONIC DEVICE MANUFACTURING METHOD USING LDS AND ELECTRONIC DEVICE MANUFACTURED BY THE METHOD 审中-公开
标题翻译：使用LDS制造的电子设备制造方法和由该方法制造的电子设备
公开(公告)号：US20090059543A1
公开(公告)日：2009-03-05
申请号：US12204262
申请日：2008-09-04
申请人： Ick-Sung CHOE , Hyun-Jung JEONG , Young-Ki KIM , Shin-Chul KANG , Soon-Min HONG , Se-Young JANG , Jae-Chul JIN , Gyun HEO
发明人： Ick-Sung CHOE , Hyun-Jung JEONG , Young-Ki KIM , Shin-Chul KANG , Soon-Min HONG , Se-Young JANG , Jae-Chul JIN , Gyun HEO
IPC分类号： H05K5/00 , B29C35/08
CPC分类号： H05K1/0284 , H04M1/0249 , H05K3/185 , H05K2201/0999 , H05K2203/107
摘要： Disclosed is a method for manufacturing an electronic device using LDS and an electronic manufacturing by the method, in which resin for LDS is adhered to an inner surface of an external case by double injection or insert injection so as to implement a circuit. The electronic device using LDS includes upper and lower external cases, wherein resin for LDS is adhered to an inner surface of the lower external case by double injection or insert injection. Components of the electronic device are mounted on the resin, and the upper and lower external case are assembled with each other.
摘要翻译：公开了一种使用LDS和电子制造的电子装置的制造方法，其中通过双重注射或插入注入将LDS的树脂粘附到外部壳体的内表面以实现电路。使用LDS的电子装置包括上下外壳，其中LDS用树脂通过双重注射或插入注入粘附到下外壳的内表面。电子装置的部件安装在树脂上，上下外壳彼此组装。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式