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1. 发明授权

US07672182B2 Read assist circuit of SRAM with low standby current 有权
标题翻译：以低待机电流读取SRAM的辅助电路
公开(公告)号：US07672182B2
公开(公告)日：2010-03-02
申请号：US12171236
申请日：2008-07-10
申请人： Heechoul Park , Wilson Chin , Kuan-Yu James Lin , Sanjaya Dharmasena
发明人： Heechoul Park , Wilson Chin , Kuan-Yu James Lin , Sanjaya Dharmasena
IPC分类号： G11C11/00
CPC分类号： G11C7/12 , G11C7/22 , G11C11/419 , G11C2207/005
摘要： A SRAM memory with a read assist circuit is presented. The read assist circuit uses bitline voltage level switches, which are connected to a low power supply and a high power supply. The bitline voltage level switches have a write operation state, a read operation state, and a standby operation state. The write operation state selectively provides the high power supply to bitlines in columns selected for a write operation, and provides the low power supply to bitlines in the remaining columns. The read operation state selectively provides the low power supply to bitlines in columns selected for the read operation, and provides the low power supply to bitlines in the other columns. The standby operation state selectively provides the low power supply to bitlines in all columns when not in the read operation state or the write operation state.
摘要翻译：提出了具有读辅助电路的SRAM存储器。读辅助电路使用位线电压电平开关，其连接到低电源和高电源。位线电压电平开关具有写操作状态，读操作状态和待机操作状态。写入操作状态选择性地向选择用于写入操作的列中的位线提供高电源，并且将剩余列中的位线提供给低电源。读取操作状态选择性地向选择用于读取操作的列中的位线提供低电源，并且将低功率电源提供给其他列中的位线。当处于读取操作状态或写入操作状态时，待机操作状态选择性地向所有列中的位线提供低电源。

2. 发明申请

US20100008171A1 READ ASSIST CIRCUIT OF SRAM WITH LOW STANDBY CURRENT 有权
标题翻译：具有低待机电流的SRAM的辅助电路
公开(公告)号：US20100008171A1
公开(公告)日：2010-01-14
申请号：US12171236
申请日：2008-07-10
申请人： Heechoul Park , Wilson Chin , Kuan-Yu James Lin , Sanjaya Dharmasena
发明人： Heechoul Park , Wilson Chin , Kuan-Yu James Lin , Sanjaya Dharmasena
IPC分类号： G11C7/00 , G11C5/14 , G11C8/00
CPC分类号： G11C7/12 , G11C7/22 , G11C11/419 , G11C2207/005
摘要： A SRAM memory with a read assist circuit is presented. The read assist circuit uses bitline voltage level switches, which are connected to a low power supply and a high power supply. The bitline voltage level switches have a write operation state, a read operation state, and a standby operation state. The write operation state selectively provides the high power supply to bitlines in columns selected for a write operation, and provides the low power supply to bitlines in the remaining columns. The read operation state selectively provides the low power supply to bitlines in columns selected for the read operation, and provides the low power supply to bitlines in the other columns. The standby operation state selectively provides the low power supply to bitlines in all columns when not in the read operation state or the write operation state.
摘要翻译：提出了具有读辅助电路的SRAM存储器。读辅助电路使用位线电压电平开关，其连接到低电源和高电源。位线电压电平开关具有写操作状态，读操作状态和待机操作状态。写入操作状态选择性地向选择用于写入操作的列中的位线提供高电源，并将低电源提供给其余列中的位线。读取操作状态选择性地向选择用于读取操作的列中的位线提供低电源，并且将低功率电源提供给其他列中的位线。当处于读取操作状态或写入操作状态时，待机操作状态选择性地向所有列中的位线提供低电源。

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