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1. 发明授权

US07334073B2 Method of and apparatus for interfacing buses operating at different speeds 有权
标题翻译：用于以不同速度操作的总线的接口的方法和装置
公开(公告)号：US07334073B2
公开(公告)日：2008-02-19
申请号：US11142463
申请日：2005-06-02
申请人： Sang-ik Choi , Shin-wook Kang , Hyang-suk Park
发明人： Sang-ik Choi , Shin-wook Kang , Hyang-suk Park
IPC分类号： G06F13/36
CPC分类号： G06F13/405 , Y02D10/14 , Y02D10/151
摘要： The present invention relates to a bridge for interfacing buses within an embedded system. There is provided a method of interfacing a first bus and a second bus operating at different speeds, the method includes counting a match value assigned to a predetermined peripheral device among peripheral devices connected to the second bus for each cycle of a clock signal received from the first bus, and keeping a read state or a write state for the predetermined peripheral device by continuously outputting a read signal or a write signal for the predetermined peripheral device to the second bus, during the counting of the match value. According to the present invention, it is not necessary to operate depending on a peripheral device operating at the lowest speed among peripheral devices, and not necessary to add wrappers to the peripheral devices, by employing the AHB-to-ISA bridge variably adjusting the output times of output signals to an ISA bus.
摘要翻译：本发明涉及一种用于在嵌入式系统内接口总线的桥接器。提供了一种接口第一总线和以不同速度工作的第二总线的方法，该方法包括对从第二总线连接到第二总线的外围设备分配给与从第二总线接收的时钟信号的每个周期相匹配的匹配值进行计数并且在匹配值的计数期间，通过连续地向第二总线输出用于预定的外围设备的读取信号或写入信号，为预定的外围设备保持读取状态或写入状态。根据本发明，不需要根据外围设备中以最低速度操作的外围设备进行操作，并且不需要通过使用可变地调整输出的AHB-ISA桥接器向外围设备添加封装输出信号到ISA总线的次数。

2. 发明申请

US20060080492A1 Method of and apparatus for interfacing buses operating at different speeds 有权
标题翻译：用于以不同速度操作的总线的接口的方法和装置
公开(公告)号：US20060080492A1
公开(公告)日：2006-04-13
申请号：US11142463
申请日：2005-06-02
申请人： Sang-ik Choi , Shin-wook Kang , Hyang-suk Park
发明人： Sang-ik Choi , Shin-wook Kang , Hyang-suk Park
IPC分类号： G06F13/36
CPC分类号： G06F13/405 , Y02D10/14 , Y02D10/151
摘要： The present invention relates to a bridge for interfacing buses within an embedded system. There is provided a method of interfacing a first bus and a second bus operating at different speeds, the method includes counting a match value assigned to a predetermined peripheral device among peripheral devices connected to the second bus for each cycle of a clock signal received from the first bus, and keeping a read state or a write state for the predetermined peripheral device by continuously outputting a read signal or a write signal for the predetermined peripheral device to the second bus, during the counting of the match value. According to the present invention, it is not necessary to operate depending on a peripheral device operating at the lowest speed among peripheral devices, and not necessary to add wrappers to the peripheral devices, by employing the AHB-to-ISA bridge variably adjusting the output times of output signals to an ISA bus.
摘要翻译：本发明涉及一种用于在嵌入式系统内接口总线的桥接器。提供了一种接口第一总线和以不同速度工作的第二总线的方法，该方法包括对从第二总线连接到第二总线的外围设备分配给与从第二总线接收的时钟信号的每个周期相匹配的匹配值进行计数并且在匹配值的计数期间，通过连续地向第二总线输出用于预定的外围设备的读取信号或写入信号，为预定的外围设备保持读取状态或写入状态。根据本发明，不需要根据外围设备中以最低速度操作的外围设备进行操作，并且不需要通过使用可变地调整输出的AHB-ISA桥接器向外围设备添加封装输出信号到ISA总线的次数。

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