会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Method and apparatus for reducing radiation and cross-talk induced data errors
    • 减少辐射和串扰引起的数据错误的方法和装置
    • US08054099B2
    • 2011-11-08
    • US12511207
    • 2009-07-29
    • Manuel F. Cabanas-HolmenEthan H. CannonSalim A. Rabaa
    • Manuel F. Cabanas-HolmenEthan H. CannonSalim A. Rabaa
    • H03K19/003H03K19/00G11C11/00
    • G11C5/005G11C7/02H03K3/0375H03K3/356121H03K17/693
    • The different advantageous embodiments provide an integrated circuit comprising a number of latches and a number of filters. Each latch in the number of latches has a plurality of inputs and a plurality of storage nodes. The plurality of storage nodes includes a number of pairs of circuit nodes that form a number of upsettable circuit node pairs. Each input of the plurality of inputs is connected to a corresponding storage node in the plurality of storage nodes. Each filter in the number of filters has an input and a plurality of outputs. Each of the plurality of outputs is connected to a corresponding input of the plurality of inputs of a latch in the number of latches. Each filter in the number of filters is located between two circuit nodes forming an upsettable circuit node pair of the latch in the number of latches to increase critical node spacing.
    • 不同的有利实施例提供了包括多个锁存器和多个滤波器的集成电路。 锁存器数量中的每个锁存器具有多个输入和多个存储节点。 多个存储节点包括形成多个可压缩电路节点对的多对电路节点。 多个输入的每个输入连接到多个存储节点中的对应的存储节点。 多个滤波器中的每个滤波器具有输入和多个输出。 多个输出中的每一个连接到锁存器数量的锁存器的多个输入的相应输入端。 滤波器数量中的每个滤波器位于两个电路节点之间,形成锁存器数量的锁存器的可升高电路节点对以增加关键节点间隔。
    • 3. 发明授权
    • Method and apparatus for reducing radiation and cross-talk induced data errors
    • 减少辐射和串扰引起的数据错误的方法和装置
    • US08207753B2
    • 2012-06-26
    • US13015331
    • 2011-01-27
    • Manuel F. Cabanas-HolmenEthan H. CannonSalim A. Rabaa
    • Manuel F. Cabanas-HolmenEthan H. CannonSalim A. Rabaa
    • H03K19/003H03K19/00
    • G11C5/005G11C7/02H03K3/0375H03K3/356121H03K17/693
    • The different advantageous embodiments provide an integrated circuit comprising a number of latches and a number of filters. Each latch in the number of latches has a plurality of inputs and a plurality of storage nodes. The plurality of storage nodes includes a number of pairs of circuit nodes that form a number of upsettable circuit node pairs. Each input of the plurality of inputs is connected to a corresponding storage node in the plurality of storage nodes. Each filter in the number of filters has an input and a plurality of outputs. Each of the plurality of outputs is connected to a corresponding input of the plurality of inputs of a latch in the number of latches. Each filter in the number of filters is located between two circuit nodes forming an upsettable circuit node pair of the latch in the number of latches to increase critical node spacing.
    • 不同的有利实施例提供了包括多个锁存器和多个滤波器的集成电路。 锁存器数量中的每个锁存器具有多个输入和多个存储节点。 多个存储节点包括形成多个可压缩电路节点对的多对电路节点。 多个输入的每个输入连接到多个存储节点中的对应的存储节点。 多个滤波器中的每个滤波器具有输入和多个输出。 多个输出中的每一个连接到锁存器数量的锁存器的多个输入的相应输入端。 滤波器数量中的每个滤波器位于两个电路节点之间,形成锁存器数量的锁存器的可升高电路节点对以增加关键节点间隔。