专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2006007076A1 FLOATING INPUT AMPLIFIER FOR CAPACITIVELY COUPLED COMMUNICATION 审中-公开
标题翻译：浮动输入放大器，用于电容耦合通信
公开(公告)号：WO2006007076A1
公开(公告)日：2006-01-19
申请号：PCT/US2005/016435
申请日：2005-05-11
申请人： SUN MICROSYSTEMS, INC. , DROST, Robert, J. , HO, Ronald , SUTHERLAND, Ivan, E.
发明人： DROST, Robert, J. , HO, Ronald , SUTHERLAND, Ivan, E.
IPC分类号： H03F3/45
CPC分类号： H03F3/45977 , H03F3/08
摘要： One embodiment of the present invention provides a capacitively-coupled receiver amplifier that has an input with no DC coupling. A DC voltage is programmed on the input. During programming, a transmitter is held at a voltage at a midpoint between a voltage that represents a logical "1" and a voltage that represents a logical "0" and the input voltage of the receiver amplifier is programmed to be substantially the switching-threshold voltage for the receiver amplifier. Then, during normal data communication, the transmitter drives high and low electrical signals that are coupled to the receiver amplifier. Since the input of the receiver amplifier has been substantially set to the DC voltage, the receiver amplifier need not control the DC voltage of the input for each transition in the electrical signals.
摘要翻译：本发明的一个实施例提供一种具有不具有直流耦合的输入的电容耦合接收放大器。在输入端编程一个直流电压。在编程期间，发射机被保持在表示逻辑“1”的电压和表示逻辑“0”的电压之间的中点处的电压，并且接收机放大器的输入电压被编程为基本上是切换阈值接收放大器的电压。然后，在正常数据通信期间，发射机驱动耦合到接收机放大器的高电平和低电平信号。由于接收机放大器的输入已基本设置为直流电压，所以接收放大器不需要控制电信号中每个转换的输入的直流电压。

2. 发明申请

WO0128003A9 FACE-TO-FACE CHIPS 审中-公开
标题翻译：面对面表
公开(公告)号：WO0128003A9
公开(公告)日：2002-08-01
申请号：PCT/US0028672
申请日：2000-10-16
申请人： SUN MICROSYSTEMS INC , SUTHERLAND IVAN E
发明人： SUTHERLAND IVAN E
IPC分类号： H01L23/48 , H01L23/64 , H01L25/065 , H01L31/00 , H01L23/02 , H01L23/06 , H01L23/12 , H01L23/52 , H01L29/40
CPC分类号： H01L23/642 , H01L23/48 , H01L25/0652 , H01L2224/16 , H01L2225/06513 , H01L2225/06531 , H01L2924/01046 , H01L2924/01079 , H01L2924/3025
摘要： An integrated circuit device (100) includes first and second arrays of semiconductor dice. Each array of dice is arranged in face-to-face relation to the other array of dice, thus forming a lower layer (110) of dice and an upper layer (120) of dice. The layers are aligned so that each upper layer die straddles two or more of the lower layer dice, thus defining overlap regions (130). In the overlap regions, signal pads of one layer (112) are aligned with corresponding signal pads (122) of the other layer. The two layers are spaced apart thus creating a capacitance-based communication path between the upper and lower layers via the signal paths.
摘要翻译：集成电路器件（100）包括半导体晶片的第一和第二阵列。每个骰子阵列与另一个骰子阵列面对面地布置，从而形成骰子的下层（110）和骰子的上层（120）。这些层被对准，使得每个上层模具跨越下层骰子中的两个或更多个，从而限定重叠区域（130）。在重叠区域中，一层（112）的信号焊盘与另一层的对应信号焊盘（122）对齐。两层间隔开，从而通过信号路径在上层和下层之间产生基于电容的连通路径。

3. 发明申请

WO2006121593A1 METHOD AND APPARATUS FOR ELECTRONICALLY ALIGNING CAPACITIVELY COUPLED MINI-BARS 审中-公开
标题翻译：用于电子联接的电容式微型电池的方法和装置
公开(公告)号：WO2006121593A1
公开(公告)日：2006-11-16
申请号：PCT/US2006/015089
申请日：2006-04-21
申请人： SUN MICROSYSTEMS, INC. , DROST, Robert, J. , SUTHERLAND, Ivan, E. , COATES, William, S.
发明人： DROST, Robert, J. , SUTHERLAND, Ivan, E. , COATES, William, S.
IPC分类号： H01L23/544 , H01L23/48 , H01L25/065
CPC分类号： H01L25/0657 , H01L23/48 , H01L25/50 , H01L2224/16 , H01L2225/06513 , H01L2225/06531 , H01L2225/06593 , H01L2924/00011 , H01L2924/00014 , H01L2924/01067 , H01L2224/0401
摘要： One embodiment of the present invention provides a system that electronically aligns mini-bars on different semiconductor chips which are situated face-to-face to facilitate communication between the semiconductor chips through capacitive coupling. During operation, the system measures an alignment between a first chip and a second chip. The system then selects a group of transmitter mini-bars on the first chip to form a transmitter bit position based on the measured alignment. In this way, the system allows a data signal to be distributed to and transmitted by the mini-bars that form the transmitter bit position. The system also selects a group of receiver mini-bars on the second chip to form a receiver bit position based on the measured alignment. Next, the system associates transmitter bit positions on the first chip with proximate receiver bit positions on the second chip based on the measured alignment. In this way, the system allows data signals transmitted by the mini-bars within a transmitter bit position on the first chip to be collectively received by the mini-bars within an associated receiver bit position on the second chip.
摘要翻译：本发明的一个实施例提供了一种系统，其电子地对准位于面对面的不同半导体芯片上的迷你条，以促进半导体芯片之间通过电容耦合的通信。在操作期间，系统测量第一芯片和第二芯片之间的对准。然后，系统在第一芯片上选择一组发射器迷你条，以基于测量的对准来形成发射机位置。以这种方式，该系统允许将数据信号分配到形成发送器位位置的迷你条并发送。该系统还在第二芯片上选择一组接收器迷你条，以形成基于测量对准的接收器位位置。接下来，系统基于测量的对准将第一芯片上的发射机位位置与第二芯片上的接收器位置相关联。以这种方式，系统允许由第一芯片上的发送器位置内的迷你条发送的数据信号由第二芯片上相关联的接收器位位置内的迷你条集中接收。

4. 发明申请

WO2004090737A2 SENSE AMPLIFYING LATCH WITH LOW SWING FEEDBACK 审中-公开
标题翻译：感应放大灯具，低电压反馈
公开(公告)号：WO2004090737A2
公开(公告)日：2004-10-21
申请号：PCT/US2004/010466
申请日：2004-04-02
申请人： SUN MICROSYSTEMS, INC. , SUTHERLAND, Ivan E. , BOSNYAK, Robert J. , DROST, Robert J.
发明人： SUTHERLAND, Ivan E. , BOSNYAK, Robert J. , DROST, Robert J.
IPC分类号： G06F13/00
CPC分类号： H03K5/003 , H01L23/48 , H01L25/0657 , H01L2225/06527 , H01L2924/00013 , H01L2924/0002 , H03K3/037 , H03K17/689 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
摘要： A system is presented for latching and amplifying a capacitively coupled inter-chip communication signal that operates by receiving an input signal on a capacitive receiver pad and feeding the input signal through an inverter to produce an output signal. The output signal is fed back through a weakened inverter to produce a feedback signal that is fed into an input of the inverter to form a latch for the input signal. The weakened inverter is biased to produce a feedback signal that swings between a high bias voltage, VH, and a low bias voltage, VL. VH is set slightly higher than the switching threshold of the inverter, and VL is set slightly lower than the switching threshold. This feedback signal causes the input signal to reside within a narrow voltage range near the switching threshold of the inverter, making the inverter sensitive to small transitions in the input signal.
摘要翻译：提出了一种用于锁存和放大电容耦合的芯片间通信信号的系统，其通过接收电容性接收器焊盘上的输入信号并通过反相器馈送输入信号以产生输出信号来操作。输出信号通过弱化逆变器反馈，产生反馈信号，该反馈信号馈送到反相器的输入端，形成输入信号的锁存器。弱化的逆变器被偏置以产生在高偏置电压VH和低偏置电压VL之间摆动的反馈信号。将VH设置为略高于逆变器的开关阈值，并将VL设置为略低于开关阈值。该反馈信号使输入信号驻留在接近逆变器开关阈值的窄电压范围内，使得反相器对输入信号中的小转换敏感。

5. 发明申请

WO2013052502A1 DETERMINING SPACING OF SEMICONDUCTOR DIES USING A SPATIALLY VARYING CHARGE DISTRIBUTION 审中-公开
标题翻译：使用空间变化的电荷分配来确定半导体器件的间隔
公开(公告)号：WO2013052502A1
公开(公告)日：2013-04-11
申请号：PCT/US2012/058487
申请日：2012-10-02
申请人： ORACLE INTERNATIONAL CORPORATION , SUTHERLAND, Ivan E.
发明人： SUTHERLAND, Ivan E.
IPC分类号： H01L23/48 , H01L25/065
CPC分类号： H01L25/0657 , G01B7/023 , G01B7/14 , G01B7/30 , H01L23/48 , H01L24/16 , H01L2224/81121 , H01L2225/06531 , H01L2225/06593 , H01L2924/00012
摘要： A semiconductor die 110-1 is described. This semiconductor die includes a driver 114-1, and a spatial alignment transducer 116-1 that is electrically coupled to the driver and which is proximate to a surface 112-1 of the semiconductor die. The driver establishes a spatially varying electric charge distribution in at least one direction in the spatial alignment transducer, thereby facilitating determination of a vertical spacing 210 between a surface of the semiconductor die and a surface 112-2 of another semiconductor die 110-2. In particular, a spatial alignment sensor 120-2 proximate to the surface of the other semiconductor die may detect an electrical field (or an associated electrostatic potential) associated with the spatially varying electric charge distribution. This detected electric field may allow the vertical spacing between the surfaces of the semiconductor dies to be determined.
摘要翻译：描述半导体管芯110-1。该半导体管芯包括驱动器114-1和电耦合到驱动器并且靠近半导体管芯的表面112-1的空间对准传感器116-1。驱动器在空间对准转换器中在至少一个方向上建立空间变化的电荷分布，从而有助于确定半导体管芯的表面与另一个半导体管芯110-2的表面112-2之间的垂直间隔210。特别地，靠近其它半导体管芯的表面的空间对准传感器120-2可以检测与空间变化的电荷分布相关联的电场（或相关联的静电电位）。该检测的电场可以允许确定半导体管芯的表面之间的垂直间隔。

6. 发明申请

WO2009137450A1 PROXIMITY OPTICAL MEMORY MODULE 审中-公开
标题翻译：临近光学存储模块
公开(公告)号：WO2009137450A1
公开(公告)日：2009-11-12
申请号：PCT/US2009/042800
申请日：2009-05-05
申请人： SUN MICROSYSTEMS, INC. , FORREST, Craig, S. , DROST, Robert, J. , HO, Ronald , SUTHERLAND, Ivan, E.
发明人： FORREST, Craig, S. , DROST, Robert, J. , HO, Ronald , SUTHERLAND, Ivan, E.
IPC分类号： G11C5/00 , G11C7/22 , H01L23/48 , H01L25/065
CPC分类号： G11C5/04 , G11C5/143 , G11C7/1051 , G11C7/1054 , G11C7/1078 , G11C7/1081 , H01L23/48 , H01L23/642 , H01L24/05 , H01L25/0652 , H01L25/0657 , H01L25/167 , H01L2225/06562 , H01L2924/01067 , H01L2924/14 , H01L2924/19041
摘要： A memory module is formed of multiple memory chips and an optical interface chip fixed on a substrate. The chips are interconnected by proximity communication (PxC) in which each chip includes transmitting and receiving elements, such as electrical pads which form capacitively coupled links when the chips are placed together with their pads facing each other. The PxC links may be directly between the chips or through an intermediate passive bridge chip. The interface chip is coupled to an external optical channel and includes converters between optical and electrical signals, control circuitry, buffers, and PxC elements for communicating with the memory chips. The array of memories may be a linear or two-dimensional array around the interface chip forming a redundant PxC network, optionally with redundant PxC connections. Multiple rectangular memory chips may present their narrow sides to the interface chip to maximize bandwidth.
摘要翻译：存储器模块由多个存储器芯片和固定在基板上的光学接口芯片形成。芯片通过邻近通信（PxC）相互连接，其中每个芯片包括发射和接收元件，例如当芯片彼此面对放置在一起时形成电容耦合链路的电焊盘。 PxC链路可以直接在芯片之间或通过中间无源桥芯片。接口芯片耦合到外部光通道并且包括用于与存储器芯片通信的光学和电信号之间的转换器，控制电路，缓冲器和PxC元件。存储器阵列可以是形成冗余PxC网络的接口芯片周围的线性或二维阵列，可选地具有冗余PxC连接。多个矩形存储器芯片可以将它们的窄边呈现给接口芯片以最大化带宽。

7. 发明申请

WO2004090737A3 SENSE AMPLIFYING LATCH WITH LOW SWING FEEDBACK 审中-公开
标题翻译：感应放大灯具，低电压反馈
公开(公告)号：WO2004090737A3
公开(公告)日：2005-03-17
申请号：PCT/US2004010466
申请日：2004-04-02
申请人： SUN MICROSYSTEMS INC , SUTHERLAND IVAN E , BOSNYAK ROBERT J , DROST ROBERT J
发明人： SUTHERLAND IVAN E , BOSNYAK ROBERT J , DROST ROBERT J
IPC分类号： H01L23/48 , H01L25/065 , H03K3/037 , H03K5/003 , H03K17/689
CPC分类号： H03K5/003 , H01L23/48 , H01L25/0657 , H01L2225/06527 , H01L2924/00013 , H01L2924/0002 , H03K3/037 , H03K17/689 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
摘要： A system is presented for latching and amplifying a capacitively coupled inter-chip communication signal that operates by receiving an input signal on a capacitive receiver pad and feeding the input signal through an inverter to produce an output signal. The output signal is fed back through a weakened inverter to produce a feedback signal that is fed into an input of the inverter to form a latch for the input signal. The weakened inverter is biased to produce a feedback signal that swings between a high bias voltage, VH, and a low bias voltage, VL. VH is set slightly higher than the switching threshold of the inverter, and VL is set slightly lower than the switching threshold. This feedback signal causes the input signal to reside within a narrow voltage range near the switching threshold of the inverter, making the inverter sensitive to small transitions in the input signal.
摘要翻译：提出了一种用于锁存和放大电容耦合的芯片间通信信号的系统，其通过接收电容性接收器焊盘上的输入信号并通过反相器馈送输入信号以产生输出信号来操作。输出信号通过弱化逆变器反馈，产生反馈信号，该反馈信号馈送到反相器的输入端，形成输入信号的锁存器。弱化的逆变器被偏置以产生在高偏置电压VH和低偏置电压VL之间摆动的反馈信号。将VH设置为略高于逆变器的开关阈值，并将VL设置为略低于开关阈值。该反馈信号使得输入信号驻留在接近逆变器的开关阈值的窄电压范围内，使得反相器对输入信号中的小转变敏感。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式