专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

EP1702410A1 NOISE-TOLERANT SIGNALING SCHEMES SUPPORTING SIMPLIFIED TIMING AND DATA RECOVERY 失效转让
标题翻译：简化定时和数据恢复支持能耐噪音的信令过程
公开(公告)号：EP1702410A1
公开(公告)日：2006-09-20
申请号：EP04812906.8
申请日：2004-12-03
申请人： Rambus, Inc. , Ho, Andrew , Stojanovic, Vladimir , Chen, Fred F. , ALON, Elad , HOROWITH, Mark A.
发明人： HO, Andrew , STOJANOVIC, Vladimir , CHEN, Fred, F. , ALON, Elad , HOROWITZ, Mark, A.
IPC分类号： H03K19/003 , H04L12/56 , G06F13/40 , H04L5/20
CPC分类号： H04L47/10 , H04L5/20 , H04L25/0276
摘要： Described are communication systems that convey differential and common-mode signals over the same differential channel. Noise-tolerant communication schemes use low-amplitude common-mode signals that are easily refected by differential receivers thus allowing for very high differential data rates. Some embodiments employ the common-mode signals to transmit bacchanal signals for adjusting the characteristics of the differential transmitter. Backchannel control signals are effectively conveyed even if the forward channel transmitter is so maladjusted that the received differential data is unrecognizable. Systems in accordance with the above-described embodiments obtain these advantages without additional pins or communications channels, and are compatible with both AC-coupled and DC-coupled communications channels. Data coding schemes and corresponding data recovery circuits eliminate the need for complex, high-speed CDR circuits.

2. 发明公开

EP1629622A2 MARGIN TEST METHODS AND CIRCUITS 审中-公开
标题翻译：关程序测试和电路
公开(公告)号：EP1629622A2
公开(公告)日：2006-03-01
申请号：EP04752834.4
申请日：2004-05-20
申请人： RAMBUS INC. , Garlepp, Bruno W. , Chen, Fred F. , Ho, Andrew , Stojanovic, Vladimir
发明人： GARLEPP, Bruno, W. , CHEN, Fred, F. , HO, Andrew , STOJANOVIC, Vladimir
IPC分类号： H04L1/24 , H04L1/20 , H04L25/03
CPC分类号： H04L25/03006 , H04L1/20 , H04L1/241 , H04L1/242
摘要： Described are methods and circuits for margin testing digital receivers. Some embodiments prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing, while other embodiments rely upon the statistics of sampled data to explore the margin characteristics of received data.

3. 发明申请

WO2014201286A1 OPTICAL MODULATOR FROM STANDARD FABRICATION PROCESSING 审中-公开
标题翻译：标准制造加工的光学调制器
公开(公告)号：WO2014201286A1
公开(公告)日：2014-12-18
申请号：PCT/US2014/042177
申请日：2014-06-12
申请人： POPOVIC, Milos A. , SHAINLINE, Jeffrey Michael , ORCUTT, Jason , STOJANOVIC, Vladimir Marko
发明人： POPOVIC, Milos A. , SHAINLINE, Jeffrey Michael , ORCUTT, Jason , STOJANOVIC, Vladimir Marko
IPC分类号： G02F1/025
CPC分类号： G02F1/2257 , G02B6/29338 , G02B6/2938 , G02B6/29395 , G02F1/025 , G02F2001/3509 , G02F2201/17 , G02F2203/05 , G02F2203/07 , G02F2203/15
摘要： An optical modulator is disclosed that includes an optical resonator structure. The optical resonator structure includes at least one non-linear portion, the at least one non-linear portion comprising at least one radial junction region. The at least one radial junction region is formed between at least first and second materials, respectively, having different electronic conductivity characteristics. A principal axis of the at least one radial junction region is oriented along a radius of curvature of the at least one non-linear portion. The optical modulator includes an optical waveguide that is coupled to the at least one non-linear portion of the optical resonator structure.
摘要翻译：公开了一种包括光谐振器结构的光调制器。所述光学谐振器结构包括至少一个非线性部分，所述至少一个非线性部分包括至少一个径向接合区域。所述至少一个径向结区域分别形成在具有不同电子导电特性的至少第一和第二材料之间。所述至少一个径向接合区域的主轴线沿所述至少一个非线性部分的曲率半径定向。光调制器包括耦合到光谐振器结构的至少一个非线性部分的光波导。

4. 发明申请

WO2005029743A2 DATA-LEVEL CLOCK RECOVERY 审中-公开
标题翻译：数据级时钟恢复
公开(公告)号：WO2005029743A2
公开(公告)日：2005-03-31
申请号：PCT/US2004/029347
申请日：2004-09-08
申请人： RAMBUS INC. , STOJANOVIC, Vladimir, M.
发明人： STOJANOVIC, Vladimir, M.
IPC分类号： H04L
CPC分类号： H04L7/0331 , H04L7/0087 , H04L7/0334 , H04L7/0337
摘要： A circuit for adjusting the phase of a clock signal. A first sampling circuit generates a sequence of data samples in response to transitions of the clock signal, each of the data samples having either a first state or a second state according to whether an incoming signal exceeds a first threshold. An second sampling circuit generates an error sample in response to one of the transitions of the clock signal, the error sample having either the first state or the second state according to whether the incoming signal exceeds a second threshold. A phase adjust circuit adjusts the phase of the clock signal if the sequence of data samples matches a predetermined pattern and based, at least in part, on whether the error sample has the first state or the second state.
摘要翻译：用于调整时钟信号相位的电路。第一采样电路响应于时钟信号的转变而生成数据样本序列，根据输入信号是否超过第一阈值，每个数据样本具有第一状态或第二状态。第二采样电路根据输入信号是否超过第二阈值，响应于时钟信号的转换之一产生误差采样，该误差采样具有第一状态或第二状态。如果数据样本序列与预定模式匹配并且至少部分地基于该误差样本是否具有第一状态或第二状态，则相位调整电路调整时钟信号的相位。

5. 发明申请

WO2009085417A3 MULTI-BAND, MULTI-DROP CHIP TO CHIP SIGNALING 审中-公开
公开(公告)号：WO2009085417A3
公开(公告)日：2009-07-09
申请号：PCT/US2008/083231
申请日：2008-11-12
申请人： RAMBUS INC. , ZERBE, Jared, L. , STOJANOVIC, Vladimir, M. , KOLLIPARA, Ravindranath , BEYENE, Wendemagegnehu , AMIRKHANY, Amir , GARLEPP, Bruno
发明人： ZERBE, Jared, L. , STOJANOVIC, Vladimir, M. , KOLLIPARA, Ravindranath , BEYENE, Wendemagegnehu , AMIRKHANY, Amir , GARLEPP, Bruno
IPC分类号： H04L25/08 , H04L5/06 , G06F13/40
摘要： A system comprising: a first integrated circuit device having a multi-band transmission circuit; second and third integrated circuit devices having respective multi-band reception circuits; and a signaling link including a first stub coupled to the multi-band transmission circuit to receive a multi-band signal therefrom, second and third stubs coupled to the multi-band reception circuits of the second and third integrated circuit devices, respectively, to deliver the multi-band signal thereto, and a plurality of channel segments that extend between the first, second and third stubs to convey the multi-band transmission signal therebetween, and wherein at least one of a physical length, impedance or propagation constant of at least one of the first stub, second stub, third stub or channel segment of the plurality of channel segments is selected to spectrally position a frequency- interval exhibiting attenuated frequency response on the signaling link such that multiple passbands separated by the frequency-interval are established to enable conveyance of the multi-band transmission signal on the signaling link.

6. 发明申请

WO2007076229A3 LINEAR TRANSFORMATION CIRCUIT 审中-公开
公开(公告)号：WO2007076229A3
公开(公告)日：2007-07-05
申请号：PCT/US2006/061655
申请日：2006-12-06
申请人： RAMBUS INC. , ABBASFAR, Aliazam , AMIRKHANY, Amir , STOJANOVIC, Vladimir , HOROWITZ, Mark, A.
发明人： ABBASFAR, Aliazam , AMIRKHANY, Amir , STOJANOVIC, Vladimir , HOROWITZ, Mark, A.
IPC分类号： G06J1/00 , G06F17/14 , H04L27/26 , H04J11/00
摘要： A first device is described. The first device may include a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit may have an input to receive a vector having N digital values and an output to output N first output signals, a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H, and a conversion (DAC) circuit coupled to the sign-adjustment circuit. Outputs from the DAC circuit may be summed to produce an output.

7. 发明申请

WO2007024446A2 LINEAR TRANSFORMATION CIRCUITS 审中-公开
标题翻译：线性变换电路
公开(公告)号：WO2007024446A2
公开(公告)日：2007-03-01
申请号：PCT/US2006/030411
申请日：2006-08-02
申请人： RAMBUS INC. , AMIRKHANY, Amir , STOJANOVIC, Vladimir, M. , ALON, Elad , ZERBE, Jared, L. , HOROWITZ, Mark, A.
发明人： AMIRKHANY, Amir , STOJANOVIC, Vladimir, M. , ALON, Elad , ZERBE, Jared, L. , HOROWITZ, Mark, A.
IPC分类号： G06F17/14
CPC分类号： G06F17/141 , G06J1/005
摘要： A transform circuit includes a first circuit and a second circuit. The first circuit and the second circuit implement first and second mappings that together generate a pre-defined transform of N digital data symbols. The first circuit maps a set of N digital data symbols from N parallel data streams to N analog data symbols by generating N sets of first weighted sums of the N digital data symbols. Each respective first weighted sum is defined by a respective set of pre-determined first weighting values in a first matrix. The second circuit maps the N analog data symbols to a sequence of N output signals over N time intervals. Each of the N output signals corresponds to a respective second weighted sum of the N analog data symbols. Each respective second weighted sum is defined by a respective set of pre-determined second weighting values in a second matrix.
摘要翻译：变换电路包括第一电路和第二电路。第一电路和第二电路实现一起产生N个数字数据符号的预定义变换的第一和第二映射。第一电路通过产生N个数字数据符号的第一加权和的N组，将来自N个并行数据流的一组N个数字数据符号映射到N个模拟数据符号。每个相应的第一加权和由第一矩阵中的预定的第一加权值的相应集合来定义。第二电路在N个时间间隔内将N个模拟数据符号映射到N个输出信号的序列。 N个输出信号中的每一个对应于N个模拟数据符号的相应的第二加权和。每个相应的第二加权和由第二矩阵中的预定的第二加权值的相应集合来定义。

8. 发明申请

WO2004105334A3 MARGIN TEST METHODS AND CIRCUITS 审中-公开
标题翻译：测量方法和电路
公开(公告)号：WO2004105334A3
公开(公告)日：2005-06-02
申请号：PCT/US2004015895
申请日：2004-05-20
申请人： RAMBUS INC , GARLEPP BRUNO W , CHEN FRED F , HO ANDREW , STOJANOVIC VLADIMIR
发明人： GARLEPP BRUNO W , CHEN FRED F , HO ANDREW , STOJANOVIC VLADIMIR
IPC分类号： H04L1/20 , H04L1/24 , H04L25/03
CPC分类号： H04L25/03006 , H04L1/20 , H04L1/241 , H04L1/242
摘要： Described are methods and circuits for margin testing digital receivers. Some embodiments prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing, while other embodiments rely upon the statistics of sampled data to explore the margin characteristics of received data.
摘要翻译：描述了数字接收机边缘测试的方法和电路。一些实施例可以防止误差响应于错误接收的数据而崩溃，并且因此可用于采用历史数据的接收机中以减少符号间干扰（ISI）。一些实施例检测未知模式的输入数据流的接收错误，因此可以用于系统内边缘测试。这样的系统可以适于在设备操作期间动态地改变系统参数，以保持足够的余量，尽管由于例如系统噪声环境的波动。温度和电源电压变化。还描述了绘制和解释由所公开的方法和电路产生的滤波和未滤波的误差数据的方法。一些实施例对误差数据进行滤波以便于特定于图案的边缘测试，而其他实施例依赖于采样数据的统计来探索接收数据的边缘特性。

9. 发明申请

WO2004105334A2 MARGIN TEST METHODS AND CIRCUITS 审中-公开
标题翻译：测量方法和电路
公开(公告)号：WO2004105334A2
公开(公告)日：2004-12-02
申请号：PCT/US2004/015895
申请日：2004-05-20
申请人： RAMBUS INC. , GARLEPP, Bruno, W. , CHEN, Fred, F. , HO, Andrew , STOJANOVIC, Vladimir
发明人： GARLEPP, Bruno, W. , CHEN, Fred, F. , HO, Andrew , STOJANOVIC, Vladimir
IPC分类号： H04L25/00
CPC分类号： H04L25/03006 , H04L1/20 , H04L1/241 , H04L1/242
摘要： Described are methods and circuits for margin testing digital receivers. Some embodiments prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing, while other embodiments rely upon the statistics of sampled data to explore the margin characteristics of received data.
摘要翻译：描述了数字接收机边缘测试的方法和电路。一些实施例可以防止误差响应于错误接收的数据而崩溃，并且因此可用于采用历史数据的接收机中以减少符号间干扰（ISI）。一些实施例检测未知模式的输入数据流的接收错误，因此可以用于系统内边缘测试。这样的系统可以适于在设备操作期间动态地改变系统参数，以保持足够的余量，尽管由于例如系统噪声环境的波动。温度和电源电压变化。还描述了绘制和解释由所公开的方法和电路产生的滤波和未滤波的误差数据的方法。一些实施例对误差数据进行滤波以便于特定于图案的边缘测试，而其他实施例依赖于采样数据的统计来探索接收到的数据的边缘特性。

10. 发明申请

WO2009085417A2 MULTI-BAND, MULTI-DROP CHIP TO CHIP SIGNALING 审中-公开
标题翻译：多带，多芯片切片信号
公开(公告)号：WO2009085417A2
公开(公告)日：2009-07-09
申请号：PCT/US2008083231
申请日：2008-11-12
申请人： RAMBUS INC , ZERBE JARED L , STOJANOVIC VLADIMIR M , KOLLIPARA RAVINDRANATH , BEYENE WENDEMAGEGNEHU , AMIRKHANY AMIR , GARLEPP BRUNO
发明人： ZERBE JARED L , STOJANOVIC VLADIMIR M , KOLLIPARA RAVINDRANATH , BEYENE WENDEMAGEGNEHU , AMIRKHANY AMIR , GARLEPP BRUNO
IPC分类号： H04L25/08 , G06F13/40 , H04L5/06
CPC分类号： H04L5/06 , G06F13/4086 , H04L25/085
摘要： A multi-band, multi-drop signaling system. First, second and third integrated circuit devices are coupled to one another via a common signaling link. The first integrated circuit device includes a first transmitter to transmit a baseband signal via the signaling link and a second transmitter to transmit a signal centered around a non-zero frequency via the signaling link.
摘要翻译：一个多频段，多点信号系统。首先，第二和第三集成电路器件通过公共信令链路相互耦合。第一集成电路装置包括经由信令链路发送基带信号的第一发射机和经由信令链路发送以非零频率为中心的信号的第二发射机。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式