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    • 4. 发明专利
    • Ball grid array semiconductor package and method for making the same
    • AU7370398A
    • 1998-11-27
    • AU7370398
    • 1998-05-05
    • SIGNETICS KP CO LTD
    • KARNEZOS MARCOS
    • H01L23/12H01L23/31H01L23/36H01L23/48H01L23/544H05K1/02H05K3/34H01L23/52H01L29/40
    • Disclosed is a semiconductor package arrangement. The package arrangement includes a heat spreader for dissipating heat generated within the semiconductor package arrangement. The package further includes a ground plane having a first side that is attached to the heat spreader with an electrically insulating adhesive. The ground plane has a first aperture defining a path to a surface of the heat spreader that is configured to receive a semiconductor die. An interconnect substrate is adhesively attached to the ground plane, and the interconnect substrate has a complementary second aperture over the first aperture of the ground plane. Preferably, the interconnect substrate has a plurality of metal patterns for electrically interconnecting the semiconductor die to electrical connections that are external to the semiconductor package arrangement. The package arrangement further includes at least one conductively filled via that is defined through the interconnect substrate and is in electrical contact with the ground plane to establish a direct ground connection from selected ones of the plurality of metal patterns of the interconnect substrate. Preferably, a second side of the ground plane includes patterned wetable platting pads over selected regions that are in electrical contact with the at least one conductively filled via that is defined through the interconnect substrate.