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1. 发明授权

US06370676B1 On-demand process sorting method and apparatus 失效
标题翻译：按需处理分拣方法和装置
公开(公告)号：US06370676B1
公开(公告)日：2002-04-09
申请号：US09321048
申请日：1999-05-27
申请人： Masayuki Hayashi , Richard F. Keil , Robert J. Savaglio
发明人： Masayuki Hayashi , Richard F. Keil , Robert J. Savaglio
IPC分类号： B06F1750
CPC分类号： G01R31/3016 , G01R31/319
摘要： A process sort test circuit and methodology for determining performance characteristic of an IC chip. The circuit is located on an IC chip itself and comprises an input for receiving an input signal; a first path from the input to a first output for transmitting the input signal to the first output, the first path sensitive to variations in a manufacturing process for the IC chip; a second path from the input to a second output for transmitting the input signal to the second output, the second path being substantially less sensitive to the variations in the manufacturing process for the IC chip; and, a pulse generator device coupled to the first and second outputs for detecting a difference in arrival times of the input signal at the first and second outputs and for outputting a sort signal if the difference is of a preselected magnitude. The sort signal enables output indication of a performance characteristic of the IC chip.
摘要翻译：用于确定IC芯片的性能特性的工艺分类测试电路和方法。该电路本身位于IC芯片上，并包括用于接收输入信号的输入端; 从输入到用于将输入信号传输到第一输出的第一输出的第一路径，对IC芯片的制造过程中的变化敏感的第一路径; 从输入到第二输出的第二路径，用于将输入信号传输到第二输出，第二路径对于IC芯片的制造过程的变化基本上较不敏感; 以及耦合到所述第一和第二输出的脉冲发生器装置，用于检测在所述第一和第二输出处的所述输入信号的到达时间差，并且如果所述差是预选量值则输出分类信号。分类信号使得IC芯片的性能特性的输出指示。

2. 发明授权

US06212248B1 Shared path phase detector having phase indicator 失效
标题翻译：共享路径相位检测器具有相位指示器
公开(公告)号：US06212248B1
公开(公告)日：2001-04-03
申请号：US09040688
申请日：1998-03-18
申请人： Masayuki Hayashi , Robert J. Savaglio
发明人： Masayuki Hayashi , Robert J. Savaglio
IPC分类号： H03D302
CPC分类号： H03L7/0893 , H03L7/0891 , H03L7/0896 , H04L7/033
摘要： A shared path phase detector and phase indicator circuit provide a phase locked loop circuit for which loading and wiring dependencies are greatly reduced. The phase detector circuit is provided for receiving a reference clock and a second clock. The phase detector circuit provides a separate and unique signal for indicating the magnitude of the difference between the phase of the reference clock and the second clock, regardless of whether the second clock is leading or lagging the first clock. The phase indicator circuit detects whether the second clock is leading or lagging the first clock, and routes the pulses on a first internal signal path to generate either increment or decrement pulses depending on whether the second clock is lagging or leading, respectively. The generation of the increment and decrement pulses is also routed on the first internal signal path, which provides a phase locked loop circuit that does not require matched loading and custom wiring on the internal increment and the decrement paths as required in the prior art.
摘要翻译：共享路径相位检测器和相位指示器电路提供了大大减少负载和布线依赖性的锁相环电路。相位检测器电路用于接收参考时钟和第二时钟。相位检测器电路提供单独且独特的信号，用于指示参考时钟的相位与第二时钟之间的差的大小，而不管第二时钟是引导还是滞后于第一时钟。相位指示器电路检测第二时钟是否在前进或滞后于第一时钟，并且将脉冲路由在第一内部信号路径上以分别根据第二时钟是滞后还是前导而产生增量或递减脉冲。增量和递减脉冲的产生也在第一内部信号路径上路由，其提供了锁相环电路，其不需要现有技术中所需的内部增量和递减路径上的匹配加载和定制接线。

3. 发明授权

US6064235A Shared path phase detector 失效
标题翻译：共享路径相位检测器
公开(公告)号：US6064235A
公开(公告)日：2000-05-16
申请号：US045981
申请日：1998-03-18
申请人： Masayuki Hayashi , Robert J. Savaglio
发明人： Masayuki Hayashi , Robert J. Savaglio
IPC分类号： G06F1/10 , H03D13/00 , H03L7/085 , G01R29/00
CPC分类号： G06F1/10 , H03D13/003 , H03L7/085
摘要： A shared path phase detector circuit for receiving a reference clock and an oscillator clock, the phase detector circuit providing an output signal for indicating a magnitude difference between a phase of the reference and oscillator clocks. The output signal is independently derived from the leading or lagging edge relationship of the reference and oscillator clocks. The output signal does not describe which signal leads, but only the width magnitude difference. The design provides a single path over which the output signal travels, without feedback, such that the circuit dependencies are greatly reduced.
摘要翻译：一种用于接收参考时钟和振荡器时钟的共享路径相位检测器电路，所述相位检测器电路提供用于指示参考相位与振荡器时钟之间的幅度差的输出信号。输出信号独立地从参考和振荡器时钟的前沿或滞后边缘关系导出。输出信号不描述哪个信号引线，而只是宽度幅度差。该设计提供输出信号行进的单个路径，无需反馈，使得电路依赖性大大降低。

4. 发明授权

US4864570A Processing pulse control circuit for use in device performing signature analysis of digital circuits 失效
标题翻译：用于执行数字电路签名分析的设备的处理脉冲控制电路
公开(公告)号：US4864570A
公开(公告)日：1989-09-05
申请号：US67181
申请日：1987-06-29
申请人： Robert J. Savaglio , Peter A. Twombly
发明人： Robert J. Savaglio , Peter A. Twombly
IPC分类号： G01R31/317 , G01R31/28 , G01R31/319 , G06F11/22 , G06F11/277
CPC分类号： G06F11/277 , G06F11/2273
摘要： A processing pulse control circuit for use in treating indeterminate signature increments in an apparatus producing RPT signature analysis of digital circuits. A circuit to control clock pulses to processing devices is provided. The circuit includes a counter to produce a count corresponding to the number of clock pulses received, and also a memory which stores clock count values where indeterminate signature increments will be encountered. A comparator compares the actual clock count values with the stored clock count values to produce a control signal. In response to this control signal, clock pulses are normally allowed to pass to a processing device during clock pulse counts at which determinate signature increments are encountered, but are blocked where indeterminate signature increments are encountered.

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