专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2006112883A Portable digital caliper with enlarged length-measuring area 审中-公开
标题翻译：便携式数字卡尺与扩展长度测量领域
公开(公告)号：JP2006112883A
公开(公告)日：2006-04-27
申请号：JP2004299559
申请日：2004-10-14
申请人： Rintaro Imai , Ks Sanoyas Co Ltd , Shinrin Keizai Kogaku Kenkyusho:Kk , ケーエス・サノヤス株式会社 , 林太郎今井 , 株式会社森林経済工学研究所
发明人： IMAI RINTARO , WADA TOKUYUKI
IPC分类号： G01B3/20
摘要： PROBLEM TO BE SOLVED: To enlarge a measuring area, while keeping accuracy of a digital caliper, even when the length of a measuring object exceeds a length-measuring range of the caliper.
SOLUTION: A guide beam 6 supported by supports 5a, 5b projecting from a beam body 1 is provided extendedly in parallel with the beam body 1 so as to guide displacement of a movable jaw 7 formed on a slider 2. A reference plane 8 giving a displacement reference point of the slider 2 is formed on the tip of the guide beam 6, and a connection mechanism 10 capable of mounting thereon an extension rod 9 is formed on the reference plane part. The extension rod 9 is a connected body of standard-size rods 9A, 9B, 9C, and each standard-size rod has a round number length given in the micron-order accuracy. Hereby, even if the length of the measuring object is different greatly, the length-measuring area thereof can be coped with easily.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：即使当测量对象的长度超过卡尺的长度测量范围时，也可以在保持数字卡尺的精度的同时放大测量区域。解决方案：从梁主体1突出的支撑件5a，5b支撑的引导梁6设置成与梁主体1平行地延伸，以引导形成在滑块2上的活动夹爪7的位移。参考平面在引导梁6的前端形成有滑块2的位移基准点8，在基准面部上形成能够安装有延伸杆9的连接机构10。延伸杆9是标准尺寸的杆9A，9B，9C的连接体，并且每个标准尺寸的杆具有以微米级精度给出的圆形长度。因此，即使测量对象的长度大大不同，也可以容易地应对其长度测量区域。版权所有（C）2006，JPO＆NCIPI

2. 发明申请

US20120159002A1 MEMORY CONTROL DEVICE AND SEMICONDUCTOR PROCESSING APPARATUS 有权
标题翻译：存储器控制装置和半导体处理装置
公开(公告)号：US20120159002A1
公开(公告)日：2012-06-21
申请号：US13406262
申请日：2012-02-27
申请人： Rintaro IMAI , Satoshi Nakano
发明人： Rintaro IMAI , Satoshi Nakano
IPC分类号： G06F13/14
CPC分类号： G06F13/1689
摘要： The present invention provides a memory control device and a semiconductor processing apparatus which can be flexibly made adapted to a plurality of kinds of semiconductor memories. An SDRAM controller has: a register unit to which a command to be issued and a minimum interval (wait time) between issue of the command and issue of the next command are written by a CPU; and a command issuing unit that stops issue of the next command until the minimum interval written in the register elapses since issue of the command written in the register. Therefore, by changing software for the CPU, the SDRAM controller can be flexibly adapted to a plurality of kinds of SDRAMs.
摘要翻译：本发明提供一种能够灵活地适应多种半导体存储器的存储器控制装置和半导体处理装置。 SDRAM控制器具有：由CPU写入发出命令和发出下一个命令的最小间隔（等待时间）的寄存器单元; 以及一个命令发布单元，直到写入寄存器中的命令发出后，停止发出下一个命令直到写入寄存器的最小间隔过去。因此，通过改变CPU的软件，可以将SDRAM控制器灵活地适应于多种SDRAM。

3. 发明申请

US20090089517A1 MEMORY CONTROL DEVICE AND SEMICONDUCTOR PROCESSING APPARATUS 有权
标题翻译：存储器控制装置和半导体处理装置
公开(公告)号：US20090089517A1
公开(公告)日：2009-04-02
申请号：US12237208
申请日：2008-09-24
申请人： Rintaro Imai , Satoshi Nakano
发明人： Rintaro Imai , Satoshi Nakano
IPC分类号： G06F12/00
CPC分类号： G06F13/1689
摘要： The present invention provides a memory control device and a semiconductor processing apparatus which can be flexibly made adapted to a plurality of kinds of semiconductor memories. An SDRAM controller has: a register unit to which a command to be issued and a minimum interval (wait time) between issue of the command and issue of the next command are written by a CPU; and a command issuing unit that stops issue of the next command until the minimum interval written in the register elapses since issue of the command written in the register. Therefore, by changing software for the CPU, the SDRAM controller can be flexibly adapted to a plurality of kinds of SDRAMs.
摘要翻译：本发明提供一种能够灵活地适应于多种半导体存储器的存储器控制装置和半导体处理装置。 SDRAM控制器具有：由CPU写入发出命令和发出下一个命令的最小间隔（等待时间）的寄存器单元; 以及一个命令发布单元，直到写入寄存器中的命令发出后，停止发出下一个命令直到写入寄存器的最小间隔过去。因此，通过改变CPU的软件，可以将SDRAM控制器灵活地适应于多种SDRAM。

4. 发明授权

US08397036B2 Memory control device and semiconductor processing apparatus 有权
标题翻译：存储器控制装置和半导体处理装置
公开(公告)号：US08397036B2
公开(公告)日：2013-03-12
申请号：US13406262
申请日：2012-02-27
申请人： Rintaro Imai , Satoshi Nakano
发明人： Rintaro Imai , Satoshi Nakano
IPC分类号： G06F13/20
CPC分类号： G06F13/1689
摘要： The present invention provides a memory control device and a semiconductor processing apparatus which can be flexibly made adapted to a plurality of kinds of semiconductor memories. An SDRAM controller has: a register unit to which a command to be issued and a minimum interval (wait time) between issue of the command and issue of the next command are written by a CPU; and a command issuing unit that stops issue of the next command until the minimum interval written in the register elapses since issue of the command written in the register. Therefore, by changing software for the CPU, the SDRAM controller can be flexibly adapted to a plurality of kinds of SDRAMs.
摘要翻译：本发明提供一种能够灵活地适应于多种半导体存储器的存储器控制装置和半导体处理装置。 SDRAM控制器具有：由CPU写入发出命令和发出下一个命令的最小间隔（等待时间）的寄存器单元; 以及一个命令发布单元，直到写入寄存器中的命令发出后，停止发出下一个命令直到写入寄存器的最小间隔过去。因此，通过改变CPU的软件，可以将SDRAM控制器灵活地适应于多种SDRAM。

5. 发明授权

US08151065B2 Memory control device and semiconductor processing apparatus 有权
标题翻译：存储器控制装置和半导体处理装置
公开(公告)号：US08151065B2
公开(公告)日：2012-04-03
申请号：US12237208
申请日：2008-09-24
申请人： Rintaro Imai , Satoshi Nakano
发明人： Rintaro Imai , Satoshi Nakano
IPC分类号： G06F13/16
CPC分类号： G06F13/1689
摘要： The present invention provides a memory control device and a semiconductor processing apparatus which can be flexibly made adapted to a plurality of kinds of semiconductor memories. An SDRAM controller has: a register unit to which a command to be issued and a minimum interval (wait time) between issue of the command and issue of the next command are written by a CPU; and a command issuing unit that stops issue of the next command until the minimum interval written in the register elapses since issue of the command written in the register. Therefore, by changing software for the CPU, the SDRAM controller can be flexibly adapted to a plurality of kinds of SDRAMs.
摘要翻译：本发明提供一种能够灵活地适应于多种半导体存储器的存储器控制装置和半导体处理装置。 SDRAM控制器具有：由CPU写入发出命令和发出下一个命令的最小间隔（等待时间）的寄存器单元; 以及一个命令发布单元，直到写入寄存器中的命令发出后，停止发出下一个命令直到写入寄存器的最小间隔过去。因此，通过改变CPU的软件，可以将SDRAM控制器灵活地适应于多种SDRAM。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式