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1. 发明申请

US20050125650A1 Apparatus, system, and method for adapter fastload 有权
标题翻译：适配器快速装载的装置，系统和方法
公开(公告)号：US20050125650A1
公开(公告)日：2005-06-09
申请号：US10717822
申请日：2003-11-20
申请人： James Chen , Brian Corcoran , Matthew Kalos , Ricardo Padilla
发明人： James Chen , Brian Corcoran , Matthew Kalos , Ricardo Padilla
IPC分类号： G06K19/07 , G06F9/00 , G06F9/445 , G06F11/00 , G06F13/28
CPC分类号： G06F8/65
摘要： An apparatus, system, and method are disclosed for fastload code update on a communications adapter. The apparatus includes an image load module, a memory initialization module, and an image overlay module. The image load module is configured to load a copy of a new code image in a memory on the communications adapter. The memory also concurrently stores a copy of an old code image used by the communications adapter. The memory initialization module is configured to invoke the new code image to perform a memory initialization operation. The memory initialization module may perform the memory initialization operation concurrently with ongoing I/O requests possibly accepted, but not necessarily processed, by the old code image. The image overlay module is configured to overlay the old code image with the new code image. The fastload code update minimizes the time that the communications adapter is off-line to overlay the old code image with the new code image and reinitialize the communications adapter.
摘要翻译：公开了用于通信适配器上的快速加载代码更新的装置，系统和方法。该装置包括图像加载模块，存储器初始化模块和图像覆盖模块。图像加载模块被配置为将新代码图像的副本加载到通信适配器上的存储器中。存储器还同时存储通信适配器使用的旧代码映像的副本。存储器初始化模块被配置为调用新的代码图像以执行存储器初始化操作。存储器初始化模块可以与可能接受但不一定由旧代码映像处理的正在进行的I / O请求同时执行存储器初始化操作。图像叠加模块被配置为使用新的代码图像覆盖旧的代码图像。快速代码更新最大限度地缩短通信适配器离线覆盖旧代码图像与新代码映像并重新初始化通信适配器的时间。

2. 发明申请

US20050114685A1 Apparatus, system, and method for updating an embedded code image 有权
标题翻译：用于更新嵌入式代码图像的装置，系统和方法
公开(公告)号：US20050114685A1
公开(公告)日：2005-05-26
申请号：US10717941
申请日：2003-11-20
申请人： Stephen Blinick , Brian Corcoran , Matthew Kalos , Ricardo Padilla
发明人： Stephen Blinick , Brian Corcoran , Matthew Kalos , Ricardo Padilla
IPC分类号： G06F9/44 , G06F9/445 , G06F11/30 , G06F15/177
CPC分类号： G06F8/65
摘要： An apparatus, system, and method are provided for updating a code image. The apparatus, system, and method include a loader for loading a new code image into a temporary memory location separate from the memory location occupied by the old code image. A conversion module of the new code image executes and selectively reconciles incompatibilities between the old code image and the new code image. In one aspect, once incompatibilities are reconciled, a copy module copies the new code image into the memory space occupied by the old code image.
摘要翻译：提供了一种用于更新代码图像的装置，系统和方法。装置，系统和方法包括用于将新代码图像加载到与旧代码图像占据的存储器位置分离的临时存储器位置的加载器。新代码图像的转换模块执行并选择性地协调旧代码图像和新代码图像之间的不兼容性。在一个方面，一旦不兼容性被协调，复制模块将新的代码图像复制到由旧代码图像占据的存储器空间中。

3. 发明申请

US20140135686A1 CATHETER WITH FLAT BEAM DEFLECTION IN TIP 有权
标题翻译：带有平面波束的导管提示
公开(公告)号：US20140135686A1
公开(公告)日：2014-05-15
申请号：US13677214
申请日：2012-11-14
申请人： Jose Jimenez , Ricardo Padilla , Thomas V. Selkee
发明人： Jose Jimenez , Ricardo Padilla , Thomas V. Selkee
IPC分类号： A61M25/01
CPC分类号： A61M25/0147 , A61B18/1492 , A61M25/0009 , A61M25/0026 , A61M25/0051 , A61M25/0052 , A61M25/0138 , A61M25/0141 , A61M25/0144 , A61M2025/015 , A61M2207/00 , B29C63/0069 , B29C63/18 , B29C65/02 , B29K2995/0049 , B29L2031/7542
摘要： A catheter has a deflection beam with rectangular cross-section and a single continuous puller wire for predictable on-plane bi-directional deflection. The puller wire extends through spacers on opposite sides of the beam so the puller wire is maintained a predetermined separation distance from the beam surface. Tubular structures of the catheter body and the deflectable section are fused at a joint by C-shaped brackets mounted opposite surface of the beam to form a hollow body with holes into which thermoplastic materials covering the catheter body and the deflectable section can melt to form interlocking nodes. Elongated beam stiffeners can be mounted on the beam to provide different curve and deflection geometries.
摘要翻译：导管具有矩形横截面的偏转光束和用于可预测的平面双向偏转的单个连续拉线。拉线延伸通过梁的相对侧上的间隔件，使得拉线保持与梁表面预定的间隔距离。导管主体和可偏转部分的管状结构通过与梁的相对表面安装的C形支架熔合在一起，以形成具有孔的中空体，覆盖导管主体和可偏转部分的热塑性材料可以熔化以形成互锁节点。伸长的梁加强件可以安装在梁上，以提供不同的曲线和偏转几何形状。

4. 发明申请

US20080098257A1 Multiple Execution-Path System 审中-公开
标题翻译：多执行路径系统
公开(公告)号：US20080098257A1
公开(公告)日：2008-04-24
申请号：US11960440
申请日：2007-12-19
申请人： Stephen Blinick , Charles Cardinell , Ricardo Padilla
发明人： Stephen Blinick , Charles Cardinell , Ricardo Padilla
IPC分类号： G06F11/08
CPC分类号： G06F11/1417 , G06F11/1666 , G06F11/2284
摘要： A multiple execution-path flash system includes a main flash image with primary and secondary POST and Boot executable files. The secondary executables are offset from the primary executables by a predetermined offset address. If corrupted data is encountered during Boot, the exception handler sets an offset bit resulting in the predetermined offset address being added to the current instruction address. If corrupted data is encountered in the secondary executables, the offset bit is reset. An optional redundant flash image may also be used. A failure at the same relative address in the primary and secondary executables of the main flash image will cause the exception handler to transfer control to the redundant flash image. A subsequent failure at the same relative address in the primary and secondary executables of the redundant flash image will cause the redundant exception handler to transfer control back to the main flash image.
摘要翻译：多个执行路径闪存系统包括主闪存映像，主要和辅助POST和引导可执行文件。次级可执行文件与主要可执行文件偏移预定的偏移地址。如果在引导期间遇到损坏的数据，则异常处理程序设置偏移位，导致预定的偏移地址被添加到当前指令地址。如果在二级可执行文件中遇到损坏的数据，则偏移位被复位。也可以使用可选的冗余闪光图像。在主闪存映像的主要和次要可执行文件中的相同相对地址的故障将导致异常处理程序将控制传输到冗余闪存映像。冗余闪存映像的主要和次要可执行文件中的相同相对地址的后续故障将导致冗余异常处理程序将控制权传输回主Flash映像。

5. 发明申请

US20060248107A1 Apparatus system and method for updating software while preserving system state 审中-公开
标题翻译：用于在保持系统状态的同时更新软件的装置系统和方法
公开(公告)号：US20060248107A1
公开(公告)日：2006-11-02
申请号：US11103278
申请日：2005-04-11
申请人： Juan Coronado , Angelica Hemme , Bret Holley , Ricardo Padilla
发明人： Juan Coronado , Angelica Hemme , Bret Holley , Ricardo Padilla
IPC分类号： G06F7/00 , G06F17/00
CPC分类号： G06F8/60
摘要： An apparatus, system, and method are disclosed for updating software components while preserving data associated with the software and optionally converting the data to a new format. Persistent memory is used to preserve data structures associated with software components during the software update process, which may be accomplished by save and restore functions intrinsic to the software component being updated. The present invention includes, in one embodiment, a persistent data registry used to register each data structure saved in persistent memory during a software update. A data structure information record may be used to register each data structure in the persistent data registry. The present invention incorporates individual conversion of each data structure to facilitate adding, deleting, or modifying data structures during the software update process to accommodate the requirements of the updated software.
摘要翻译：公开了用于更新软件组件的装置，系统和方法，同时保留与软件相关联的数据并且可选地将数据转换为新格式。持久存储器用于在软件更新过程期间保留与软件组件相关联的数据结构，这可以通过保存和恢复正在更新的软件组件固有的功能来实现。本发明在一个实施例中包括用于在软件更新期间注册保存在持久存储器中的每个数据结构的持久数据注册器。可以使用数据结构信息记录来注册持久数据注册表中的每个数据结构。本发明包括每个数据结构的单独转换以便于在软件更新过程期间添加，删除或修改数据结构以适应更新的软件的要求。

6. 发明申请

US20060155979A1 Multiple execution-path system 失效
标题翻译：多个执行路径系统
公开(公告)号：US20060155979A1
公开(公告)日：2006-07-13
申请号：US11031605
申请日：2005-01-07
申请人： Stephen Blinick , Charles Cardinell , Ricardo Padilla
发明人： Stephen Blinick , Charles Cardinell , Ricardo Padilla
IPC分类号： G06F9/24
CPC分类号： G06F11/1417 , G06F11/1666 , G06F11/2284
摘要： A multiple execution-path flash system includes a main flash image with primary and secondary POST and Boot executable files. The secondary executables are offset from the primary executables by a predetermined offset address. If corrupted data is encountered during Boot, the exception handler sets an offset bit resulting in the predetermined offset address being added to the current instruction address. If corrupted data is encountered in the secondary executables, the offset bit is reset. An optional redundant flash image may also be used. A failure at the same relative address in the primary and secondary executables of the main flash image will cause the exception handler to transfer control to the redundant flash image. A subsequent failure at the same relative address in the primary and secondary executables of the redundant flash image will cause the redundant exception handler to transfer control back to the main flash image.
摘要翻译：多个执行路径闪存系统包括主闪存映像，主要和辅助POST和引导可执行文件。次级可执行文件与主要可执行文件偏移预定的偏移地址。如果在引导期间遇到损坏的数据，则异常处理程序设置偏移位，导致预定的偏移地址被添加到当前指令地址。如果在二级可执行文件中遇到损坏的数据，则偏移位被复位。也可以使用可选的冗余闪光图像。在主闪存映像的主要和次要可执行文件中的相同相对地址的故障将导致异常处理程序将控制传输到冗余闪存映像。冗余闪存映像的主要和次要可执行文件中的相同相对地址的后续故障将导致冗余异常处理程序将控制权传输回主Flash映像。

7. 发明申请

US20060150030A1 Management of memory controller reset 有权
标题翻译：管理存储器控制器复位
公开(公告)号：US20060150030A1
公开(公告)日：2006-07-06
申请号：US11030477
申请日：2005-01-06
申请人： Lucien Mirabeau , Charles Cardinell , Man Ma , Ricardo Padilla
发明人： Lucien Mirabeau , Charles Cardinell , Man Ma , Ricardo Padilla
IPC分类号： G06F11/00
CPC分类号： G06F11/0793 , G06F11/0727
摘要： An error handling method is provided for processing adapter errors. Rather than executing a disruptive controller hardware reset, an error handling routine provides instructions for a reset operation to be loaded and executed from cache while the SDRAM is in self-refresh mode and therefore unusable.
摘要翻译：提供错误处理方法来处理适配器错误。错误处理例程不是执行中断控制器硬件复位，而是在SDRAM处于自刷新模式并因此不可用时，提供要从高速缓存加载和执行的复位操作的指令。

8. 发明申请

US20060149952A1 Exception handling in a multiprocessor system 失效
公开(公告)号：US20060149952A1
公开(公告)日：2006-07-06
申请号：US11000705
申请日：2004-11-30
申请人： Stephen Blinick , Ricardo Padilla
发明人： Stephen Blinick , Ricardo Padilla
IPC分类号： G06F7/38
CPC分类号： G06F9/3861 , G06F9/4812
摘要： In one embodiment, a first processor of a multiprocessor system, encounters an exception and jumps to exception handler code at an architecture-defined exception vector. The processor is directed to a data structure which provides a programmable exception vector to additional exception handler code. This additional code may be executed as if it were located at the architecture-defined exception vector. Other embodiments are described and claimed.

9. 发明申请

US20050114391A1 Apparatus, system, and method for communicating a binary code image 失效
标题翻译：用于传送二进制代码图像的装置，系统和方法
公开(公告)号：US20050114391A1
公开(公告)日：2005-05-26
申请号：US10718420
申请日：2003-11-20
申请人： Brian Corcoran , Lourdes Gee , Matthew Kalos , Ricardo Padilla
发明人： Brian Corcoran , Lourdes Gee , Matthew Kalos , Ricardo Padilla
IPC分类号： G06F9/445 , G06F17/00
CPC分类号： G06F9/4401 , Y10S707/99942
摘要： An apparatus, system, and method are disclosed for communicating binary data using a self-descriptive binary data structure. The binary data structure also may be referred to as a microcode reconstruct and boot (MRB) image. The binary data structure includes a plurality of data segments, a target data set, and a data structure descriptor. Each of the data segments has a data segment header and data field. The target data set is stored within the data field and may be an executable. The data structure descriptor is descriptive of the binary data structure and identifies the location of the target data set within the data field. The binary data structure is self-descriptive in that the location of an individual target data set may be identified by the data structure descriptor.
摘要翻译：公开了一种使用自描述二进制数据结构传送二进制数据的装置，系统和方法。二进制数据结构也可以称为微代码重建和引导（MRB）图像。二进制数据结构包括多个数据段，目标数据集和数据结构描述符。每个数据段具有数据段头和数据字段。目标数据集存储在数据字段内，并且可以是可执行的。数据结构描述符描述二进制数据结构，并识别数据字段中目标数据集的位置。二进制数据结构是自描述的，因为单个目标数据集的位置可以由数据结构描述符来识别。

10. 发明专利

IL258106A Catheter with improved loop contraction and greater contraction displacement 未知
公开(公告)号：IL258106A
公开(公告)日：2021-07-29
申请号：IL25810618
申请日：2018-03-14
申请人： BIOSENSE WEBSTER ISRAEL LTD , KESHAVA DATTA , RICARDO PADILLA , HOMERO PADILLA , JULIE BUI , MARIO SOLIS , THOMAS SELKEE , JOSE JIMENEZ , FERNANDO SALAZAR
发明人： KESHAVA DATTA , RICARDO PADILLA , HOMERO PADILLA , JULIE BUI , MARIO SOLIS , THOMAS SELKEE , JOSE JIMENEZ , FERNANDO SALAZAR
IPC分类号： A61B17/00 , A61B5/00 , A61B18/00 , A61B18/14 , A61M25/00 , A61M25/01
摘要： A catheter with a variable circular loop is responsive to a contraction wire for increasing the coiling of the circular loop. The shape of the loop is supported by an elongated member, wherein a radially constrictive sleeve confines the contraction wire to extends immediately alongside the length of elongated member so as to improve uniformity and minimize misshaping of the loop during contraction.

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