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1. 发明授权

US5295161A Fiber optic amplifier with active elements feedback circuit 失效
标题翻译：具有有源元件反馈电路的光纤放大器
公开(公告)号：US5295161A
公开(公告)日：1994-03-15
申请号：US698626
申请日：1991-05-10
申请人： Daniel M. Dreps , Raymond P. Rizzo
发明人： Daniel M. Dreps , Raymond P. Rizzo
IPC分类号： H03F3/34 , H03F3/08 , H03F3/45 , H04B10/158 , H04L25/06
CPC分类号： H04B10/6933 , H03F3/08
摘要： A differential transimpedance amplifier used in amplifying optical signals transmitted with a balanced code has a level restore circuit which integrates the digital output of the amplifier and feeds back the result to one of the differential inputs of the amplifier. The feedback signal removes imbalances from the amplifier output. The balanced amplifier output can then be processed by a clock reconstruction circuit to accurately sample the received optical signal with a low bit error rate.
摘要翻译：用于放大用平衡码发射的光信号的差分跨阻放大器具有电平恢复电路，其对放大器的数字输出进行积分并将结果反馈到放大器的差分输入之一。反馈信号消除了放大器输出的不平衡。然后，平衡放大器输出可以由时钟重构电路处理，以以低误码率对接收的光信号进行精确采样。

2. 发明授权

US5604466A On-chip voltage controlled oscillator 失效
标题翻译：片上压控振荡器
公开(公告)号：US5604466A
公开(公告)日：1997-02-18
申请号：US345280
申请日：1994-11-28
申请人： Daniel M. Dreps , Raymond P. Rizzo
发明人： Daniel M. Dreps , Raymond P. Rizzo
IPC分类号： H03K3/282 , H03L7/099 , H03L7/14 , H03K3/281
CPC分类号： H03K3/2821 , H03L7/099 , H03L7/14 , Y10S323/907
摘要： An on-chip voltage controlled oscillator for use in an analog phase locked loop receives power from a voltage regulator which greatly reduces the noise seen by the voltage controlled oscillator. The voltage controlled oscillator has a DC bias section which supplies a relatively constant current to the multivibrator to assure a minimum operating frequency. A control signal is used to provide additional current which increases the speed of oscillation. The bias current reduces the transfer characteristics (MHz/volt) of the voltage controlled oscillator making it more immune to noise in the control signal.
摘要翻译：用于模拟锁相环的片上压控振荡器从电压调节器接收电力，这大大降低了压控振荡器所看到的噪声。压控振荡器具有DC偏压部分，其向多谐振荡器提供相对恒定的电流以确保最小工作频率。控制信号用于提供增加振荡速度的附加电流。偏置电流降低了压控振荡器的传输特性（MHz /伏特），使其更加免于控制信号中的噪声。

3. 发明授权

US5508664A Oscillators having charge/discharge circuits with adjustment to maintain desired duty cycles 失效
标题翻译：振荡器具有调整的充电/放电电路，以保持所需的占空比
公开(公告)号：US5508664A
公开(公告)日：1996-04-16
申请号：US425761
申请日：1995-04-20
申请人： Raymond P. Rizzo
发明人： Raymond P. Rizzo
IPC分类号： H03K3/017 , H03K3/0231
CPC分类号： H03K3/017
摘要： An oscillator comprises a comparator and first and second switches for alternately connecting first and second respective reference voltages to a first input of the comparator. A capacitor is connected to a second input of the comparator, and a current source and a current sink are alternately connected to the capacitor via third and fourth switches. The first and third switches are closed simultaneously based on one output level of the comparator, and the second and fourth switches are closed simultaneously based on the other output level of the comparator. This causes the output of the compartor to alternate and thereby generate an oscillation signal. To provide precision in the duty cycles, either the second reference voltage, the current source or the current sink is adjusted to maintain desired duty cycles of the high and low levels output from the comparator. The adjustment to the second reference voltage, current source or current sink is based on an average voltage of the capacitor in relation to a third reference voltage.
摘要翻译：振荡器包括比较器和用于将第一和第二相应参考电压交替地连接到比较器的第一输入的第一和第二开关。电容器连接到比较器的第二输入端，电流源和电流吸收器经由第三和第四开关交替地连接到电容器。第一和第三开关基于比较器的一个输出电平同时闭合，并且第二和第四开关基于比较器的另一个输出电平同时闭合。这使得compartor的输出交替，从而产生振荡信号。为了提供占空比的精度，调整第二参考电压，电流源或电流吸收器以保持比较器输出的高电平和低电平的期望占空比。对第二参考电压，电流源或电流吸收器的调整基于电容器相对于第三参考电压的平均电压。

4. 发明授权

US4787097A NRZ phase-locked loop circuit with associated monitor and recovery circuitry 失效
标题翻译： NRZ锁相环电路，具有相关的监视器和恢复电路
公开(公告)号：US4787097A
公开(公告)日：1988-11-22
申请号：US13598
申请日：1987-02-11
申请人： Raymond P. Rizzo
发明人： Raymond P. Rizzo
IPC分类号： H03L7/087 , H03L7/095 , H03L7/113 , H04L7/02
CPC分类号： H03L7/113 , H03L7/095 , Y10S331/02
摘要： Monitor circuitry is placed in the closed loop of a phase-locked loop (PLL) circuit and is capable of detecting the existence of an out of frequency window condition and outputting a control signal when the PLL is operating outside the predetermined narrow frequency window. Recovery circuitry, including a phase frequency detector with a wide acquisition range, temporarily replaces the normal phase detector of the PLL, responsive to the control signal from the monitor circuitry. When the monitor circuitry determines that the PLL is back within the predetermined narrow frequency window, the PLL phase detector is switched back into the PLL loop and the phase frequency detector is removed from the PLL loop. The PLL phase detector is then able to lock in on the incoming data stream. In the preferred embodiment, the monitor and recovery circuitry and connected to a specialized PLL circuit which utilizes a 180 degree phase difference between incoming NRZ data and the recovered clock to strobe the data in the center of the input data pulse, thus improving the data error rate.

5. 发明授权

US5039952A Electronic gain cell 失效
标题翻译：电子增益电池
公开(公告)号：US5039952A
公开(公告)日：1991-08-13
申请号：US512304
申请日：1990-04-20
申请人： Daniel M. Dreps , Raymond P. Rizzo
发明人： Daniel M. Dreps , Raymond P. Rizzo
IPC分类号： H03F3/08 , H03F3/45 , H03G1/00 , H03G3/20 , H04B10/00
CPC分类号： H03G3/3084 , H03G1/0023
摘要： An amplifier circuit comprises first and second gain cells connected in cascade. Each of the gain cells comprises first and second common emitter differential transistors, a current source coupled to the emitters of the transistors, a first plurality of forward biased, series diodes connected between a power supply terminal and a base of the first transistor, and a second plurality of forward biased, series diodes connected between the power supply terminal and a base of the second transistor. A collector of the first transistor of the first gain cell is connected to the base of the first transistor of the second gain cell, and a collector of the second transistor of a first gain cell is connected to the base of the second transistor of the second gain cell. Because of the low inherent resistance of the biasing diodes, the operating speed of the amplifier is large, and the current amplification can be large without exceeding the power supply voltage. The current source limits the gain for high level signals without causing saturation of the transistors and therefore, does not comprise operating speed. The gain of each cell equals the numbers of diodes connected to the base of the transistor until the level of the current source.

6. 发明授权

US5490282A Interface having serializer including oscillator operating at first frequency and deserializer including oscillator operating at second frequency equals half first frequency for minimizing frequency interference 失效
标题翻译：具有包括在第一频率工作的振荡器的串行器的接口和包括以第二频率工作的振荡器的解串器等于半第一频率以最小化频率干扰
公开(公告)号：US5490282A
公开(公告)日：1996-02-06
申请号：US988593
申请日：1992-12-08
申请人： Daniel M. Dreps , Raymond P. Rizzo
发明人： Daniel M. Dreps , Raymond P. Rizzo
IPC分类号： H03M9/00 , G06F15/02
CPC分类号： H03M9/00
摘要： A serial communication interface for sending and receiving serial data is provided including a serializer and a deserializer.The serializer is designed so that the serializer VCO has a center frequency that is one half the center frequency of the deserializer VCO. The serializer uses both edges of the clock to mix the serial bits. The deserializer design is unchanged. The two VCO's are implemented on separate chips with both chips located on the same metallized ceramic substrate with a ground plane about 40 mm apart. Near frequency interaction is significantly reduced.
摘要翻译：提供用于发送和接收串行数据的串行通信接口，包括串行器和解串器。串行器被设计成使得串行器VCO的中心频率是解串器VCO的中心频率的一半。串行器使用时钟的两边来混合串行位。解串器设计不变。两个VCO在独立的芯片上实现，两个芯片位于相同的金属化陶瓷基板上，其间距约为40毫米。近频互动显着减少。

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