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1. 发明申请

US20100151035A1 PHARMACEUTICAL COMPOSITIONS OF POORLY SOLUBLE DRUGS 审中-公开
标题翻译：不溶性药物的药物组合物
公开(公告)号：US20100151035A1
公开(公告)日：2010-06-17
申请号：US12529504
申请日：2008-03-10
申请人： Bharatrajan Ramaswami , Manisha Rajesh Patil , Aditi Das
发明人： Bharatrajan Ramaswami , Manisha Rajesh Patil , Aditi Das
IPC分类号： A61K9/16 , A61K31/56 , A61K38/43 , A61K38/02 , A61K38/16 , A61K31/165 , A61K31/437 , A61K31/4184 , A61K31/415 , A61K38/13 , A61K31/573 , A61K31/397 , A61K31/235 , A61K31/403 , A61K31/495 , A61K31/343 , A61K31/496 , A61K31/202 , A61K31/5377 , A61K31/436 , A61K31/138 , B05D1/02
CPC分类号： A61K31/5377 , A61K9/1652 , A61K9/1676 , A61K9/1694 , A61K31/216 , A61K31/397 , A61K31/4184 , A61K31/4535 , A61K31/64 , C07D205/08 , C07D235/18 , C07D241/24 , C07D333/56 , C07D413/06
摘要： The present invention relates to a stable pharmaceutical composition of a poorly water-soluble drug with a view to increasing its solubility and bioavailability. The present invention relates to a solid dispersion of a poorly water-soluble drug.
摘要翻译：本发明涉及一种水难溶性药物的稳定药物组合物，以增加其溶解度和生物利用度。本发明涉及难溶于水的药物的固体分散体。

2. 发明授权

US07085918B2 Methods and apparatuses for evaluation of regular expressions of arbitrary size 失效
标题翻译：用于评估任意大小的正则表达式的方法和装置
公开(公告)号：US07085918B2
公开(公告)日：2006-08-01
申请号：US10755048
申请日：2004-01-08
申请人： Harshvardan Sharangpani , Manoj Khare , Kent Fielden , Rajesh Patil , Judge Kennedy Arora
发明人： Harshvardan Sharangpani , Manoj Khare , Kent Fielden , Rajesh Patil , Judge Kennedy Arora
IPC分类号： G06F15/00 , G06F17/28
CPC分类号： G06F7/00 , G06F17/30985
摘要： Embodiments of the invention provide a programmable FSA building block, having a number of programmable registers and associated logic implemented therein, that provide the capability of contextually evaluating complex REs of arbitrary size against multiple data streams. Embodiments of the invention provide fully programmable hardware in which all of the states of an RE are instantiated and all of the states are fully connected. For one embodiment, the building blocks have a fixed number of states to facilitate implementation on a chip. For such an embodiment, an RE having an excessive number of states is implemented on two or more FSA building blocks and the FSA building blocks are then stitched together to effect evaluation of the RE. For one embodiment, two or more REs having a number of states less than the fixed number of states of a building block may be implemented with a single building block.
摘要翻译：本发明的实施例提供了一种可编程FSA构建块，其具有在其中实现的多个可编程寄存器和相关联的逻辑，其提供对多个数据流进行任意大小的复杂RE的上下文评估的能力。本发明的实施例提供了完全可编程硬件，其中RE的所有状态都被实例化，并且所有状态都完全连接。对于一个实施例，构建块具有固定数量的状态以便于在芯片上实现。对于这样的实施例，在两个或更多个FSA构建块上实现具有过多状态的RE，然后将FSA构建块缝合在一起以实现RE的评估。对于一个实施例，具有小于构建块的固定状态数量的状态数量的两个或更多个RE可以用单个构建块来实现。

3. 发明申请

US20130078940A1 RADIO ACCESS TECHNOLOGY (RAT) BASED CALL CONTROL 审中-公开
标题翻译：无线接入技术（RAT）基于呼叫控制
公开(公告)号：US20130078940A1
公开(公告)日：2013-03-28
申请号：US13625504
申请日：2012-09-24
申请人： Rajesh Patil , Asimava Bera , Krishna Chaitanya Pinnaka , Ramji Grandhi , Ravichandra Soordelu
发明人： Rajesh Patil , Asimava Bera , Krishna Chaitanya Pinnaka , Ramji Grandhi , Ravichandra Soordelu
IPC分类号： H04W40/02 , H04W4/22 , H04W24/00
CPC分类号： H04W76/50
摘要： Embodiments of the present invention enable and facilitate radio access technology based call control. For example, a method for call control is described. A call request that includes a call number is received. A call type of the call request is identified based on the call number. A radio access technology associated with the call number and the call type is determined. A call is performed using the radio access technology associated with the call number and the call type. In some instances, embodiments can be used for emergency type calls. Other aspects, embodiments, and features are also claimed and described.
摘要翻译：本发明的实施例实现并促进基于无线电接入技术的呼叫控制。例如，描述了用于呼叫控制的方法。接收到包含呼叫号码的呼叫请求。呼叫请求的呼叫类型根据呼叫号码进行识别。确定与呼叫号码和呼叫类型相关联的无线接入技术。使用与呼叫号码和呼叫类型相关联的无线电接入技术来执行呼叫。在某些情况下，实施例可用于紧急呼叫。还要求和描述其它方面，实施例和特征。

4. 发明授权

US07451143B2 Programmable rule processing apparatus for conducting high speed contextual searches and characterizations of patterns in data 有权
标题翻译：用于进行数据中模式的高速上下文搜索和表征的可编程规则处理装置
公开(公告)号：US07451143B2
公开(公告)日：2008-11-11
申请号：US10650363
申请日：2003-08-27
申请人： Harshvardhan Sharangpani , Rajesh Patil
发明人： Harshvardhan Sharangpani , Rajesh Patil
IPC分类号： G06F17/30 , G06F7/38
CPC分类号： G06F17/30985 , Y10S707/99933 , Y10S707/99936
摘要： A method and apparatus is disclosed herein for a rule processor for conducting contextual searches, the processor comprising a plurality of input payload search registers, search execution engine coupled to the plurality of search registers to perform one or more contextual searches on content in the search registers by via parallel pattern matching in response to executing rules specifying the one or more searches, and presenting one or more patterns to the content in the search registers.
摘要翻译：本文公开了一种用于执行上下文搜索的规则处理器的方法和装置，所述处理器包括多个输入有效载荷搜索寄存器，耦合到所述多个搜索寄存器的搜索执行引擎，以对所述搜索寄存器中的内容执行一个或多个上下文搜索通过响应于指定一个或多个搜索的执行规则通过并行模式匹配，以及向搜索寄存器中的内容呈现一个或多个模式。

5. 发明授权

US07529908B2 Method and apparatus for unified exception handling with distributed exception identification 有权
标题翻译：用于统一异常处理的分布式异常识别方法和装置
公开(公告)号：US07529908B2
公开(公告)日：2009-05-05
申请号：US11431444
申请日：2006-05-09
申请人： Harish R. Devanagondi , Rajesh Patil , Sanjeev Mahalawat , Jianyong Sun
发明人： Harish R. Devanagondi , Rajesh Patil , Sanjeev Mahalawat , Jianyong Sun
IPC分类号： G06F7/499
CPC分类号： H03M13/09
摘要： A system, method and tangible medium for unified exception handling with distributed exception identification includes a packet processing pipeline with at least two processing stages for processing data packets, each of the data packets being processed having an associated exception map in a memory of the apparatus. An exception detector at each processing stage detects whether any exception conditions apply to the data packet at the processing stage, and if so, a bit setter sets, modifies, or resets one or more bits in the exception map associated with exception conditions detected at the processing stage. An exception handler processes the exception map in response to the state of in the exception map after all the processing stages are complete.
摘要翻译：用于具有分布式异常识别的统一异常处理的系统，方法和有形介质包括具有用于处理数据分组的至少两个处理级的分组处理流水线，每个处理的数据分组在该装置的存储器中具有相关联的异常映射。每个处理阶段的异常检测器检测在处理阶段是否有任何异常条件适用于数据包，如果是，则位设置器设置，修改或重置与在该处理期间检测到的异常条件相关联的异常映射中的一个或多个位处理阶段。在所有处理阶段完成后，异常处理程序响应于异常映射中的状态来处理异常映射。

6. 发明授权

US07079525B1 Network switch having a hybrid switch architecture 失效
标题翻译：具有混合交换机架构的网络交换机
公开(公告)号：US07079525B1
公开(公告)日：2006-07-18
申请号：US09560673
申请日：2000-04-27
申请人： Adam Goldstein , David Smith , Harish Devanagondi , Hugh Barrass , Kamran Torabi , Rajesh Patil
发明人： Adam Goldstein , David Smith , Harish Devanagondi , Hugh Barrass , Kamran Torabi , Rajesh Patil
IPC分类号： H04L12/50
CPC分类号： H04L49/101 , H04L49/103 , H04L49/15 , H04L49/45
摘要： A network switch having a hybrid switch architecture, which is scalable to increase connectivity, buffering, and bandwidth by using multiple shared-memory switch fabrics and multiple crossbar switch fabrics. Each of the crossbar switch fabrics is coupled to each of the shared-memory switch fabrics. The shared-memory switch fabrics are configured to store and retrieve packets. The crossbar switch fabrics are configured to distribute and re-collect packets to and from each of the shared-memory switch fabrics. The network switch having a hybrid switch architecture distributes packets from a crossbar switch fabric to the multiple shared-memory switch fabrics to share the distributed packets among the multiple shared-memory switch fabrics.
摘要翻译：具有混合交换机架构的网络交换机，其通过使用多个共享存储交换机结构和多个交叉交换结构来扩展以增加连接性，缓冲和带宽。每个交叉开关结构耦合到每个共享存储器交换结构。共享存储交换机结构被配置为存储和检索数据包。交叉开关结构被配置为向每个共享存储交换机结构分发和重新收集分组。具有混合交换机结构的网络交换机将分组从交叉交换结构分配到多个共享存储交换机结构，以在多个共享存储交换机结构之间共享分布式分组。

7. 发明授权

US06489976B1 System and method for displaying pop-up symbols for indicating accelerator keys for implementing computer software options 有权
标题翻译：用于显示用于指示用于实现计算机软件选项的加速键的弹出符号的系统和方法
公开(公告)号：US06489976B1
公开(公告)日：2002-12-03
申请号：US09455493
申请日：1999-12-06
申请人： Rajesh Patil , Jennifer H. Noble , Robert Shaver
发明人： Rajesh Patil , Jennifer H. Noble , Robert Shaver
IPC分类号： G09G500
CPC分类号： G06F3/0489 , G06F3/04842 , G06F3/04895
摘要： A system, method, and computer readable medium containing computer readable instructions for displaying pop-up accelerator key symbols that indicate accelerator keys that may be activated by a user to select a user selectable portion in a graphical user interface to initiate an option corresponding to the user selectable portion. When a user holds down the “ALT” key, the pop-up display includes a letter, number or other symbol that, when depressed (alone or with the “ALT” key), functions to select an option. Pop-up symbols may also be provided for selecting a group of icons and presenting symbols for each group of icons when a user selects the group symbol corresponding to that group of icons.
摘要翻译：一种包含计算机可读指令的系统，方法和计算机可读介质，用于显示弹出加速器键符号，其指示可由用户激活的加速键，以选择图形用户界面中的用户可选择部分，以启动对应于用户可选部分。当用户按住“ALT”键时，弹出显示包括一个字母，数字或其他符号，当按下（单独或使用“ALT”键）时，功能可以选择一个选项。还可以提供弹出符号，用于当用户选择与该组图标相对应的组符号时，为每组图标选择一组图标和呈现符号。

8. 发明申请

US20230116332A1 SYSTEM AND METHOD FOR DIAGNOSING MUSCLE AND BONE RELATED DISORDERS 有权
公开(公告)号：US20230116332A1
公开(公告)日：2023-04-13
申请号：US17498454
申请日：2021-10-11
申请人： Rajesh Patil
发明人： Rajesh Patil
IPC分类号： G16H30/40 , G16H50/20 , G16H20/40 , G06N3/04
摘要： Artificial Intelligence Multiple Input Convolutional Neural Network-based system and method to diagnose bone, muscle, or joint diseases using one or multiple inputs such as EMG (Electromyography), X-Ray, MRI (Magnetic resonance imaging), CT (computed tomography), Arthroscopy, Ultrasonography, video, images, patient reports, text reports, The system can provide recommendations or treatment plan based on severity or grading of the disease, deformity or degeneration that may include physiotherapy, exercise, surgery to prevent or cure the medical condition.

9. 发明授权

US07680097B1 Network switch having a hybrid switch architecture 有权
标题翻译：具有混合交换机架构的网络交换机
公开(公告)号：US07680097B1
公开(公告)日：2010-03-16
申请号：US11365214
申请日：2006-02-28
申请人： Adam Goldstein , David Smith , Harish Devanagondi , Hugh Barrass , Kamran Torabi , Rajesh Patil
发明人： Adam Goldstein , David Smith , Harish Devanagondi , Hugh Barrass , Kamran Torabi , Rajesh Patil
IPC分类号： H04J1/16
CPC分类号： H04L49/101 , H04L49/103 , H04L49/15 , H04L49/45
摘要： A network switch having a hybrid switch architecture, which is scalable to increase connectivity, buffering, and bandwidth by using multiple shared-memory switch fabrics and multiple crossbar switch fabrics. Each of the crossbar switch fabrics is coupled to each of the shared-memory switch fabrics. The shared-memory switch fabrics are configured to store and retrieve packets. The crossbar switch fabrics are configured to distribute and recollect packets to and from each of the shared-memory switch fabrics. The network switch having a hybrid switch architecture distributes packets from a crossbar switch fabric to the multiple shared-memory switch fabrics to share the distributed packets among the multiple shared-memory switch fabrics.
摘要翻译：具有混合交换机架构的网络交换机，其通过使用多个共享存储交换机结构和多个交叉交换结构来扩展以增加连接性，缓冲和带宽。每个交叉开关结构耦合到每个共享存储器交换结构。共享存储交换机结构被配置为存储和检索数据包。交叉开关结构被配置为向每个共享存储交换机结构分发和重新收集分组。具有混合交换机结构的网络交换机将分组从交叉交换结构分配到多个共享存储交换机结构，以在多个共享存储交换机结构之间共享分布式分组。

10. 发明申请

US20060206620A1 Method and apparatus for unified exception handling with distributed exception identification 有权
公开(公告)号：US20060206620A1
公开(公告)日：2006-09-14
申请号：US11431444
申请日：2006-05-09
申请人： Harish Devanagondi , Rajesh Patil , Sanjeev Mahalawat , Jianyong Sun
发明人： Harish Devanagondi , Rajesh Patil , Sanjeev Mahalawat , Jianyong Sun
IPC分类号： G06F15/16 , G06F13/28
CPC分类号： H03M13/09
摘要： A system, method and tangible medium for unified exception handling with distributed exception identification includes a packet processing pipeline with at least two processing stages for processing data packets, each of the data packets being processed having an associated exception map in a memory of the apparatus. An exception detector at each processing stage detects whether any exception conditions apply to the data packet at the processing stage, and if so, a bit setter sets, modifies, or resets one or more bits in the exception map associated with exception conditions detected at the processing stage. An exception handler processes the exception map in response to the state of in the exception map after all the processing stages are complete.

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