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1. 发明授权

US08207453B2 Glass core substrate for integrated circuit devices and methods of making the same 有权
标题翻译：用于集成电路器件的玻璃核心衬底及其制造方法
公开(公告)号：US08207453B2
公开(公告)日：2012-06-26
申请号：US12653710
申请日：2009-12-17
申请人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
发明人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
IPC分类号： H01L21/02
CPC分类号： H05K1/112 , H01L21/4803 , H01L21/486 , H01L23/15 , H01L23/3675 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2924/00014 , H01L2924/10253 , H05K3/0014 , H05K3/4605 , H05K3/4644 , H05K2201/096 , H05K2201/09827 , H05K2201/10287 , H05K2201/10371 , H05K2201/10674 , H05K2203/0108 , H05K2203/0228 , H05K2203/025 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , H01L2924/00 , H01L2224/0401
摘要： Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.
摘要翻译：公开了用于集成电路（IC）装置的玻璃芯基板的实施例。玻璃芯基板包括在玻璃芯的相对侧上的玻璃芯和堆积结构。导电端子可以形成在玻璃芯基板的两侧。 IC芯片可以与衬底的一侧上的端子耦合，而相对侧上的端子可以与诸如电路板的下一级组件耦合。玻璃芯可以包括其中已经形成导体的单片玻璃，或者玻璃芯可以包括已经连接在一起的两个或更多个玻璃部分，每个部分具有导体。导体延伸穿过玻璃芯，并且一个或多个导体可以与设置在玻璃芯上的积聚结构电耦合。描述和要求保护其他实施例。

2. 发明申请

US20100085863A1 RETUNING OF FERROELECTRIC MEDIA BUILT-IN-BIAS 审中-公开
标题翻译：电磁介质中的偏转
公开(公告)号：US20100085863A1
公开(公告)日：2010-04-08
申请号：US12260045
申请日：2008-10-28
申请人： Nathan Franklin , Quan A. Tran , Qing Ma
发明人： Nathan Franklin , Quan A. Tran , Qing Ma
IPC分类号： G11B9/00
CPC分类号： G11B9/02
摘要： Provided herein are embodiments for adjusting a built-in bias of a media including a conductive layer and a ferroelectric layer above the conductive layer. In certain embodiments, a voltage signal is applied between the conductive layer of the media and an electrode (provided over at least a portion of the ferroelectric layer) to thereby tune the built-in bias so that the built-in bias moves in a direction of (i.e., towards) the desired built-in bias. In other embodiments, the temperature of the at least a portion of the ferroelectric layer of the media is elevated to thereby tune the built-in bias so that the built-in bias moves in a direction of (i.e., towards) the desired built-in bias. The desired built-in bias can be a zero built-in bias, or a non-zero built-in bias.
摘要翻译：本文提供了用于调整介质的内置偏压的实施例，该介质包括在导电层上方的导电层和铁电层。在某些实施例中，电压信号被施加在介质的导电层和电极（设置在铁电层的至少一部分之间），从而调节内置偏置，使得内置偏压沿着方向（即，朝向）所需的内在偏见。在其他实施例中，介质的铁电层的至少一部分的温度升高，从而调节内置偏压，使得内置偏压沿着（即，朝向）所需内置的方向移动，偏见。所需的内置偏置可以是零内置偏置或非零内置偏置。

3. 发明授权

US07214995B2 Mechanism to prevent actuation charging in microelectromechanical actuators 有权
标题翻译：防止微机电致动器致动充电的机构
公开(公告)号：US07214995B2
公开(公告)日：2007-05-08
申请号：US10955153
申请日：2004-09-30
申请人： Tsung-Kuan Allen Chou , Quan A. Tran
发明人： Tsung-Kuan Allen Chou , Quan A. Tran
IPC分类号： H01L29/82
CPC分类号： H01H59/0009 , H01H2059/0018
摘要： According to one embodiment a microelectromechanical (MEMS) switch is disclosed. The MEMS switch includes a top movable electrode, and an actutaion electrode with an undoped polysilicon stopper region to contact the top movable electrode when an actuation current is applied. The undoped polysilicon stopper region prevents actuation charging that accumulates over time in a unipolar actuation condition.
摘要翻译：根据一个实施例，公开了一种微机电（MEMS）开关。 MEMS开关包括顶部可动电极和具有未掺杂多晶硅停留区域的活性电极，以在施加致动电流时接触顶部可动电极。未掺杂的多晶硅停止区域防止在单极致动条件下随时间累积的致动充电。

4. 发明申请

US20160284637A1 GLASS CORE SUBSTRATE FOR INTEGRATED CIRCUIT DEVICES AND METHODS OF MAKING THE SAME 审中-公开
标题翻译：用于集成电路装置的玻璃核心基板及其制造方法
公开(公告)号：US20160284637A1
公开(公告)日：2016-09-29
申请号：US15172029
申请日：2016-06-02
申请人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
发明人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
IPC分类号： H01L23/498 , H01L21/48 , H01L23/367 , H01L23/15
CPC分类号： H05K1/112 , H01L21/4803 , H01L21/486 , H01L23/15 , H01L23/3675 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2924/00014 , H01L2924/10253 , H05K3/0014 , H05K3/4605 , H05K3/4644 , H05K2201/096 , H05K2201/09827 , H05K2201/10287 , H05K2201/10371 , H05K2201/10674 , H05K2203/0108 , H05K2203/0228 , H05K2203/025 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , H01L2924/00 , H01L2224/0401
摘要： Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.
摘要翻译：公开了用于集成电路（IC）装置的玻璃芯基板的实施例。玻璃芯基板包括在玻璃芯的相对侧上的玻璃芯和堆积结构。导电端子可以形成在玻璃芯基板的两侧。 IC芯片可以与衬底的一侧上的端子耦合，而相对侧上的端子可以与诸如电路板的下一级组件耦合。玻璃芯可以包括其中已经形成导体的单片玻璃，或者玻璃芯可以包括已经连接在一起的两个或更多个玻璃部分，每个部分具有导体。导体延伸穿过玻璃芯，并且一个或多个导体可以与设置在玻璃芯上的积聚结构电耦合。描述和要求保护其他实施例。

5. 发明申请

US20090213492A1 METHOD OF IMPROVING STABILITY OF DOMAIN POLARIZATION IN FERROELECTRIC THIN FILMS 审中-公开
标题翻译：改善电磁薄膜中极域极化稳定性的方法
公开(公告)号：US20090213492A1
公开(公告)日：2009-08-27
申请号：US12035989
申请日：2008-02-22
申请人： Quan A. Tran
发明人： Quan A. Tran
IPC分类号： G11B5/127
CPC分类号： G11B9/02 , B82Y10/00 , G11B9/1409
摘要： A memory device comprises a ferroelectric media comprising at least one ferroelectric film. The ferroelectric film has an as-grown spontaneous polarization of a first direction. A tip is position over the ferroelectric film and a first voltage is applied to the tip larger than a switching voltage of the ferroelectric film. One or both of the tip and the ferroelectric media is moved to form a first domain having a spontaneous polarization of opposite the first direction. The tip is then positioned over the first domain and a second voltage to the tip smaller than the first voltage to form a second domain smaller than the first domain and having a polarization of the first direction, the second domain defining the bit.
摘要翻译：存储器件包括包含至少一个铁电膜的铁电介质。铁电薄膜具有第一方向的自发极化。尖端位于铁电体膜上方，并且第一电压施加到比铁电体膜的开关电压大的尖端。移动尖端和铁电介质中的一个或两个以形成具有与第一方向相反的自发极化的第一区域。然后将尖端定位在第一区域上方，并且尖端的第二电压小于第一电压，以形成小于第一区域的第二区域，并具有第一方向的极化，第二区域限定位。

6. 发明授权

US10070524B2 Method of making glass core substrate for integrated circuit devices 有权
公开(公告)号：US10070524B2
公开(公告)日：2018-09-04
申请号：US13442092
申请日：2012-04-09
申请人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
发明人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
IPC分类号： H01R43/00 , H05K1/11 , H01L21/48 , H01L23/367 , H01L23/498 , H05K3/46 , H01L23/15 , H05K3/00
CPC分类号： H05K1/112 , H01L21/4803 , H01L21/486 , H01L23/15 , H01L23/3675 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2924/00014 , H01L2924/10253 , H05K3/0014 , H05K3/4605 , H05K3/4644 , H05K2201/096 , H05K2201/09827 , H05K2201/10287 , H05K2201/10371 , H05K2201/10674 , H05K2203/0108 , H05K2203/0228 , H05K2203/025 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , H01L2924/00 , H01L2224/0401
摘要： A glass core substrate for an integrated circuit (IC) device may be formed to include a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.

7. 发明申请

US20120192413A1 GLASS CORE SUBSTRATE FOR INTEGRATED CIRCUIT DEVICES AND METHODS OF MAKING THE SAME 审中-公开
标题翻译：用于集成电路装置的玻璃核心基板及其制造方法
公开(公告)号：US20120192413A1
公开(公告)日：2012-08-02
申请号：US13442092
申请日：2012-04-09
申请人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
发明人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
IPC分类号： H01R43/00
CPC分类号： H05K1/112 , H01L21/4803 , H01L21/486 , H01L23/15 , H01L23/3675 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2924/00014 , H01L2924/10253 , H05K3/0014 , H05K3/4605 , H05K3/4644 , H05K2201/096 , H05K2201/09827 , H05K2201/10287 , H05K2201/10371 , H05K2201/10674 , H05K2203/0108 , H05K2203/0228 , H05K2203/025 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , H01L2924/00 , H01L2224/0401
摘要： Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.
摘要翻译：公开了用于集成电路（IC）装置的玻璃芯基板的实施例。玻璃芯基板包括在玻璃芯的相对侧上的玻璃芯和堆积结构。导电端子可以形成在玻璃芯基板的两侧。 IC芯片可以与衬底的一侧上的端子耦合，而相对侧上的端子可以与诸如电路板的下一级组件耦合。玻璃芯可以包括其中已经形成导体的单片玻璃，或者玻璃芯可以包括已经连接在一起的两个或更多个玻璃部分，每个部分具有导体。导体延伸穿过玻璃芯，并且一个或多个导体可以与设置在玻璃芯上的积聚结构电耦合。描述和要求保护其他实施例。

8. 发明申请

US20110147055A1 Glass core substrate for integrated circuit devices and methods of making the same 有权
标题翻译：用于集成电路器件的玻璃核心衬底及其制造方法
公开(公告)号：US20110147055A1
公开(公告)日：2011-06-23
申请号：US12653710
申请日：2009-12-17
申请人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
发明人： Qing Ma , Quan A. Tran , Robert L. Sankman , Johanna M. Swan , Valluri R. Rao
IPC分类号： H05K1/03 , H05K3/10 , H05K3/36
CPC分类号： H05K1/112 , H01L21/4803 , H01L21/486 , H01L23/15 , H01L23/3675 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2924/00014 , H01L2924/10253 , H05K3/0014 , H05K3/4605 , H05K3/4644 , H05K2201/096 , H05K2201/09827 , H05K2201/10287 , H05K2201/10371 , H05K2201/10674 , H05K2203/0108 , H05K2203/0228 , H05K2203/025 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , H01L2924/00 , H01L2224/0401
摘要： Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.
摘要翻译：公开了用于集成电路（IC）装置的玻璃芯基板的实施例。玻璃芯基板包括在玻璃芯的相对侧上的玻璃芯和堆积结构。导电端子可以形成在玻璃芯基板的两侧。 IC芯片可以与衬底的一侧上的端子耦合，而相对侧上的端子可以与诸如电路板的下一级组件耦合。玻璃芯可以包括其中已经形成导体的单片玻璃，或者玻璃芯可以包括已经连接在一起的两个或更多个玻璃部分，每个部分具有导体。导体延伸穿过玻璃芯，并且一个或多个导体可以与设置在玻璃芯上的积聚结构电耦合。描述和要求保护其他实施例。

9. 发明申请

US20090129247A1 METHOD AND SYSTEM FOR IMPROVING DOMAIN FORMATION IN A FERROELECTRIC MEDIA AND FOR IMPROVING TIP LIFETIME 审中-公开
标题翻译：改进电磁介质中的域形成和改进提示寿命的方法和系统
公开(公告)号：US20090129247A1
公开(公告)日：2009-05-21
申请号：US12269817
申请日：2008-11-12
申请人： Quan A. Tran , Qing Ma , Donald Edward Adams , Nickolai Belov , Yevgeny Vasilievich Anoikin
发明人： Quan A. Tran , Qing Ma , Donald Edward Adams , Nickolai Belov , Yevgeny Vasilievich Anoikin
IPC分类号： G11B9/00
CPC分类号： G11B9/02 , B82Y10/00 , G01Q80/00 , G11B9/1409 , G11B9/1436
摘要： An information storage device comprises a ferroelectric media, write circuitry to provide a first signal and a second signal to the ferroelectric media, a tip platform and a cantilever operably associated with the tip platform. A tip extends from the cantilever toward the ferroelectric media and includes a first conductive material communicating the first signal from the write circuitry to the ferroelectric media and a second conductive material communicating the second signal from the write circuitry to the ferroelectric media. A insulating material arranged between the first conductive material and the second conductive material to electrically isolate the first conductive material from the second conductive material.
摘要翻译：信息存储装置包括铁电介质，用于向铁电介质提供第一信号和第二信号的写入电路，与尖端平台可操作地相关联的尖端平台和悬臂。尖端从悬臂向铁电介质延伸并且包括将来自写入电路的第一信号传递到铁电介质的第一导电材料和将来自写入电路的第二信号传递到铁电介质的第二导电材料。布置在第一导电材料和第二导电材料之间以将第一导电材料与第二导电材料电隔离的绝缘材料。

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