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1. 发明授权

US06833620B1 Apparatus having reduced input output area and method thereof 有权
标题翻译：具有减小的输入输出面积的装置及其方法
公开(公告)号：US06833620B1
公开(公告)日：2004-12-21
申请号：US09724597
申请日：2000-11-28
申请人： Peter L. Rosefield , Harvest W. C. Chung
发明人： Peter L. Rosefield , Harvest W. C. Chung
IPC分类号： H01L2448
CPC分类号： H01L24/06 , H01L23/5286 , H01L24/49 , H01L2224/05554 , H01L2224/05599 , H01L2224/4943 , H01L2224/85399 , H01L2924/00014 , H01L2924/01023 , H01L2924/01033 , H01L2924/30107 , H01L2924/3011 , H01L2224/45099
摘要： An input output ring for a semiconductor device is disclosed that uses power buffers having widths that vary from the widths of the input and output buffers. In one embodiment, the pitches between bond pads are the same, in another embodiment the pitches between the bond pads can vary. In another embodiment, the number of bond pads is greater than the number of associated active buffer areas. By connecting two power bond pads to a common buffer the inductance associated with the buffer is reduced, thereby reducing the number of active buffers needed to be dedicated to providing power to the semiconductor device.
摘要翻译：公开了一种用于半导体器件的输入输出环，其使用具有与输入和输出缓冲器的宽度不同的宽度的功率缓冲器。在一个实施例中，接合焊盘之间的间距是相同的，在另一个实施例中，接合焊盘之间的间距可以变化。在另一个实施例中，接合焊盘的数量大于相关联的主动缓冲区域的数量。通过将两个功率接合焊盘连接到公共缓冲器，减小与缓冲器相关联的电感，从而减少专用于向半导体器件提供功率所需的主动缓冲器的数量。

2. 发明授权

US06541996B1 Dynamic impedance compensation circuit and method 有权
标题翻译：动态阻抗补偿电路及方法
公开(公告)号：US06541996B1
公开(公告)日：2003-04-01
申请号：US09469084
申请日：1999-12-21
申请人： Peter L. Rosefield , Oleg Drapkin , Grigori Temkine , Gordon F. Caruk , Roche Thambimuthu , Kuldip Sahdra , Aris Balatsos
发明人： Peter L. Rosefield , Oleg Drapkin , Grigori Temkine , Gordon F. Caruk , Roche Thambimuthu , Kuldip Sahdra , Aris Balatsos
IPC分类号： H03K1923
CPC分类号： H03K19/0005
摘要： An impedance compensation circuit and method for an input/output buffer provides dynamic impedance compensation by using programmable impedance arrays and a dynamically adjustable on-chip load. Accordingly, among other advantages, only a single off-chip or external calibrated impedance resistor is used and only a single test pad is necessary.
摘要翻译：用于输入/输出缓冲器的阻抗补偿电路和方法通过使用可编程阻抗阵列和动态可调节的片上负载来提供动态阻抗补偿。因此，除了其他优点之外，仅使用单个芯片外部校准阻抗电阻器，并且仅需要单个测试焊盘。

3. 发明授权

US07122456B2 Method for reduced input output area 有权
标题翻译：降低输入输出面积的方法
公开(公告)号：US07122456B2
公开(公告)日：2006-10-17
申请号：US10988684
申请日：2004-11-15
申请人： Peter L. Rosefield , Harvest W. C. Chung
发明人： Peter L. Rosefield , Harvest W. C. Chung
IPC分类号： H01L21/44
CPC分类号： H01L24/06 , H01L23/5286 , H01L24/49 , H01L2224/05554 , H01L2224/05599 , H01L2224/4943 , H01L2224/85399 , H01L2924/00014 , H01L2924/01023 , H01L2924/01033 , H01L2924/30107 , H01L2924/3011 , H01L2224/45099
摘要： An input output ring for a semiconductor device is disclosed that uses power buffers having widths that vary from the widths of the input and output buffers. In one embodiment, the pitches between bond pads are the same, in another embodiment the pitches between the bond pads can vary. In another embodiment, the number of bond pads is greater than the number of associated active buffer areas. By connecting two power bond pads to a common buffer the inductance associated with the buffer is reduced, thereby reducing the number of active buffers needed to be dedicated to providing power to the semiconductor device.
摘要翻译：公开了一种用于半导体器件的输入输出环，其使用具有与输入和输出缓冲器的宽度不同的宽度的功率缓冲器。在一个实施例中，接合焊盘之间的间距是相同的，在另一个实施例中，接合焊盘之间的间距可以变化。在另一个实施例中，接合焊盘的数量大于相关联的主动缓冲区域的数量。通过将两个功率接合焊盘连接到公共缓冲器，减小与缓冲器相关联的电感，从而减少专用于向半导体器件提供功率所需的主动缓冲器的数量。

4. 发明授权

US5963153A Multi-stream audio sampling rate conversion system and method using variable converter rate control data 失效
标题翻译：多流音频采样率转换系统和方法采用变频器速率控制数据
公开(公告)号：US5963153A
公开(公告)日：1999-10-05
申请号：US962147
申请日：1997-10-31
申请人： Peter L. Rosefield , Tieying Duan , Vladimir F. Giemborek , Hugh Chow
发明人： Peter L. Rosefield , Tieying Duan , Vladimir F. Giemborek , Hugh Chow
IPC分类号： H03H17/06 , H03M7/00 , H04L12/54
CPC分类号： H03H17/0621 , H03H2017/0298
摘要： A sample rate conversion system and method uses a digital signal processor (DSP) and a separate sample rate conversion circuit (SRC) to perform multiple stream conversion and mixing of different rate input audio streams. The sample rate conversion system converts data, such as multiple streams of digital audio data sampled at different rates, and performs interpolation, decimation, FIR filtering, and mixing of multiple streams of data using the separate SRC. The SRC uses two bidirectional I/O memories for alternately storing input and output data as part of a sample rate converter. When the sample rate converter writes output to one of the bidirectional memories, it has the option of summing the data with the data already stored in the same I/O memory. Therefore a separate digital signal processor can use the sample rate converter circuit to perform some of the mixing for the multiple streams.
摘要翻译：采样率转换系统和方法使用数字信号处理器（DSP）和单独采样率转换电路（SRC）来执行不同速率输入音频流的多个流转换和混频。采样率转换系统转换数据，例如以不同速率采样的多个数字音频数据流，并使用单独的SRC进行多个数据流的插值，抽取，FIR滤波和混合。 SRC使用两个双向I / O存储器将输入和输出数据交替存储为采样率转换器的一部分。当采样率转换器向两个双向存储器之一写入输出时，它可以选择将数据与已经存储在同一个I / O存储器中的数据相加。因此，单独的数字信号处理器可以使用采样率转换器电路来执行多个流的一些混合。

5. 发明授权

US5986589A Multi-stream audio sampling rate conversion circuit and method 失效
标题翻译：多流音频采样率转换电路及方法
公开(公告)号：US5986589A
公开(公告)日：1999-11-16
申请号：US962461
申请日：1997-10-31
申请人： Peter L. Rosefield , Tieying Duan , Vladimir F. Giemborek , Hugh Chow
发明人： Peter L. Rosefield , Tieying Duan , Vladimir F. Giemborek , Hugh Chow
IPC分类号： G11B20/10 , H03H17/06 , H03M7/00
CPC分类号： H03H17/0621 , G11B20/10527 , H03H2017/0298 , H03H2218/06
摘要： A sample rate conversion system and method uses a digital signal processor (DSP) and a separate sample rate conversion circuit (SRC) to perform multiple stream conversion and mixing of different rate input audio streams. The sample rate conversion system converts data, such as multiple streams of digital audio data sampled at different rates, and performs interpolation, decimation, FIR filtering, and mixing of multiple streams of data using the separate SRC. The SRC uses two bidirectional I/O memories for alternately storing input and output data as part of a sample rate converter. When the sample rate converter writes output to one of the bidirectional memories, it has the option of summing the data with the data already stored in the same I/O memory. Therefore a separate digital signal processor can use the sample rate converter circuit to perform some of the mixing for the multiple streams.
摘要翻译：采样率转换系统和方法使用数字信号处理器（DSP）和单独的采样率转换电路（SRC）来执行不同速率输入音频流的多流转换和混频。采样率转换系统转换数据，例如以不同速率采样的多个数字音频数据流，并使用单独的SRC进行多个数据流的插值，抽取，FIR滤波和混合。 SRC使用两个双向I / O存储器将输入和输出数据交替存储为采样率转换器的一部分。当采样率转换器向两个双向存储器之一写入输出时，它可以选择将数据与已经存储在同一个I / O存储器中的数据相加。因此，单独的数字信号处理器可以使用采样率转换器电路来执行多个流的一些混合。

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