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1. 发明授权

US07196546B2 Low-swing bus driver and receiver 有权
标题翻译：低调总线驱动和接收器
公开(公告)号：US07196546B2
公开(公告)日：2007-03-27
申请号：US10748833
申请日：2003-12-30
申请人： Mark A. Anders , Peter Caputa , Ram Krishnamurthy
发明人： Mark A. Anders , Peter Caputa , Ram Krishnamurthy
IPC分类号： H03K19/0175
CPC分类号： H03K19/018521 , H03K3/356139 , H04L25/028 , H04L25/0292
摘要： According to some embodiments, provided are a static low-swing driver circuit to receive a full-swing input signal, to convert the full-swing input signal to a low-swing signal, and to transmit the low-swing signal, and a dynamic receiver circuit to receive the low-swing signal and to convert the low-swing signal to a full-swing signal. Also provided may be an interconnect coupled to the driver circuit and to the receiver circuit, the interconnect not comprising a repeater and to receive the low-swing signal from the driver circuit and to transmit the low-swing signal to the receiver circuit.
摘要翻译：根据一些实施例，提供了一种用于接收全摆幅输入信号，将全摆幅输入信号转换为低摆幅信号并传输低回转信号的静态低摆幅驱动器电路，以及动态接收器电路来接收低摆动信号并将低摆幅信号转换成全摆幅信号。还可以提供耦合到驱动器电路和接收器电路的互连，互连不包括中继器并且接收来自驱动器电路的低摆动信号并且将低回转信号发送到接收器电路。

2. 发明申请

US20050225459A1 Single-stage and multi-stage low power interconnect architectures 有权
标题翻译：单级和多级低功率互连架构
公开(公告)号：US20050225459A1
公开(公告)日：2005-10-13
申请号：US10813084
申请日：2004-03-31
申请人： Maged Ghoneima , Peter Caputa , Muhammad Khellah , Ram Krishnamurthy , James Tschanz , Yibin Ye , Vivek De , Yehea Ismail
发明人： Maged Ghoneima , Peter Caputa , Muhammad Khellah , Ram Krishnamurthy , James Tschanz , Yibin Ye , Vivek De , Yehea Ismail
IPC分类号： G06F13/40 , H03M5/00
CPC分类号： G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： An interconnect architecture is provided to reduce power consumption. A first driver may drive signals on a first interconnect and a second driver may drive signals on a second interconnect. The first driver may be powered by a first voltage and the second driver may be powered by a second voltage different than the first voltage.
摘要翻译：提供互连架构以降低功耗。第一驱动器可以在第一互连上驱动信号，并且第二驱动器可以在第二互连上驱动信号。第一驱动器可以由第一电压供电，并且第二驱动器可以由不同于第一电压的第二电压供电。

3. 发明授权

US06992603B2 Single-stage and multi-stage low power interconnect architectures 有权
标题翻译：单级和多级低功率互连架构
公开(公告)号：US06992603B2
公开(公告)日：2006-01-31
申请号：US10813084
申请日：2004-03-31
申请人： Maged M. Ghoneima , Peter Caputa , Muhammad M. Khellah , Ram Krishnamurthy , James W. Tschanz , Yiben Ye , Vivek K. De , Yehea I Ismail
发明人： Maged M. Ghoneima , Peter Caputa , Muhammad M. Khellah , Ram Krishnamurthy , James W. Tschanz , Yiben Ye , Vivek K. De , Yehea I Ismail
IPC分类号： H03M7/00
CPC分类号： G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： An interconnect architecture is provided to reduce power consumption. A first driver may drive signals on a first interconnect and a second driver may drive signals on a second interconnect. The first driver may be powered by a first voltage and the second driver may be powered by a second voltage different than the first voltage.
摘要翻译：提供互连架构以降低功耗。第一驱动器可以在第一互连上驱动信号，并且第二驱动器可以在第二互连上驱动信号。第一驱动器可以由第一电压供电，并且第二驱动器可以由不同于第一电压的第二电压供电。

4. 发明授权

US07190286B2 Single-stage and multi-stage low power interconnect architectures 有权
标题翻译：单级和多级低功率互连架构
公开(公告)号：US07190286B2
公开(公告)日：2007-03-13
申请号：US11314236
申请日：2005-12-22
申请人： Maged M. Ghoneima , Peter Caputa , Muhammad M. Khellah , Ram Krishnamurthy , James W. Tschanz , Yiben Ye , Vivek K. De , Yehea I. Ismail
发明人： Maged M. Ghoneima , Peter Caputa , Muhammad M. Khellah , Ram Krishnamurthy , James W. Tschanz , Yiben Ye , Vivek K. De , Yehea I. Ismail
IPC分类号： H03M7/46 , H03M7/00
CPC分类号： G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： An interconnect architecture is provided to reduce power consumption. A first driver may drive signals on a first interconnect and a second driver may drive signals on a second interconnect. The first driver may be powered by a first voltage and the second driver may be powered by a second voltage different than the first voltage.
摘要翻译：提供互连架构以降低功耗。第一驱动器可以在第一互连上驱动信号，并且第二驱动器可以在第二互连上驱动信号。第一驱动器可以由第一电压供电，并且第二驱动器可以由不同于第一电压的第二电压供电。

5. 发明申请

US20050148102A1 Low-swing bus driver and receiver 有权
标题翻译：低调总线驱动和接收器
公开(公告)号：US20050148102A1
公开(公告)日：2005-07-07
申请号：US10748833
申请日：2003-12-30
申请人： Mark Anders , Peter Caputa , Ram Krishnamurthy
发明人： Mark Anders , Peter Caputa , Ram Krishnamurthy
IPC分类号： H01L21/00
CPC分类号： H03K19/018521 , H03K3/356139 , H04L25/028 , H04L25/0292
摘要： According to some embodiments, provided are a static low-swing driver circuit to receive a full-swing input signal, to convert the full-swing input signal to a low-swing signal, and to transmit the low-swing signal, and a dynamic receiver circuit to receive the low-swing signal and to convert the low-swing signal to a full-swing signal. Also provided may be an interconnect coupled to the driver circuit and to the receiver circuit, the interconnect not comprising a repeater and to receive the low-swing signal from the driver circuit and to transmit the low-swing signal to the receiver circuit.
摘要翻译：根据一些实施例，提供了一种用于接收全摆幅输入信号，将全摆幅输入信号转换为低摆幅信号并传输低回转信号的静态低摆幅驱动器电路，以及动态接收器电路来接收低摆动信号并将低摆幅信号转换成全摆幅信号。还可以提供耦合到驱动器电路和接收器电路的互连，互连不包括中继器并且接收来自驱动器电路的低摆动信号并且将低回转信号发送到接收器电路。

6. 发明授权

US07708619B2 Method for grinding complex shapes 有权
标题翻译：磨削复杂形状的方法
公开(公告)号：US07708619B2
公开(公告)日：2010-05-04
申请号：US11439510
申请日：2006-05-23
申请人： Krishnamoorthy Subramanian , John A. Webster , Peter Caputa, IV
发明人： Krishnamoorthy Subramanian , John A. Webster , Peter Caputa, IV
IPC分类号： B24B1/00
CPC分类号： B24B1/00 , B24B19/02 , B24D3/18
摘要： A method of producing a complex shape in a workpiece includes the steps of: i) grinding a workpiece at a maximum specific cutting energy of about 10 Hp/in3·min with at least one bonded abrasive tool, thereby forming a slot in the workpiece; and ii) grinding the slot with at least one mounted point tool, thereby producing the complex shape in the slot. The bonded abrasive tool includes at least about 3 volume % of a filamentary sol-gel alpha-alumina abrasive grain having an average length-to-cross-sectional-width ratio of greater than about 4:1 or an agglomerate thereof. A method of producing a slot in a metallic workpiece having a maximum hardness value of equal to, or less than, about 65 Rc includes the step of grinding the workpiece with a bonded abrasive tool at a material removal rate in a range of between about 0.25 in3/min·in and about 60 in3/min·in and at a maximum specific cutting energy of about 10 Hp/in3·min.
摘要翻译：一种在工件中制造复杂形状的方法包括以下步骤：i）用至少一个粘结的研磨工具以大约10Hp / in3分钟的最大比切削能量研磨工件，从而在工件中形成槽; 和ii）用至少一个安装的点工具研磨槽，从而在槽中产生复杂的形状。粘合研磨工具包括至少约3体积％的平均长度与横截面宽度比大于约4:1的丝状溶胶 - 凝胶α-氧化铝磨粒或其附聚物。在具有等于或小于约65Rc的最大硬度值的金属工件中制造槽的方法包括用粘合的研磨工具以大约0.25的范围内的材料去除速率研磨工件的步骤 in3 / min·in和约60 in3 / min·in和最大比切割能量约10 Hp / in3·min。

7. 发明申请

US20070275641A1 Method for grinding complex shapes 有权
标题翻译：磨削复杂形状的方法
公开(公告)号：US20070275641A1
公开(公告)日：2007-11-29
申请号：US11439510
申请日：2006-05-23
申请人： Krishnamoorthy Subramanian , John A. Webster , Peter Caputa
发明人： Krishnamoorthy Subramanian , John A. Webster , Peter Caputa
IPC分类号： B24B1/00
CPC分类号： B24B1/00 , B24B19/02 , B24D3/18
摘要： A method of producing a complex shape in a workpiece includes the steps of: i) grinding a workpiece at a maximum specific cutting energy of about 10 Hp/in3·min with at least one bonded abrasive tool, thereby forming a slot in the workpiece; and ii) grinding the slot with at least one mounted point tool, thereby producing the complex shape in the slot. The bonded abrasive tool includes at least about 3 volume % of a filamentary sol-gel alpha-alumina abrasive grain having an average length-to-cross-sectional-width ratio of greater than about 4:1 or an agglomerate thereof. A method of producing a slot in a metallic workpiece having a maximum hardness value of equal to, or less than, about 65 Rc includes the step of grinding the workpiece with a bonded abrasive tool at a material removal rate in a range of between about 0.25 in3/min·in and about 60 in3/min·in and at a maximum specific cutting energy of about 10 Hp/in3·min.
摘要翻译：一种在工件中制造复杂形状的方法包括以下步骤：i）用至少一个粘合的研磨工具以最大特定的切割能量以大约10Hp /的范围来研磨工件，从而在工件中形成槽; 和ii）用至少一个安装的点工具研磨槽，从而在槽中产生复杂的形状。粘合研磨工具包括至少约3体积％的平均长度与横截面宽度比大于约4:1的丝状溶胶 - 凝胶α-氧化铝磨粒或其附聚物。在具有等于或小于约65Rc的最大硬度值的金属工件中制造槽的方法包括用粘合的研磨工具以大约0.25的范围内的材料去除速率研磨工件的步骤在^{3 / min.in和约30 / 3min / min的范围内，在最大比切割能量约10Hp / in 3 / 。}

8. 发明申请

US20060109028A1 Single-stage and multi-stage low power interconnect architectures 有权
公开(公告)号：US20060109028A1
公开(公告)日：2006-05-25
申请号：US11314236
申请日：2005-12-22
申请人： Maged Ghoneima , Peter Caputa , Muhammad Khellah , Ram Krishnamurthy , James Tschanz , Yibin Ye , Vivek De , Yehia Ismail
发明人： Maged Ghoneima , Peter Caputa , Muhammad Khellah , Ram Krishnamurthy , James Tschanz , Yibin Ye , Vivek De , Yehia Ismail
IPC分类号： H03K19/173
CPC分类号： G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： An interconnect architecture is provided to reduce power consumption. A first driver may drive signals on a first interconnect and a second driver may drive signals on a second interconnect. The first driver may be powered by a first voltage and the second driver may be powered by a second voltage different than the first voltage.

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