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    • 3. 发明授权
    • Process for recovering olefins in polyolefin plants
    • 在聚烯烃工厂中回收烯烃的方法
    • US09216931B1
    • 2015-12-22
    • US14722738
    • 2015-05-27
    • Paul Su
    • Paul Su
    • C07C7/144C07C7/09C07C7/00
    • C07C7/005B01D53/002B01D53/225B01D53/229B01D61/362B01D61/58B01D2256/24B01D2257/108B01D2257/702C01B3/501C01B2203/048C07C7/09C07C7/144C07C11/04C07C11/06
    • A process for recovering unreacted olefin in a polyolefin manufacturing process comprising the treatment of a purge bin vent gas. The process involves cooling and condensing the vent gas (purge stream), which contains at least an olefin, a paraffin, and hydrogen, to produce a liquid condensate and an uncondensed (residual) gas stream. Both streams are then passed through membrane separation steps. The membrane separation of the uncondensed gas stream results in a residue stream containing mostly nitrogen and/or paraffin and a permeate stream enriched in either C2+ hydrocarbons or olefin, depending on the type of separation. The permeate from this step is recirculated within the process prior to the condensation step. The membrane separation of the condensate results in a residue stream containing paraffin and a permeate stream enriched in olefin, which may be recycled to the polymerization reactor.
    • 一种在聚烯烃制造方法中回收未反应烯烃的方法,包括处理净化箱排气。 该方法包括冷却和冷凝含有至少一种烯烃,石蜡和氢气的排出气体(吹扫流),以产生液体冷凝物和未冷凝(残余)气流。 然后将两个流通过膜分离步骤。 未冷凝的气流的膜分离导致根据分离类型,主要含有氮和/或石蜡的残留物流和富含C 2 +烃或烯烃的渗透物流。 来自该步骤的渗透物在冷凝步骤之前在该过程中再循环。 冷凝物的膜分离产生含有石蜡和富含烯烃的渗透物流的残余物流,其可循环至聚合反应器。
    • 9. 发明授权
    • Method for countervailing clock skew and core logic circuit using the same
    • 反向时钟偏移的方法和使用其的核心逻辑电路
    • US08397098B2
    • 2013-03-12
    • US11923192
    • 2007-10-24
    • Paul Su
    • Paul Su
    • G06F1/12G06F11/00H03D13/00
    • G06F1/12
    • A method for countervailing clock skew between a first clock signal and a second clock signal in a core logic circuit. The second clock signal is sampled based on the first clock signal in a sampling cycle to obtain a sampling result. When the sampling result indicates a non-compliant pattern, the phase of at least one of the first clock signal and the second clock signal is adjusted. Desirably, the core logic circuit keeps on working with the current first and second clock signals while continuing the sampling procedure of the second clock signal based on the first clock signal when the sampling result indicates a compliant pattern.
    • 一种用于在核心逻辑电路中抵消第一时钟信号和第二时钟信号之间的时钟偏移的方法。 基于采样周期中的第一时钟信号对第二时钟信号进行采样以获得采样结果。 当采样结果指示不兼容模式时,调整第一时钟信号和第二时钟信号中的至少一个的相位。 理想地,当采样结果指示顺从模式时,核心逻辑电路继续使用当前的第一和第二时钟信号,同时基于第一时钟信号继续第二时钟信号的采样过程。