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1. 发明授权

US07820494B2 Forming of the periphery of a schottky diode with MOS trenches 有权
标题翻译：形成具有MOS沟槽的肖特基二极管的外围
公开(公告)号：US07820494B2
公开(公告)日：2010-10-26
申请号：US11713543
申请日：2007-03-02
申请人： Patrick Poveda
发明人： Patrick Poveda
IPC分类号： H01L21/338
CPC分类号： H01L29/402 , H01L29/407 , H01L29/66143 , H01L29/806 , H01L29/872 , H01L29/8725
摘要： A method for forming a component of TMBS type having its periphery formed of a trench with insulated walls filled with a conductor, including the steps of depositing on a semiconductor substrate a thick layer of a first insulating material and a thin layer of a second material; simultaneously digging a peripheral trench and the trenches of the component; isotropically etching the first material so that a cap overhanging a recess remains; forming a thin insulating layer; and filling the trenches and said recess with a conductive material.
摘要翻译：一种用于形成其外围由填充有导体的绝缘壁形成沟槽的TMBS型的部件的方法，包括以下步骤：在半导体衬底上沉积厚层的第一绝缘材料和第二材料的薄层; 同时挖掘周边沟槽和部件的沟槽; 各向同性蚀刻第一材料，使得悬挂在凹部上的盖保留; 形成薄的绝缘层; 并用导电材料填充沟槽和凹槽。

2. 发明申请

US20070222018A1 Forming of the periphery of a schottky diode with MOS trenches 有权
标题翻译：形成具有MOS沟槽的肖特基二极管的外围
公开(公告)号：US20070222018A1
公开(公告)日：2007-09-27
申请号：US11713543
申请日：2007-03-02
申请人： Patrick Poveda
发明人： Patrick Poveda
IPC分类号： H01L27/00
CPC分类号： H01L29/402 , H01L29/407 , H01L29/66143 , H01L29/806 , H01L29/872 , H01L29/8725
摘要： A method for forming a component of TMBS type having its periphery formed of a trench with insulated walls filled with a conductor, including the steps of depositing on a semiconductor substrate a thick layer of a first insulating material and a thin layer of a second material; simultaneously digging a peripheral trench and the trenches of the component; isotropically etching the first material so that a cap overhanging a recess remains; forming a thin insulating layer; and filling the trenches and said recess with a conductive material.
摘要翻译：一种用于形成其外围由填充有导体的绝缘壁形成沟槽的TMBS型的部件的方法，包括以下步骤：在半导体衬底上沉积厚层的第一绝缘材料和第二材料的薄层; 同时挖掘周边沟槽和部件的沟槽; 各向同性蚀刻第一材料，使得悬挂在凹部上的盖保留; 形成薄的绝缘层; 并用导电材料填充沟槽和凹槽。

3. 发明授权

US06924546B2 Low-capacity vertical diode 有权
标题翻译：低容量立式二极管
公开(公告)号：US06924546B2
公开(公告)日：2005-08-02
申请号：US10489153
申请日：2002-09-10
申请人： Emmanuel Collard , Patrick Poveda
发明人： Emmanuel Collard , Patrick Poveda
IPC分类号： H01L29/861 , H01L29/868 , H01L31/105
CPC分类号： H01L29/868 , H01L29/8613
摘要： The invention concerns a low-capacity vertical diode designed to be mounted by a front surface made in a semiconductor substrate (1), comprising a first zone projecting relative to the surface of the substrate including at least a semiconductor layer (3) doped with a type of conductivity opposite to that of the substrate, the upper surface of the semiconductor layer bearing a first solder bump (23). The diode comprises a second zone including on the substrate a thick strip conductor (16) bearing at least second solder bumps (24), said first and second solder bumps defining a plane parallel to the substrate plane.
摘要翻译：本发明涉及一种设计成由半导体衬底（1）制成的前表面安装的低容量垂直二极管，包括相对于衬底的表面突出的第一区域，该第一区域包括至少掺杂有半导体衬底的半导体层（3）类型的导电性与衬底的导电性相反，半导体层的上表面具有第一焊料凸点（23）。所述二极管包括第二区域，所述第二区域在所述衬底上具有承载至少第二焊料凸块（24）的厚条状导体（16），所述第一和第二焊料凸块限定平行于所述衬底平面的平面。

4. 发明授权

US07589602B2 Antenna switch module 有权
标题翻译：天线开关模块
公开(公告)号：US07589602B2
公开(公告)日：2009-09-15
申请号：US11490740
申请日：2006-07-21
申请人： Patrick Poveda , Francois Dupont
发明人： Patrick Poveda , Francois Dupont
IPC分类号： H01P1/10 , H01P5/12 , H04B1/44 , H04B1/46
CPC分类号： H04B1/005 , H04B1/406 , H04B1/48
摘要： An antenna switch module between several radio-frequency transmit and/or receive paths including, between a common terminal on the antenna side and an access capacitor specific to each path, at least one diode, the number of diodes directly connected to the common terminal being odd and the number of diodes having their cathode on the common terminal side being equal, with a difference of one, to the number of diodes having their anode on the common terminal side.
摘要翻译：在几个射频发射和/或接收路径之间的天线切换模块，包括在天线侧的公共终端和每个路径专用的接入电容器之间，至少一个二极管，直接连接到公共端子的二极管的数量为奇数，在公共端子侧具有阴极的二极管的数量与公共端子侧的具有阳极的二极管的数量相差1。

5. 发明申请

US20060037998A1 Thermally-controlled actuator device 审中-公开
标题翻译：热控致动器装置
公开(公告)号：US20060037998A1
公开(公告)日：2006-02-23
申请号：US11256508
申请日：2005-10-21
申请人： Stephane Crabol , Guy Valembois , Patrick Poveda
发明人： Stephane Crabol , Guy Valembois , Patrick Poveda
IPC分类号： B23K31/02
CPC分类号： B64G1/645 , B64G1/222
摘要： The present invention relates to a thermally-controlled actuator device of the type comprising a body, a part held stationary relative to the body by a low-melting point connection material, e.g. brazing or equivalent means, and a mass of exothermic material suitable for acting on command to give off intense heat energy suitable for melting the connection material so as to release the part relative to the body, wherein the exothermic material is housed in a chamber that is subdivided into a plurality of compartments suitable for confining said material in close thermal contact with the wall of the chamber.
摘要翻译：本发明涉及一种热控致动器装置，其类型包括主体，通过低熔点连接材料相对于主体保持固定的部分，例如，钎焊或等效装置，以及大量放热材料，其适于作用于发出适于熔化连接材料的强热能，以便相对于主体释放该部件，其中放热材料容纳在室细分成多个适合于限制所述材料与室的壁紧密热接触的隔室。

6. 发明申请

US20050242363A1 Low-capacity vertical diode 有权
标题翻译：低容量立式二极管
公开(公告)号：US20050242363A1
公开(公告)日：2005-11-03
申请号：US11159991
申请日：2005-06-23
申请人： Emmanuel Collard , Patrick Poveda
发明人： Emmanuel Collard , Patrick Poveda
IPC分类号： H01L29/861 , H01L29/868 , H01L29/22
CPC分类号： H01L29/868 , H01L29/8613
摘要： A vertical diode of low capacitance formed in a front surface of a semiconductor substrate, including a first area protruding from the substrate surface including at least one doped semiconductor layer of a conductivity type opposite to that of the substrate, the upper surface of the semiconductor layer supporting a first welding ball. The diode includes a second area including on the substrate a thick conductive track supporting at least two second welding balls, said first and second welding balls defining a plane parallel to the substrate plane.
摘要翻译：一种低电容的垂直二极管，其形成在半导体衬底的前表面中，包括从衬底表面突出的第一区域，该第一区域包括至少一个与衬底相反的导电类型的掺杂半导体层，半导体层的上表面支持第一焊球。二极管包括第二区域，该第二区域包括在基板上的支撑至少两个第二焊球的厚导电轨道，所述第一焊球和第二焊球限定平行于衬底平面的平面。

7. 发明申请

US20050073373A1 Integrated coupler 有权
标题翻译：集成耦合器
公开(公告)号：US20050073373A1
公开(公告)日：2005-04-07
申请号：US10949941
申请日：2004-09-24
申请人： Francois Dupont , Patrick Poveda
发明人： Francois Dupont , Patrick Poveda
IPC分类号： H01L21/822 , H01L27/04 , H03H7/48 , H01P5/12
CPC分类号： H03H7/487
摘要： A non-directional coupler including a semiconductor junction in series with a capacitor, the semiconductor junction being formed so that the threshold frequency short of which it behaves as a rectifier is smaller than the coupler's operating frequency.
摘要翻译：包括与电容器串联的半导体结的非定向耦合器，形成半导体结，使得其作为整流器行为的阈值频率小于耦合器的工作频率。

8. 发明申请

US20080158090A1 INTEGRATED COUPLER 有权
标题翻译：集成耦合器
公开(公告)号：US20080158090A1
公开(公告)日：2008-07-03
申请号：US12035458
申请日：2008-02-22
申请人： Francois Dupont , Patrick Poveda
发明人： Francois Dupont , Patrick Poveda
IPC分类号： H01Q1/50 , H03H11/04
CPC分类号： H03H7/487
摘要： A non-directional coupler including a semiconductor junction in series with a capacitor, the semiconductor junction being formed so that the threshold frequency short of which it behaves as a rectifier is smaller than the coupler's operating frequency.
摘要翻译：包括与电容器串联的半导体结的非定向耦合器，形成半导体结，使得其作为整流器行为的阈值频率小于耦合器的工作频率。

9. 发明授权

US06979852B2 Variable capacitance 有权
标题翻译：可变电容
公开(公告)号：US06979852B2
公开(公告)日：2005-12-27
申请号：US10669107
申请日：2003-09-23
申请人： Patrick Poveda
发明人： Patrick Poveda
IPC分类号： H01L29/93 , H01L29/94 , H01L27/108 , H01L29/76
CPC分类号： H01L29/93 , H01L29/0657 , H01L29/0688 , H01L29/94 , H01L29/945
摘要： A variable capacitance formed in a semiconductor substrate with a ribbed surface, having a first electrode formed of all the ribs protruding from the substrate, of portions of the substrate underlying the ribs, and of at least portions of the substrate separating the bases of two ribs, having a second electrode superposed to at least one portion of the first electrode. The ribs are irregular in terms of cross-section and/or planar base surface area.
摘要翻译：形成在具有肋状表面的半导体衬底中的可变电容器，具有由从衬底突出的所有肋形成的第一电极，位于肋下方的衬底的部分以及分隔两个肋的基部的至少部分的衬底具有与第一电极的至少一部分重叠的第二电极。肋在横截面和/或平面基面积方面是不规则的。

10. 发明授权

US06972240B2 Forming of close thin trenches 有权
标题翻译：形成紧密的薄沟槽
公开(公告)号：US06972240B2
公开(公告)日：2005-12-06
申请号：US10717286
申请日：2003-11-19
申请人： Patrick Poveda
发明人： Patrick Poveda
IPC分类号： H01L21/308 , H01L21/334 , H01L21/762 , H01L21/76
CPC分类号： H01L29/66181 , H01L21/3086 , H01L21/3088 , H01L21/76229
摘要： A method for forming narrow trenches in a silicon substrate, comprising the steps of: etching the substrate to form first trenches separated by first silicon ribs; performing a thermal oxidation of the substrate to form a silicon oxide layer around the substrate, to obtain second trenches and second silicon ribs; filling the second trenches with fingers of an etchable material; etching the oxide down to the upper surface of the second ribs while keeping oxide portions between said material fingers and the second ribs; etching away the second silicon ribs and said material fingers; etching the oxide to expose the substrate at the bottom of the oxide portions, while keeping oxide fingers; and etching the substrate between the oxide fingers to form narrow trenches in the substrate.
摘要翻译：一种用于在硅衬底中形成窄沟槽的方法，包括以下步骤：蚀刻衬底以形成由第一硅肋分隔开的第一沟槽; 进行基板的热氧化以在基板周围形成氧化硅层，以获得第二沟槽和第二硅肋; 用可蚀刻材料的手指填充第二沟槽; 将氧化物蚀刻到第二肋的上表面，同时保持所述材料指和第二肋之间的氧化物部分; 蚀刻掉第二硅肋和所述材料指; 蚀刻氧化物以在氧化物部分的底部露出衬底，同时保持氧化物指; 并蚀刻氧化物指状物之间的衬底以在衬底中形成窄沟槽。

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