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1. 发明申请

US20130166354A1 VALUATION ESTIMATION 审中-公开
标题翻译：估值估算
公开(公告)号：US20130166354A1
公开(公告)日：2013-06-27
申请号：US13335653
申请日：2011-12-22
申请人： Patrick Hummel , Tom Gulik , Michael Schwarz , Sergey Smirnov
发明人： Patrick Hummel , Tom Gulik , Michael Schwarz , Sergey Smirnov
IPC分类号： G06Q30/02
CPC分类号： G06Q50/00
摘要： Example systems, methods, apparatuses, or articles of manufacture, etc. are disclosed that may collect, process, or use estimates of market value.
摘要翻译：公开了可以收集，处理或使用市场价值估计的示例系统，方法，装置或制品等。

2. 发明授权

US6130472A Moisture and ion barrier for protection of devices and interconnect structures 失效
公开(公告)号：US6130472A
公开(公告)日：2000-10-10
申请号：US122353
申请日：1998-07-24
申请人： Claudius Feger , John Patrick Hummel
发明人： Claudius Feger , John Patrick Hummel
IPC分类号： H01L21/60 , H01L21/312 , H01L23/00 , H01L29/40
CPC分类号： H01L23/564 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044
摘要： The present invention provides polymeric materials that can be used as a moisture/ion barrier layer for inhibiting the penetration of moisture and/or ions for coming into contact with the metal wiring found in chip level interconnects. The present invention also provides a means to protect the chip backside from being contaminated by metal atoms or metal ions which are capable of forming mobile silicides, which can migrate to the active sites of the semiconductor and destroy them. The present invention further provides methods of forming such polymeric barrier layers on at least one surface of an interconnect structure.

3. 发明授权

US06448176B1 Dual damascene processing for semiconductor chip interconnects 有权
标题翻译：用于半导体芯片互连的双镶嵌处理
公开(公告)号：US06448176B1
公开(公告)日：2002-09-10
申请号：US09699900
申请日：2000-10-30
申请人： Alfred Grill , John Patrick Hummel , Christopher Vincent Jahnes , Vishnubhai Vitthalbhai Patel , Katherine Lynn Saenger
发明人： Alfred Grill , John Patrick Hummel , Christopher Vincent Jahnes , Vishnubhai Vitthalbhai Patel , Katherine Lynn Saenger
IPC分类号： H01L214763
CPC分类号： H01L21/76811 , H01L21/76813 , H01L2221/1063 , Y10S438/945
摘要： The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are filled with conductive material to form the wiring and via levels. The invention comprises a twice patterned single mask layer Dual Damascene process modified by the addition of an easy-to-integrate sidewall liner to protect organic interlevel and intralevel dielectrics from potential damage induced by photoresist stripping steps during lithographic rework. The invention further comprises a method for forming a dual pattern hard mask which may be used to form dual relief cavities for use in Dual Damascene processing, said dual pattern hard mask comprising a first set of one or more layers with a first pattern, and a second set of one or more layers with a second pattern.
摘要翻译：本发明涉及用于在衬底中形成双浮雕图案的平版印刷方法，以及通过双镶嵌工艺制造半导体芯片中的多层互连结构的方法，其中形成在电介质中的双浮雕空穴填充有导电材料形成布线和通孔层。本发明包括通过添加易于整合的侧壁衬里而修改的两次图案化单掩膜层双镶嵌工艺，以保护有机层间和层间电介质免受光刻胶剥离步骤在光刻返工期间引起的潜在损伤。本发明还包括一种用于形成双重图案硬掩模的方法，该双面图案硬掩模可用于形成用于双镶嵌处理的双浮雕空腔，所述双图案硬掩模包括具有第一图案的一层或多层第一组和具有第二图案的第二组一层或多层。

4. 发明授权

US08944531B2 Container assembly mountable to a door 有权
标题翻译：集装箱组装可安装到门
公开(公告)号：US08944531B2
公开(公告)日：2015-02-03
申请号：US13605912
申请日：2012-09-06
申请人： Troy Alan Wyman , Steven Cochrane , Benjamin Patrick Hummel
发明人： Troy Alan Wyman , Steven Cochrane , Benjamin Patrick Hummel
IPC分类号： A47B67/02 , A47F5/08
CPC分类号： E06B7/34 , A47B51/00
摘要： A container assembly may include a container having a side wall defining and circumscribing a container interior, a first frame extending from and about the side wall and defining an outer terminal portion sized and configured to abut a door about an opening formed therein, a second frame defining an outer terminal portion sized and configured to abut the door about the opening and an inner terminal portion sized and configured to extend over at least a portion of the opening about a periphery of the opening, and at least a first fixation member to secure the first frame to the second frame with the container extending into the opening and with a portion of the door adjacent to the opening positioned between the outer terminal portions of the first and second frames to clamp the container assembly to the door about the opening.
摘要翻译：容器组件可以包括具有限定和限制容器内部的侧壁的容器，从侧壁延伸并围绕侧壁限定出第一框架，并且限定外部端子部分的尺寸和构造以围绕形成在其中的开口邻接门;第二框架限定尺寸和构造成围绕所述开口邻接所述门的外部端子部分以及尺寸和构造成围绕所述开口的周边延伸至所述开口的至少一部分的内部端子部分，以及至少第一固定构件，第一框架到第二框架，其中容器延伸到开口中，并且门的一部分与位于第一和第二框架的外部端子部分之间的开口相邻，以将容器组件夹紧在开口周围的门上。

5. 发明申请

US20140020851A1 INSULATED GLASS BLIND ASSEMBLY 审中-公开
标题翻译：绝缘玻璃罩组件
公开(公告)号：US20140020851A1
公开(公告)日：2014-01-23
申请号：US13996803
申请日：2011-12-21
申请人： Allen Christopher Ouzts , Benjamin Patrick Hummel , Michael Shane Eveland , Marc Richard Spetoskey
发明人： Allen Christopher Ouzts , Benjamin Patrick Hummel , Michael Shane Eveland , Marc Richard Spetoskey
IPC分类号： E06B9/264
CPC分类号： E06B9/264 , E06B2003/66395 , E06B2009/2646
摘要： An insulated glass assembly providing a simple and effective construction for installing a modular assembly inside the insulated glass assembly. The insulated glass assembly may include a spacer frame configured to support the modular assembly, such as a modular blind or shade assembly. The modular assembly may include a head rail module and a control operator module that may be captured by the spacer frame. For example, the spacer frame may capture the head rail module near the upper portion or the lower portion of the insulated glass blind assembly, and may capture the control operator module on a side adjacent to the head rail module.
摘要翻译：绝缘玻璃组件提供了一种简单有效的结构，用于在隔热玻璃组件内安装模块化组件。隔热玻璃组件可以包括被配置为支撑模块化组件的间隔框架，例如模块化的遮光罩或遮光罩组件。模块化组件可以包括可以由间隔框架捕获的头轨模块和控制操作器模块。例如，间隔框架可以在绝缘玻璃盲板组件的上部或下部附近捕获头轨模块，并且可以在与头轨模块相邻的一侧上捕获控制操作器模块。

6. 发明授权

US6140226A Dual damascene processing for semiconductor chip interconnects 失效
公开(公告)号：US6140226A
公开(公告)日：2000-10-31
申请号：US126212
申请日：1998-07-30
申请人： Alfred Grill , John Patrick Hummel , Christopher Vincent Jahnes , Vishnubhai Vitthalbhai Patel , Katherine Lynn Saenger
发明人： Alfred Grill , John Patrick Hummel , Christopher Vincent Jahnes , Vishnubhai Vitthalbhai Patel , Katherine Lynn Saenger
IPC分类号： H01L21/768 , H01L21/4763
CPC分类号： H01L21/76811 , H01L21/76813 , H01L2221/1063 , Y10S438/945
摘要： The present invention relates to lithographic methods for forming a dual relief pattern in a substrate, and the application of such methods to fabricating multilevel interconnect structures in semiconductor chips by a Dual Damascene process in which dual relief cavities formed in a dielectric are filled with conductive material to form the wiring and via levels. The invention comprises a twice patterned single mask layer Dual Damascene process modified by the addition of an easy-to-integrate sidewall liner to protect organic interlevel and intralevel dielectrics from potential damage induced by photoresist stripping steps during lithographic rework. The invention further comprises a method for forming a dual pattern hard mask which may be used to form dual relief cavities for use in Dual Damascene processing, said dual pattern hard mask comprising a first set of one or more layers with a first pattern, and a second set of one or more layers with a second pattern.

7. 发明授权

US5976710A Low TCE polyimides as improved insulator in multilayer interconnect structures 失效
标题翻译：低TCE聚酰亚胺作为多层互连结构中改进的绝缘体
公开(公告)号：US5976710A
公开(公告)日：1999-11-02
申请号：US838757
申请日：1997-04-10
申请人： Krishna Gandhi Sachdev , John Patrick Hummel , Sundar Mangalore Kamath , Robert Neal Lang , Anton Nendaic , Charles Hampton Perry , Harbans Sachdev
发明人： Krishna Gandhi Sachdev , John Patrick Hummel , Sundar Mangalore Kamath , Robert Neal Lang , Anton Nendaic , Charles Hampton Perry , Harbans Sachdev
IPC分类号： C08G73/10 , H01L23/12 , H01L23/14 , H01L23/498 , H01L23/52 , H01L23/532 , H01L23/538 , H01L29/12
CPC分类号： H01L23/49894 , H01L23/5329 , H01L2924/0002 , H01L2924/09701 , Y10T428/12528 , Y10T428/12549 , Y10T428/12569 , Y10T428/12632 , Y10T428/31681 , Y10T428/31721
摘要： A multilevel high density interconnect structure of a semiconductor device or package including a substrate having at least one conductive feature therein, a film of a polyimide composition on the substrate and selected from the group consisting of a cured product of a polyamic acid and a cured product of a polyamic ester. The polyamic acid is prepared by reacting a stoichiometric excess of a linear aromatic diamine and aromatic dianhydride to form a first reaction product where the molar ratio of said diamine to said aromatic anhydride is in the range from 100:97 to 100:99.5 and then reacting the first reaction product with an aromatic anhydride. The polyamic ester is prepared by reacting a stoichiometric excess of a linear aromatic diamine and an aromatic diester diacyl chloride to form a second reaction product where the molar ratio of said diamine to said diester diacyl chloride is in the range from 100:97 to 100:99.5 and then reacting the second reaction product with aromatic anhydride. There is at least one interconnective conductive metallurgical feature in the film a polyimide composition in contact with said conductive feature in said substrate.
摘要翻译：一种半导体器件或封装的多层高密度互连结构，其包括其中具有至少一个导电特征的衬底，所述衬底上的聚酰亚胺组合物的膜选自聚酰胺酸和固化产物的固化产物的聚酰胺酯。聚酰胺酸通过使化学计量过量的线性芳族二胺和芳族二酸酐反应以形成第一反应产物，其中所述二胺与所述芳族酸酐的摩尔比在100:97至100:99.5的范围内，然后使第一反应产物与芳族酸酐反应。通过使化学计量过量的线性芳族二胺和芳族二酯二酰氯反应形成第二反应产物，其中所述二胺与所述二酯二酰氯的摩尔比为100：97至100： 99.5，然后使第二反应产物与芳族酸酐反应。在膜中存在与所述衬底中的所述导电特征接触的聚酰亚胺组合物中的至少一个互连导电冶金特征。

8. 发明授权

US5962113A Integrated circuit device and process for its manufacture 失效
标题翻译：集成电路器件及其制造工艺
公开(公告)号：US5962113A
公开(公告)日：1999-10-05
申请号：US739144
申请日：1996-10-28
申请人： Hugh Ralph Brown , Kenneth Raymond Carter , Hyuk-Jin Cha , Richard Anthony Dipietro , James Lupton Hedrick , John Patrick Hummel , Robert Dennis Miller , Do Yeung Yoon
发明人： Hugh Ralph Brown , Kenneth Raymond Carter , Hyuk-Jin Cha , Richard Anthony Dipietro , James Lupton Hedrick , John Patrick Hummel , Robert Dennis Miller , Do Yeung Yoon
IPC分类号： C08G77/455 , C08G73/10 , C09D183/10 , H01L21/316 , H01L21/768 , H01L23/498 , H01L23/522 , B32B3/10 , B32B15/08
CPC分类号： H01L23/49894 , H01L2924/0002 , H01L2924/09701 , Y10S428/901 , Y10T428/24917 , Y10T428/31681 , Y10T428/31721
摘要： The invention relates to an integrated circuit device comprising (i) a substrate; (ii) metallic circuit lines positioned on the substrate and (iii) a dielectric material positioned on the circuit lines. The dielectric material comprises the reaction product of an organic polysilica and polyamic ester preferably terminated with an alkoxysilyl alkyl group.
摘要翻译：本发明涉及一种集成电路器件，包括：（i）衬底; （ii）位于基板上的金属电路线，和（iii）位于电路线上的电介质材料。电介质材料包括有机聚硅氧烷与优选用烷氧基甲硅烷基烷基封端的聚酰胺酯的反应产物。

9. 发明申请

US20140062276A1 CONTAINER ASSEMBLY MOUNTABLE TO A DOOR 有权
标题翻译：集装箱装配到门
公开(公告)号：US20140062276A1
公开(公告)日：2014-03-06
申请号：US13605912
申请日：2012-09-06
申请人： Troy Alan Wyman , Steven Cochrane , Benjamin Patrick Hummel
发明人： Troy Alan Wyman , Steven Cochrane , Benjamin Patrick Hummel
IPC分类号： A47F5/08
CPC分类号： E06B7/34 , A47B51/00
摘要： A container assembly may include a container having a side wall defining and circumscribing a container interior, a first frame extending from and about the side wall and defining an outer terminal portion sized and configured to abut a door about an opening formed therein, a second frame defining an outer terminal portion sized and configured to abut the door about the opening and an inner terminal portion sized and configured to extend over at least a portion of the opening about a periphery of the opening, and at least a first fixation member to secure the first frame to the second frame with the container extending into the opening and with a portion of the door adjacent to the opening positioned between the outer terminal portions of the first and second frames to clamp the container assembly to the door about the opening.
摘要翻译：容器组件可以包括具有限定和限制容器内部的侧壁的容器，从侧壁延伸并围绕侧壁限定出第一框架，并且限定外部端子部分的尺寸和构造以围绕形成在其中的开口邻接门;第二框架限定尺寸和构造成围绕所述开口邻接所述门的外部端子部分以及尺寸和构造成围绕所述开口的周边延伸至所述开口的至少一部分的内部端子部分，以及至少第一固定构件，第一框架到第二框架，其中容器延伸到开口中，并且门的一部分与位于第一和第二框架的外部端子部分之间的开口相邻，以将容器组件夹紧在开口周围的门上。

10. 发明申请

US20140032474A1 FORECASTING AN OUTCOME OF AN ELECTION 审中-公开
标题翻译：预测选举结果
公开(公告)号：US20140032474A1
公开(公告)日：2014-01-30
申请号：US13559527
申请日：2012-07-26
申请人： Patrick Hummel , David Rothschild
发明人： Patrick Hummel , David Rothschild
IPC分类号： G06N5/02
CPC分类号： G06Q50/26 , G06Q10/04
摘要： Embodiments of methods or apparatus for forecasting one or more election outcomes are described.
摘要翻译：描述了用于预测一个或多个选举结果的方法或装置的实施例。

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