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1. 发明申请

WO2009144669A1 DLL FOR PERIOD JITTER MEASUREMENT 审中-公开
标题翻译： DLL用于定期测试
公开(公告)号：WO2009144669A1
公开(公告)日：2009-12-03
申请号：PCT/IB2009/052214
申请日：2009-05-27
申请人： NXP B.V. , PELGROM, Marcel J., M. , VEENDRICK, Hendricus, Joseph, Maria , ZIEREN, Victor
发明人： PELGROM, Marcel J., M. , VEENDRICK, Hendricus, Joseph, Maria , ZIEREN, Victor
IPC分类号： G01R31/317
CPC分类号： G01R31/31709
摘要： A sensor (400) for sensing jitter in a clock signal has a DLL (402, 310, 312) for locking a clock signal and a delayed version of the clock signal. The sensor comprises a delay line (402) having a first number of cascaded controllable delay segments. The DLL uses a second number of the cascaded delay segments for generating a delay of an average clock period of the clock signal. The second number is smaller than the first number. The sensor also has a comparator (408) for supplying a sensor output signal representative ofa comparison of the clock signal and a further delayed version of the clock signal. The further delayed version of the clock signal is obtained from an output of a specific one of the delay segments located in the delay line after the second number of cascaded delay segments.
摘要翻译：用于感测时钟信号中的抖动的传感器（400）具有用于锁定时钟信号和时钟信号的延迟版本的DLL（402,310,312）。传感器包括具有第一数量级联的可控延迟段的延迟线（402）。 DLL使用第二数量的级联延迟段来产生时钟信号的平均时钟周期的延迟。第二个数字小于第一个数字。传感器还具有比较器（408），用于提供表示时钟信号和时钟信号的进一步延迟版本的比较的传感器输出信号。时钟信号的进一步延迟版本是从第二级联延迟段之后的位于延迟线中的特定延迟段的输出获得的。

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