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1. 发明专利

IT1031836B 未知
公开(公告)号：IT1031836B
公开(公告)日：1979-05-10
申请号：IT2039075
申请日：1975-02-18
申请人： NAOKI MATSUNAGA
IPC分类号： A47B20060101 , A47B

2. 发明授权

US07105905B2 Thin film transistor, TFT substrate and liquid crystal display unit 有权
标题翻译：薄膜晶体管，TFT基板和液晶显示单元
公开(公告)号：US07105905B2
公开(公告)日：2006-09-12
申请号：US10724040
申请日：2003-12-01
申请人： Naoki Matsunaga , Kenji Sera
发明人： Naoki Matsunaga , Kenji Sera
IPC分类号： H01L29/04 , G02F1/136
CPC分类号： H01L27/1218 , G02F1/136209 , H01L27/12 , H01L27/1214 , H01L29/78621 , H01L29/78633
摘要： A thin film transistor is provided including an active layer, in which a source region and drain region are formed, a first light-shielding film shielding a light incident on the active layer, and a second light-shielding film between the active layer and the first shielding film. A carrier concentration of at least surface portion of the second light-shielding film which opposes the active layer is about 1017/cm3 or less.
摘要翻译：提供一种薄膜晶体管，其包括其中形成源极区和漏极区的有源层，屏蔽入射在有源层上的光的第一遮光膜，以及在活性层和有源层之间的第二遮光膜第一屏蔽膜。与有源层相对的第二遮光膜的至少表面部分的载流子浓度为约10/3/3以上。

3. 外观设计

USD358749S Pneumatically operated portable nail gun 失效
公开(公告)号：USD358749S
公开(公告)日：1995-05-30
申请号：US22682
申请日：1994-05-10
申请人： Naoki Matsunaga , Takeshi Matsuoka
设计人： Naoki Matsunaga , Takeshi Matsuoka

4. 外观设计

USD337499S Portable electric grinder 失效
公开(公告)号：USD337499S
公开(公告)日：1993-07-20
申请号：US745086
申请日：1991-08-08
申请人： Naoki Matsunaga , Yuichiro Sasaki
设计人： Naoki Matsunaga , Yuichiro Sasaki

5. 发明授权

US07123314B2 Thin-film transistor with set trap level densities, and method of manufactures 有权
标题翻译：具有集水阱密度的薄膜晶体管和制造方法
公开(公告)号：US07123314B2
公开(公告)日：2006-10-17
申请号：US10871000
申请日：2004-06-21
申请人： Naoki Matsunaga , Kenji Sera
发明人： Naoki Matsunaga , Kenji Sera
IPC分类号： G02F1/136
CPC分类号： H01L29/78696 , G02F1/136209 , H01L27/12 , H01L29/66757 , H01L29/78609 , H01L29/78618 , H01L29/78621 , H01L29/78633 , H01L29/78675
摘要： A light shielding film capable of shielding against light entering an active layer of a TFT and electroconductive is formed on the lower layer side of the active layer. Electrical stress is applied by causing a current in an insulating film between source and drain electrodes and the light shielding film to introduce a trap level at a density at least about 5×1012/cm2 into a source region and a drain region in a surface portion of the active layer on the light shielding film side.
摘要翻译：在有源层的下层侧形成能够遮蔽入TFT的有源层和导电的光的遮光膜。通过在源电极和漏电极之间的绝缘膜中引起电流而施加电应力，并且遮光膜以至少约5×10 12 / cm 2的密度引入陷阱水平， SUP>到遮光膜侧的有源层的表面部分中的源极区域和漏极区域。

6. 发明授权

US07023015B2 Thin-film semiconductor device and liquid crystal display 有权
标题翻译：薄膜半导体器件和液晶显示器
公开(公告)号：US07023015B2
公开(公告)日：2006-04-04
申请号：US10638398
申请日：2003-08-12
申请人： Naoki Matsunaga , Kenji Sera , Mitsuasa Takahashi
发明人： Naoki Matsunaga , Kenji Sera , Mitsuasa Takahashi
IPC分类号： H01L29/04
CPC分类号： H01L27/1214 , H01L27/1259 , H01L27/3244 , H01L29/4908 , H01L29/78624
摘要： A thin-film semiconductor device is provided including a plurality of thin-film transistors (TFT) having different driving voltages formed on an glass substrate, wherein a gate insulator electric field at each of the driving voltages of the plurality of thin-film transistors is in a range of about 1 MV/cm to 2 MV/cm, and a drain concentration of p-type thin-film transistors (TFT) is in a range of about 3E+19/cm3 to 1E+20/cm3.
摘要翻译：提供一种薄膜半导体器件，其包括在玻璃基板上形成的具有不同驱动电压的多个薄膜晶体管（TFT），其中，多个薄膜晶体管的每个驱动电压下的栅极绝缘体电场为在约1MV / cm至2MV / cm的范围内，p型薄膜晶体管（TFT）的漏极浓度在约3E + 19 / cm 3至 1E + 20 / cm 3。

7. 发明申请

US20060052415A1 N-{2-chloro-4-[(6,7-dimethoxy-4-quinolyl)oxy]phenyl}-n'-(5-methyl-3-isoxazolyl)urea salt in crystalline form 有权
标题翻译： N- {2-氯-4 - [（6,7-二甲氧基-4-喹啉基）氧基]苯基} -N' - （5-甲基-3-异恶唑基）脲盐
公开(公告)号：US20060052415A1
公开(公告)日：2006-03-09
申请号：US10532104
申请日：2003-10-21
申请人： Naoki Matsunaga , Satoshi Yoshida , Ayako Yoshino , Tatsuo Nakajima
发明人： Naoki Matsunaga , Satoshi Yoshida , Ayako Yoshino , Tatsuo Nakajima
IPC分类号： A61K31/4709 , C07D403/02
CPC分类号： C07D413/12
摘要： The present invention provides a crystal of a pharmaceutically acceptable salt of N-{2-chloro-4-[(6,7-dimethoxy-4-quinolyl)oxy]phenyl}-N′-(5-methyl-3-isoxazolyl) urea. This crystal of salt is usable for the therapy of a disease selected from the group consisting of tumors, diabetic retinopathy, chronic rheumatism, psoriasis, atherosclerosis, Kaposi's sarcoma, and exudation type age-related maculopathy, and has characteristics suitable for applications of oral pharmaceutical preparations.
摘要翻译：本发明提供N- {2-氯-4 - [（6,7-二甲氧基-4-喹啉基）氧基]苯基} -N' - （5-甲基-3-异恶唑基）的药学上可接受的盐的晶体，尿素。该盐晶体可用于治疗选自肿瘤，糖尿病性视网膜病，慢性风湿病，牛皮癣，动脉粥样硬化，卡波西氏肉瘤和渗出型年龄相关性黄斑病变的疾病，并且具有适用于口服药物的特征准备工作

8. 外观设计

USD369382S Printer for electronic computer 失效
公开(公告)号：USD369382S
公开(公告)日：1996-04-30
申请号：US33772
申请日：1995-01-19
申请人： Naoki Matsunaga , Hideki Ishida
设计人： Naoki Matsunaga , Hideki Ishida

9. 发明授权

US07071040B2 Method of fabricating thin film transistor 有权
标题翻译：制造薄膜晶体管的方法
公开(公告)号：US07071040B2
公开(公告)日：2006-07-04
申请号：US10639478
申请日：2003-08-13
申请人： Naoki Matsunaga , Kenji Sera
发明人： Naoki Matsunaga , Kenji Sera
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L29/66757 , H01L29/458 , H01L29/66765 , H01L29/78675 , H01L29/78678
摘要： A method of fabricating a thin film transistor including an electrically insulating substrate, a semiconductor layer formed on the substrate, and source and drain electrodes formed above source and drain regions formed in the semiconductor layer, the source and drain electrodes being composed of aluminum or aluminum alloy, the method including the steps of forming a gate electrode, implanting impurity ions into the semiconductor layer for forming the source and drain regions, forming an interlayer insulating film entirely over the substrate, forming contact holes throughout the interlayer insulating film such that the source and drain regions are exposed through the contact holes, forming an electrically conductive film composed of aluminum or aluminum alloy, in the contact holes for forming the source and drain electrodes, and thermally annealing the substrate at 275 to 350 degrees centigrade for 1.5 to 3 hours in inert atmosphere.
摘要翻译：一种制造薄膜晶体管的方法，所述薄膜晶体管包括电绝缘基板，形成在所述基板上的半导体层以及形成在所述半导体层中形成的源极和漏极区之上的源极和漏极，所述源极和漏极由铝或铝合金，该方法包括以下步骤：形成栅电极，将杂质离子注入用于形成源极和漏极区的半导体层中，在衬底上整个形成层间绝缘膜，在整个层间绝缘膜上形成接触孔，使得源漏极区域通过接触孔露出，形成由铝或铝合金构成的导电膜，用于形成源电极和漏电极的接触孔中，并在275-350℃下热处理基片1.5至3小时在惰性气氛中。

10. 发明申请

US20050007512A1 Thin-film transistor with set trap level densities, and method of manufactures 有权
标题翻译：具有集水阱密度的薄膜晶体管和制造方法
公开(公告)号：US20050007512A1
公开(公告)日：2005-01-13
申请号：US10871000
申请日：2004-06-21
申请人： Naoki Matsunaga , Kenji Sera
发明人： Naoki Matsunaga , Kenji Sera
IPC分类号： G02F1/136 , G02F1/1362 , H01L21/336 , H01L27/12 , H01L29/786
CPC分类号： H01L29/78696 , G02F1/136209 , H01L27/12 , H01L29/66757 , H01L29/78609 , H01L29/78618 , H01L29/78621 , H01L29/78633 , H01L29/78675
摘要： A light shielding film capable of shielding against light entering an active layer of a TFT and electroconductive is formed on the lower layer side of the active layer. Electrical stress is applied by causing a current in an insulating film between source and drain electrodes and the light shielding film to introduce a trap level at a density at least about 5×1012/cm2 into a source region and a drain region in a surface portion of the active layer on the light shielding film side.
摘要翻译：在有源层的下层侧形成能够遮蔽入TFT的有源层和导电的光的遮光膜。通过在源电极和漏电极之间的绝缘膜中引起电流并且遮光膜将至少约5×10 12 / cm 2的密度的陷阱水平引入源极区域和漏极区域中来施加电应力在遮光膜侧的有源层的表面部分。

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