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1. 发明授权

US06462712B1 Frequency tunable patch antenna device 失效
标题翻译：频率可调贴片天线装置
公开(公告)号：US06462712B1
公开(公告)日：2002-10-08
申请号：US09910895
申请日：2001-07-24
申请人： Ming Cheng Liang
发明人： Ming Cheng Liang
IPC分类号： H01Q138
CPC分类号： H01Q1/38 , H01Q9/0442
摘要： A patch antenna device includes an antenna patch, and one or more capacitors loaded into the antenna patch for increasing an equivalent working area to the antenna patch. The capacitor may be any suitable capacitor, such as the chip capacitor. The provision of the capacitor into the antenna patch allows the electricity to flow into and to flow out of the capacitor, and consumes less electric power. A ground board and a dielectric plate are attached to the antenna patch. One or more feeds and probes are loaded into the antenna patch for exciting various modes.
摘要翻译：贴片天线装置包括天线贴片和加载到天线贴片中的一个或多个电容器，用于增加天线贴片的等效工作区域。电容器可以是任何合适的电容器，例如片式电容器。将电容器放入天线贴片允许电流流入并流出电容器，并且消耗更少的电力。接地板和电介质板连接到天线贴片。一个或多个馈送和探测器被加载到天线补片中以激励各种模式。

2. 发明授权

US07940588B2 Chip testing circuit 有权
标题翻译：芯片测试电路
公开(公告)号：US07940588B2
公开(公告)日：2011-05-10
申请号：US12548828
申请日：2009-08-27
申请人： Der-Min Yuan , Ming-Cheng Liang , Kuo-Hua Lee
发明人： Der-Min Yuan , Ming-Cheng Liang , Kuo-Hua Lee
IPC分类号： G11C7/00
CPC分类号： G01R31/31921 , G11C29/40
摘要： The invention discloses a chip testing circuit that increases the testing throughput. The chip testing circuit uses a multiplexer to switch the connection of the data compressing circuit between data compressing base units which compress 4 XIOs, so as to obtain a multiplexer of testing data by one single interface circuit and to increase the testing throughput.
摘要翻译：本发明公开了一种提高测试吞吐量的芯片测试电路。芯片测试电路使用多路复用器在数据压缩基础单元之间切换数据压缩电路的连接，压缩基站单元压缩4个XIO，以便通过单个接口电路获得测试数据的多路复用器，并提高测试吞吐量。

3. 发明申请

US20100171509A1 CHIP TESTING CIRCUIT 有权
标题翻译：芯片测试电路
公开(公告)号：US20100171509A1
公开(公告)日：2010-07-08
申请号：US12548828
申请日：2009-08-27
申请人： Der-Min YUAN , Ming-Cheng Liang , Kuo-Hua Lee
发明人： Der-Min YUAN , Ming-Cheng Liang , Kuo-Hua Lee
IPC分类号： G01R31/02
CPC分类号： G01R31/31921 , G11C29/40
摘要： The invention discloses a chip testing circuit that increases the testing throughput. The chip testing circuit uses a multiplexer to switch the connection of the data compressing circuit between data compressing base units which compress 4 XIOs, so as to obtain a multiplexer of testing data by one single interface circuit and to increase the testing throughput.
摘要翻译：本发明公开了一种提高测试吞吐量的芯片测试电路。芯片测试电路使用多路复用器在数据压缩基础单元之间切换数据压缩电路的连接，压缩基站单元压缩4个XIO，以便通过单个接口电路获得测试数据的多路复用器，并提高测试吞吐量。

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