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1. 发明公开

KR20180055584A 복용알람 및 알약 자동토출 약통 审中-公开
公开(公告)号：KR20180055584A
公开(公告)日：2018-05-25
申请号：KR20160153570
申请日：2016-11-17
申请人： MIN GI HONG , LEE JUN , MO TAE GYEONG
发明人： MIN GI HONG , LEE JUN , MO TAE GYEONG
IPC分类号： A61J7/00 , A61J1/03 , A61J7/04 , G08B3/10
摘要： 본발명은태엽의탄성에너지를이용하여자동으로회전하되복수의토출구가있는원형회전판; 상기회전판하부에위치하며환형형태의알약을저장하는원통형용기; 상기용기에저장된알약중 일정개수를상기토출구로토출되도록이동시키는이동부; 및상기회전판의회전을정지시키는고정부로구성되되,상기회전판은회전판의중심에서동일한거리에위치한복수의토출구; 각각의토출구의거리를조절할수 있는간극조절바; 및상기각각의토출구의회전방향의전면에일정한간격으로위치한고정홀로구성되며, 상기원통형용기는내부밑면으로부터일정한높이에깔떼기형상의유도면이있어알약이상기유도면말단으로이동하여상기이동부와연결된구성이고, 상기이동부는일정양의알약이보관된보관통, 상기보관통의밑판, 상기밑판을수직이동시켜상기보관통의체적을증감시킬수 있는용량조절바및 상기보관통을상기이송관을통해상기회전판의토출구로이동시킬수 있는밀대로구성되며, 상기고정부는상기회전판하부에위치하여회전판의고정홀에결합하여상기회전판이동을고정시키는것을특징으로하는복용알람및 알약자동토출약통에관한것이다.

2. 发明授权

US08049325B2 Integrated circuit devices having printed circuit boards therein with staggered bond fingers that support improved electrical isolation 有权
标题翻译：具有印刷电路板的集成电路器件具有交错的键合指状件，其支持改进的电隔离
公开(公告)号：US08049325B2
公开(公告)日：2011-11-01
申请号：US12472725
申请日：2009-05-27
申请人： Shin Mu-Seob , Tae-Hun Kim , Min-Gi Hong , Shin Kim , Tae-Hun Yoon
发明人： Shin Mu-Seob , Tae-Hun Kim , Min-Gi Hong , Shin Kim , Tae-Hun Yoon
IPC分类号： H01L23/538
CPC分类号： H01L23/13 , H01L23/49816 , H01L24/28 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L2224/04042 , H01L2224/05001 , H01L2224/05009 , H01L2224/05554 , H01L2224/0557 , H01L2224/05571 , H01L2224/16145 , H01L2224/29339 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48465 , H01L2224/48472 , H01L2224/49109 , H01L2224/49175 , H01L2224/73215 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06562 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01021 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/14 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/05099
摘要： An integrated circuit substrate includes an integrated circuit chip having a plurality of electrically conductive pads on a surface thereof and a printed circuit board mounted to the integrated circuit chip. The printed circuit board includes an alternating arrangement of first and second electrically conductive bond fingers. These first and second bond fingers are elevated at first and second different heights, respectively, relative to the plurality of electrically conductive pads. The printed circuit board also includes a first plurality of electrically insulating pedestals supporting respective ones of the first electrically conductive bond fingers at elevated heights relative to the second electrically conductive bond fingers. First and second pluralities of electrical interconnects (e.g., wires, beam leads) are also provided. The first plurality of electrical interconnects operate to electrically connect first ones of the plurality of electrically conductive pads to respective ones of the first electrically conductive bond fingers. The second plurality of electrical interconnects electrically connect second ones of the plurality of electrically conductive pads to respective ones of the second electrically conductive bond fingers.
摘要翻译：集成电路基板包括在其表面上具有多个导电焊盘的集成电路芯片和安装到集成电路芯片的印刷电路板。印刷电路板包括第一和第二导电键合指状物的交替布置。这些第一和第二粘结指相对于多个导电垫分别在第一和第二不同的高度处升高。印刷电路板还包括第一多个电绝缘基座，其相对于第二导电粘合指状件在升高的高度处支撑相应的第一导电键合指状物。还提供了第一和第二多个电互连（例如，电线，光束引线）。第一多个电互连操作以将多个导电焊盘中的第一个导电焊盘电连接到相应的第一导电焊接指状物。所述第二多个电互连将所述多个导电焊盘中的第二导电焊盘电连接到所述第二导电焊接指中的相应导电焊盘。

3. 发明申请

US20100127381A1 Integrated Circuit Devices Having Printed Circuit Boards Therein With Staggered Bond Fingers That Support Improved Electrical Isolation 有权
标题翻译：具有印刷电路板的集成电路器件，其中具有支持改进的电绝缘的交错键合手指
公开(公告)号：US20100127381A1
公开(公告)日：2010-05-27
申请号：US12472725
申请日：2009-05-27
申请人： Mu-Seob Shin , Tae-Hun Kim , Min-Gi Hong , Shin Kim , Tae-Sung Yoon
发明人： Mu-Seob Shin , Tae-Hun Kim , Min-Gi Hong , Shin Kim , Tae-Sung Yoon
IPC分类号： H01L23/538 , H01L23/50 , H01L23/482
CPC分类号： H01L23/13 , H01L23/49816 , H01L24/28 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L2224/04042 , H01L2224/05001 , H01L2224/05009 , H01L2224/05554 , H01L2224/0557 , H01L2224/05571 , H01L2224/16145 , H01L2224/29339 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48465 , H01L2224/48472 , H01L2224/49109 , H01L2224/49175 , H01L2224/73215 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06562 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01021 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04953 , H01L2924/14 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/05099
摘要： An integrated circuit substrate includes an integrated circuit chip having a plurality of electrically conductive pads on a surface thereof and a printed circuit board mounted to the integrated circuit chip. The printed circuit board includes an alternating arrangement of first and second electrically conductive bond fingers. These first and second bond fingers are elevated at first and second different heights, respectively, relative to the plurality of electrically conductive pads. The printed circuit board also includes a first plurality of electrically insulating pedestals supporting respective ones of the first electrically conductive bond fingers at elevated heights relative to the second electrically conductive bond fingers. First and second pluralities of electrical interconnects (e.g., wires, beam leads) are also provided. The first plurality of electrical interconnects operate to electrically connect first ones of the plurality of electrically conductive pads to respective ones of the first electrically conductive bond fingers. The second plurality of electrical interconnects electrically connect second ones of the plurality of electrically conductive pads to respective ones of the second electrically conductive bond fingers.
摘要翻译：集成电路基板包括在其表面上具有多个导电焊盘的集成电路芯片和安装到集成电路芯片的印刷电路板。印刷电路板包括第一和第二导电键合指状物的交替布置。这些第一和第二粘结指相对于多个导电垫分别在第一和第二不同的高度处升高。印刷电路板还包括第一多个电绝缘基座，其相对于第二导电粘合指状件在升高的高度处支撑相应的第一导电键合指状物。还提供了第一和第二多个电互连（例如，电线，光束引线）。第一多个电互连操作以将多个导电焊盘中的第一个导电焊盘电连接到相应的第一导电焊接指状物。所述第二多个电互连将所述多个导电焊盘中的第二导电焊盘电连接到所述第二导电焊接指中的相应导电焊盘。

4. 发明申请

US20150108663A1 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US20150108663A1
公开(公告)日：2015-04-23
申请号：US14503575
申请日：2014-10-01
申请人： Min Gi HONG
发明人： Min Gi HONG
IPC分类号： H01L25/18 , H01L23/00
CPC分类号： H01L25/18 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/5384 , H01L23/5389 , H01L24/06 , H01L24/16 , H01L24/24 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/92 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05553 , H01L2224/06134 , H01L2224/06135 , H01L2224/06136 , H01L2224/16227 , H01L2224/24227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/4824 , H01L2224/49097 , H01L2224/49109 , H01L2224/49112 , H01L2224/49175 , H01L2224/73207 , H01L2224/73265 , H01L2224/73267 , H01L2224/92127 , H01L2224/92247 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06562 , H01L2924/00014 , H01L2924/1434 , H01L2924/1436 , H01L2924/1438 , H01L2924/15151 , H01L2924/15153 , H01L2924/15172 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099
摘要： Provided is a semiconductor package in which a cell array region and a peripheral circuit region are formed as different semiconductor chips, respectively. First semiconductor chips including memory cells and a second semiconductor chip including only peripheral circuitry common to the first semiconductor chips are electrically connected to each other. Thus, a loading capacitance of the semiconductor package may be reduced. As a result, an RC delay of the semiconductor package may be reduced, thereby improving an operating speed of the semiconductor package.
摘要翻译：提供一种半导体封装，其中单元阵列区域和外围电路区域分别形成为不同的半导体芯片。包括存储单元的第一半导体芯片和仅包括第一半导体芯片公用的外围电路的第二半导体芯片彼此电连接。因此，可以减小半导体封装的负载电容。结果，可以减小半导体封装的RC延迟，从而提高半导体封装的工作速度。

5. 发明授权

US09437586B2 Semiconductor package and method of fabricating the same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US09437586B2
公开(公告)日：2016-09-06
申请号：US14503575
申请日：2014-10-01
申请人： Min Gi Hong
发明人： Min Gi Hong
IPC分类号： H01L25/18 , H01L23/00 , H01L25/065 , H01L23/13 , H01L25/00 , H01L23/538 , H01L23/31 , H01L23/498
CPC分类号： H01L25/18 , H01L23/13 , H01L23/3128 , H01L23/49816 , H01L23/5384 , H01L23/5389 , H01L24/06 , H01L24/16 , H01L24/24 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/92 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05553 , H01L2224/06134 , H01L2224/06135 , H01L2224/06136 , H01L2224/16227 , H01L2224/24227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45139 , H01L2224/48091 , H01L2224/48137 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/4824 , H01L2224/49097 , H01L2224/49109 , H01L2224/49112 , H01L2224/49175 , H01L2224/73207 , H01L2224/73265 , H01L2224/73267 , H01L2224/92127 , H01L2224/92247 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06562 , H01L2924/00014 , H01L2924/1434 , H01L2924/1436 , H01L2924/1438 , H01L2924/15151 , H01L2924/15153 , H01L2924/15172 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099
摘要： Provided is a semiconductor package in which a cell array region and a peripheral circuit region are formed as different semiconductor chips, respectively. First semiconductor chips including memory cells and a second semiconductor chip including only peripheral circuitry common to the first semiconductor chips are electrically connected to each other. Thus, a loading capacitance of the semiconductor package may be reduced. As a result, an RC delay of the semiconductor package may be reduced, thereby improving an operating speed of the semiconductor package.
摘要翻译：提供一种半导体封装，其中单元阵列区域和外围电路区域分别形成为不同的半导体芯片。包括存储单元的第一半导体芯片和仅包括第一半导体芯片公用的外围电路的第二半导体芯片彼此电连接。因此，可以减小半导体封装的负载电容。结果，可以减小半导体封装的RC延迟，从而提高半导体封装的工作速度。

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