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    • 1. 发明专利
    • Composition for cleaning petroleum pollutant and cleaning method using this
    • 用于清洁石油污染物的组合物和使用该清洁方法的清洁方法
    • JP2013249464A
    • 2013-12-12
    • JP2013086788
    • 2013-04-17
    • Min Su Kim民洙 金
    • KIM MIN SU
    • C11D3/386B08B3/08C11D1/75C11D17/08
    • PROBLEM TO BE SOLVED: To provide a composition for cleaning petroleum pollutant to separate and clean oil and sludge as the petroleum pollutant occurring from crude oil tanks or oil refining facilities; and to provide a cleaning method using this.SOLUTION: A cleaning method of a petroleum pollutant comprises: a step of mixing and ripening a cleaning composition by mixing purified water, cheonggukjang powder and a surfactant and ripening the mixture; a pollutant separation step of mixing the cleaning composition mixed and ripened in the step of mixing and ripening the cleaning composition with cleaning circulation water heated at 35-45°C temperature, and charging this into an apparatus where petroleum pollutant remains to be circulated; and after going through the pollutant separation step, an aeration and oxidation step of circulating the cleaning circulation water while raising to 100-110°C temperature, separating combustible gas in the apparatus, and oxidizing harmful gas and pollutants.
    • 要解决的问题:提供清理石油污染物的组合物,用于分离和清洁原油油罐或炼油设施中发生的石油污染物的油污和污泥; 并提供使用这种清洗方法。解决方案:石油污染物的清洗方法包括:通过混合纯化水,cheonggukjang粉末和表面活性剂并熟化混合物来混合和熟化清洁组合物的步骤; 污染物分离步骤,在将清洗组合物与加热到35-45℃温度的清洗循环水混合并熟化的步骤中混合和熟化的清洗组合物混合,并将其装入石油污染物仍然循环的装置中; 经过污染物分离步骤后,将清洗循环水循环至100-110℃的通风和氧化步骤,分离设备中的可燃气体,并对有害气体和污染物进行氧化。
    • 3. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20160285435A1
    • 2016-09-29
    • US15077438
    • 2016-03-22
    • HYUN-CHUL HWANGMIN-SU KIM
    • HYUN-CHUL HWANGMIN-SU KIM
    • H03K3/012H03K3/356
    • H03K3/012H03K3/356191
    • A semiconductor circuit includes a first circuit determining a voltage of a first node in response to the clock signal and the input data signal, a first latch determining a voltage of a second node in response to the clock signal and the voltage of the first node, and a second circuit determining a voltage of a third node in response to the clock signal and the voltage of the second node. The output data signal is provided in response to the voltage of the third node, the clock signal controls a flip-flop operation with respect to the input data signal and the output data signal, and respective voltages are maintained constant at the first node, second node and third node regardless of level transitions in the clock signal so long as a level of the input data signal is maintained constant.
    • 半导体电路包括响应于时钟信号和输入数据信号确定第一节点的电压的第一电路,响应于时钟信号和第一节点的电压确定第二节点的电压的第一锁存器, 以及响应于所述时钟信号和所述第二节点的电压确定第三节点的电压的第二电路。 输出数据信号响应于第三节点的电压被提供,时钟信号控制相对于输入数据信号和输出数据信号的触发器操作,并且各个电压在第一节点保持恒定,第二 节点和第三节点,而不管时钟信号中的电平转换如何,只要输入数据信号的电平保持恒定即可。
    • 4. 发明授权
    • Semiconductor device
    • 半导体器件
    • US09450584B2
    • 2016-09-20
    • US14870351
    • 2015-09-30
    • Min-Su Kim
    • Min-Su Kim
    • H03K19/0175H03K19/0185H03K19/20H03K3/356
    • H03K19/018507H03K3/012H03K3/356H03K3/356173H03K19/0016H03K19/20
    • A semiconductor device includes a first circuit applying an enable signal having a first logic level and a clock signal having the first logic level, supplying a first voltage to a first node and converting a voltage level of the first node into a second logic level different from the first logic level, and a second circuit applying an enable signal having the second logic level and a clock signal having the first logic level, supplying a second voltage to a second node different from the first node and converting a voltage level of the second node into the second logic level. The second circuit includes an operation circuit performing a NAND operation on the logic level of the enable signal and the voltage level of the second node, and a switch turned on in response to an output of the operation circuit and supplying the second voltage to the second node.
    • 半导体器件包括施加具有第一逻辑电平的使能信号和具有第一逻辑电平的时钟信号的第一电路,向第一节点提供第一电压并将第一节点的电压电平转换成不同于第一逻辑电平的第二逻辑电平 第一逻辑电平,以及施加具有第二逻辑电平的使能信号和具有第一逻辑电平的时钟信号的第二电路,向不同于第一节点的第二节点提供第二电压,并且转换第二节点的电压电平 进入第二个逻辑水平。 第二电路包括对使能信号的逻辑电平和第二节点的电压电平执行NAND运算的运算电路,以及响应于运算电路的输出而导通的开关,并将第二电压提供给第二电路 节点。
    • 6. 发明申请
    • SEMICONDUCTOR CIRCUIT AND METHOD OF OPERATING THE CIRCUIT
    • 半导体电路和操作电路的方法
    • US20150207494A1
    • 2015-07-23
    • US14645818
    • 2015-03-12
    • Min-Su KIM
    • Min-Su KIM
    • H03K3/012H03K3/356
    • H03K3/012G01R31/318541H03K3/356104H03K3/356139
    • Provided is a semiconductor circuit which includes a first circuit configured to determine a voltage level of a feedback node based on a voltage level of input data, a voltage level of a latch input node, and a voltage level of a clock signal, a second circuit configured to pre-charge the latch input node based on the voltage level of the clock signal, a third circuit configured to pull down the latch input node based on the voltage level of the feedback node and the voltage level of the clock signal, a latch configured to output output data based on the voltage level of the clock signal and the voltage level of the latch input node, and a control circuit included in at least one of the first to third circuits and the latch and configured to receive the control signal.
    • 提供一种半导体电路,其包括:第一电路,被配置为基于输入数据的电压电平,锁存输入节点的电压电平和时钟信号的电压电平来确定反馈节点的电压电平;第二电路 配置为基于所述时钟信号的电压电平对所述锁存器输入节点进行预充电,第三电路被配置为基于所述反馈节点的电压电平和所述时钟信号的电压电平来下拉所述锁存器输入节点;锁存器 被配置为基于所述时钟信号的电压电平和所述锁存输入节点的电压电平输出输出数据,以及包括在所述第一至第三电路和所述锁存器中的至少一个中的控制电路,并且被配置为接收所述控制信号。
    • 9. 发明申请
    • SEMICONDUCTOR CIRCUIT AND METHOD OF OPERATING THE SAME
    • 半导体电路及其操作方法
    • US20140266364A1
    • 2014-09-18
    • US13844242
    • 2013-03-15
    • Rahul SINGHMin-Su KIM
    • Rahul SINGHMin-Su KIM
    • H03K3/3562
    • H03K3/356121
    • Provided are a semiconductor circuit and a method of operating the same. The semiconductor circuit includes a first pulse generating circuit enabled to a rising edge of a clock signal and configured to generate a first read pulse, a second pulse generating circuit enabled to a rising edge of the clock signal and configured to generate a second read pulse independent of the first read pulse, a dynamic pull-down stage configured to develop a voltage level of a first dynamic node based at least on data values of an input signal and the first and second read pulses, and a dynamic pull-up stage configured to develop a voltage level of a second dynamic node based at least on data values of the input signal and the first and second read pulses.
    • 提供半导体电路及其操作方法。 该半导体电路包括:第一脉冲发生电路,其能够进入时钟信号的上升沿,并被配置为产生第一读取脉冲,第二脉冲发生电路使能到时钟信号的上升沿并被配置为产生独立的第二读取脉冲 所述动态下拉阶段被配置为至少基于输入信号和所述第一和第二读取脉冲的数据值来开发第一动态节点的电压电平;以及动态上拉阶段,被配置为 至少基于输入信号和第一和第二读取脉冲的数据值来开发第二动态节点的电压电平。
    • 10. 发明授权
    • Secondary battery with advanced safety
    • 二次电池安全性高
    • US08795883B2
    • 2014-08-05
    • US11555743
    • 2006-11-02
    • Youngjoon ShinMin Su KimJunill YoonJi Heon RyuJeong Hee ChoiSeung-Jin Yang
    • Youngjoon ShinMin Su KimJunill YoonJi Heon RyuJeong Hee ChoiSeung-Jin Yang
    • H01M2/02H01M2/08
    • H01M2/06H01M2/02H01M2/021H01M2/0275H01M2/0277H01M2/0287H01M2/20H01M2/266H01M2/30H01M10/052
    • Disclosed herein is a secondary battery constructed in a structure in which an electrode assembly having a cathode/separator/anode arrangement is mounted in a battery case made of a laminate sheet including a resin layer and a metal layer, electrode tabs of the electrode assembly are coupled to corresponding electrode leads, and the electrode assembly is sealed in the battery case while electrode leads are exposed to the outside of the battery case, wherein a protective film is attached to coupling regions between the electrode tabs and the electrode leads for sealing the coupling regions between the electrode tabs and the electrode leads. The secondary battery according to the present invention is constructed in a structure in which the coupling regions are sealed by the protective film, unlike a conventional secondary battery constructed in a structure in which the coupling regions between the electrode tabs and the electrode leads are exposed in the battery case. As a result, the electrode leads are protected from external impacts, such as falling of the battery. Consequently, no internal short circuit occurs, and therefore, the safety of the battery is increased.
    • 本文公开了一种二次电池,其结构是将具有阴极/隔板/阳极布置的电极组件安装在由包括树脂层和金属层的层压片制成的电池壳中,电极组件的电极片 耦合到相应的电极引线,并且电极组件被密封在电池壳体中,同时电极引线暴露于电池壳体的外部,其中保护膜附接到电极接线片和电极引线之间的耦合区域,用于密封耦合 电极片和电极引线之间的区域。 根据本发明的二次电池被构造成其中耦合区域被保护膜密封的结构不同于传统的二次电池,其结构是将电极接头和电极引线之间的耦合区域暴露在其中 电池盒。 结果,电极引线被保护免受外部冲击,例如电池的掉落。 因此,不会发生内部短路,因此电池的安全性增加。