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    • 2. 发明授权
    • Methods, devices, and systems relating to a memory cell having a floating body
    • 与具有浮体的存储单元相关的方法,装置和系统
    • US08547739B2
    • 2013-10-01
    • US13403596
    • 2012-02-23
    • Sanh D. TangMike N. Nguyen
    • Sanh D. TangMike N. Nguyen
    • G11C11/34
    • H01L27/10802H01L27/1203H01L29/66833H01L29/7841
    • Methods, devices, and systems are disclosed for a memory cell having a floating body. A memory cell may include a transistor over an insulation layer, the transistor including a source, and a drain. The memory cell may also include a floating body including a first region positioned between the source and the drain, a second region positioned remote from each of the source and drain, and a passage extending through the insulation layer and coupling the first region to the second region. Additionally, the memory cell may include a bias gate at least partially surrounding the second region and configured for operably coupling to a bias voltage. Furthermore, the memory cell may include a plurality of dielectric layers, wherein each outer vertical surface of the second region has a dielectric layer of the plurality adjacent thereto.
    • 公开了具有浮体的存储单元的方法,装置和系统。 存储单元可以包括绝缘层上的晶体管,晶体管包括源极和漏极。 存储单元还可以包括浮动体,其包括位于源极和漏极之间的第一区域,远离源极和漏极中的每一个定位的第二区域,以及延伸穿过绝缘层并且将第一区域耦合到第二区域的第二区域 地区。 另外,存储单元可以包括至少部分地围绕第二区域并被配置为可操作地耦合到偏置电压的偏置栅极。 此外,存储单元可以包括多个电介质层,其中第二区域的每个外部垂直表面具有与其相邻的多个电介质层。
    • 3. 发明授权
    • Devices and systems relating to a memory cell having a floating body
    • 与具有浮体的存储单元有关的装置和系统
    • US08148780B2
    • 2012-04-03
    • US12410207
    • 2009-03-24
    • Sanh D. TangMike N. Nguyen
    • Sanh D. TangMike N. Nguyen
    • H01L27/12
    • H01L27/10802H01L27/1203H01L29/66833H01L29/7841
    • Methods, devices, and systems are disclosed for a memory cell having a floating body. A memory cell may include a transistor over an insulation layer, the transistor including a source, and a drain. The memory cell may also include a floating body including a first region positioned between the source and the drain, a second region positioned remote from each of the source and drain, and a passage extending through the insulation layer and coupling the first region to the second region. Additionally, the memory cell may include a bias gate at least partially surrounding the second region and configured for operably coupling to a bias voltage. Furthermore, the memory cell may include a plurality of dielectric layers, wherein each outer vertical surface of the second region has a dielectric layer of the plurality adjacent thereto.
    • 公开了具有浮体的存储单元的方法,装置和系统。 存储单元可以包括绝缘层上的晶体管,晶体管包括源极和漏极。 存储单元还可以包括浮动体,其包括位于源极和漏极之间的第一区域,远离源极和漏极中的每一个定位的第二区域,以及延伸穿过绝缘层并且将第一区域耦合到第二区域的第二区域 地区。 另外,存储单元可以包括至少部分地围绕第二区域并被配置为可操作地耦合到偏置电压的偏置栅极。 此外,存储单元可以包括多个电介质层,其中第二区域的每个外部垂直表面具有与其相邻的多个电介质层。
    • 4. 发明申请
    • METHODS, DEVICES, AND SYSTEMS RELATING TO A MEMORY CELL HAVING A FLOATING BODY
    • 与具有浮动体的记忆体相关的方法,装置和系统
    • US20120147681A1
    • 2012-06-14
    • US13403596
    • 2012-02-23
    • Sanh D. TangMike N. Nguyen
    • Sanh D. TangMike N. Nguyen
    • G11C7/00H01L21/336
    • H01L27/10802H01L27/1203H01L29/66833H01L29/7841
    • Methods, devices, and systems are disclosed for a memory cell having a floating body. A memory cell may include a transistor over an insulation layer, the transistor including a source, and a drain. The memory cell may also include a floating body including a first region positioned between the source and the drain, a second region positioned remote from each of the source and drain, and a passage extending through the insulation layer and coupling the first region to the second region. Additionally, the memory cell may include a bias gate at least partially surrounding the second region and configured for operably coupling to a bias voltage. Furthermore, the memory cell may include a plurality of dielectric layers, wherein each outer vertical surface of the second region has a dielectric layer of the plurality adjacent thereto.
    • 公开了具有浮体的存储单元的方法,装置和系统。 存储单元可以包括绝缘层上的晶体管,晶体管包括源极和漏极。 存储单元还可以包括浮动体,其包括位于源极和漏极之间的第一区域,远离源极和漏极中的每一个定位的第二区域,以及延伸穿过绝缘层并且将第一区域耦合到第二区域的第二区域 地区。 另外,存储单元可以包括至少部分地围绕第二区域并被配置为可操作地耦合到偏置电压的偏置栅极。 此外,存储单元可以包括多个电介质层,其中第二区域的每个外部垂直表面具有与其相邻的多个电介质层。
    • 5. 发明申请
    • METHODS, DEVICES, AND SYSTEMS RELATING TO A MEMORY CELL HAVING A FLOATING BODY
    • 与具有浮动体的记忆体相关的方法,装置和系统
    • US20100246285A1
    • 2010-09-30
    • US12410207
    • 2009-03-24
    • Sanh D. TangMike N. Nguyen
    • Sanh D. TangMike N. Nguyen
    • G11C7/00H01L27/12H01L21/84
    • H01L27/10802H01L27/1203H01L29/66833H01L29/7841
    • Methods, devices, and systems are disclosed for a memory cell having a floating body. A memory cell may include a transistor over an insulation layer and including a source, and a drain. The memory cell may also include a floating body including a first region positioned between the source and the drain, a second region positioned remote from each of the source and drain, and a passage and extending through the insulation layer and coupling the first region to the second region. Additionally, the memory cell includes a bias gate at least partially surrounding the second region and configured for operably coupling to a bias voltage. Furthermore, the memory cell may include a plurality of dielectric layers, wherein each outer vertical surface of the second region has a dielectric layer of the plurality adjacent thereto.
    • 公开了具有浮体的存储单元的方法,装置和系统。 存储单元可以包括绝缘层上的晶体管,并且包括源极和漏极。 存储单元还可以包括浮动体,其包括位于源极和漏极之间的第一区域,远离源极和漏极中的每一个定位的第二区域,以及通过并延伸穿过绝缘层的第二区域,并将第一区域耦合到 第二区。 另外,存储器单元包括偏置栅极,至少部分地围绕第二区域并被配置为可操作地耦合到偏置电压。 此外,存储单元可以包括多个电介质层,其中第二区域的每个外部垂直表面具有与其相邻的多个电介质层。