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1. 发明授权

US08064239B2 Memory circuit with quantum well-type carrier storage 失效
标题翻译：具有量子阱型存储器的存储电路
公开(公告)号：US08064239B2
公开(公告)日：2011-11-22
申请号：US12617352
申请日：2009-11-12
申请人： Mehmet Günhan Ertosun , Krishna Chandra Saraswat , Pawan Kapur
发明人： Mehmet Günhan Ertosun , Krishna Chandra Saraswat , Pawan Kapur
IPC分类号： G11C17/00
CPC分类号： G11C11/404 , B82Y10/00 , G11C2211/4016 , H01L27/108 , H01L27/10802 , H01L29/7841
摘要： Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.
摘要翻译：数据存储在具有双门控制的量子阱型结构中。根据示例实施例，基于晶体管的数据存储电路包括栅极，背栅极和栅极与后栅极之间的半导体沟道。响应于施加到门和后门的偏压，载体存储在通道中的存储袋结构中。感测通过通道的电流，并用于检测存储的载波，并相应地检测存储电路的存储状态。

2. 发明授权

US08659931B1 Erase and soft program within the erase operation for a high speed resistive switching memory operation with controlled erased states 失效
标题翻译：在具有受控擦除状态的高速电阻式开关存储器操作的擦除操作中擦除和软编程
公开(公告)号：US08659931B1
公开(公告)日：2014-02-25
申请号：US13488392
申请日：2012-06-04
申请人： Mehmet Günhan Ertosun
发明人： Mehmet Günhan Ertosun
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C11/5628 , G11C13/0007 , G11C13/0011 , G11C13/0097
摘要： Structures and methods of operating a programmable impedance element are disclosed herein. In one embodiment, a method of operating a programmable impedance element can include: (i) determining an operation to be performed on the programmable impedance element, where the programmable impedance element includes a solid electrolyte between an active electrode and an inert electrode; (ii) in response to the determined operation being a program operation, programming the programmable impedance element by completing formation of a conductive path from a partial conductive path between the active and inert electrodes; and (iii) in response to the determined operation being an erase operation, erasing the programmable impedance element by substantially dissolving the conductive path, and then by forming the partial conductive path.
摘要翻译：本文公开了操作可编程阻抗元件的结构和方法。在一个实施例中，操作可编程阻抗元件的方法可以包括：（i）确定要在可编程阻抗元件上执行的操作，其中可编程阻抗元件包括有源电极和惰性电极之间的固体电解质; （ii）响应于所确定的操作是编程操作，通过从有源和惰性电极之间的部分导电路径完成形成导电路径来编程可编程阻抗元件; 和（iii）响应于确定的操作是擦除操作，通过基本上溶解导电路径，然后通过形成部分导电路径来擦除可编程阻抗元件。

3. 发明申请

US20100149864A1 MEMORY CIRCUIT WITH QUANTUM WELL-TYPE CARRIER STORAGE 失效
标题翻译：具有量子式存储器的存储器电路存储器
公开(公告)号：US20100149864A1
公开(公告)日：2010-06-17
申请号：US12617352
申请日：2009-11-12
申请人： Mehmet Günhan Ertosun , Krishna Chandra Saraswat , Pawan Kapur
发明人： Mehmet Günhan Ertosun , Krishna Chandra Saraswat , Pawan Kapur
IPC分类号： G11C11/34 , H01L29/78 , G11C7/00
CPC分类号： G11C11/404 , B82Y10/00 , G11C2211/4016 , H01L27/108 , H01L27/10802 , H01L29/7841
摘要： Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.
摘要翻译：数据存储在具有双门控制的量子阱型结构中。根据示例实施例，基于晶体管的数据存储电路包括栅极，背栅极和栅极与后栅极之间的半导体沟道。响应于施加到门和后门的偏压，载体存储在通道中的存储袋结构中。感测通过通道的电流，并用于检测存储的载波，并相应地检测存储电路的存储状态。

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