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    • 1. 发明申请
    • System And Method of Digitally Testing An Analog Driver Circuit
    • 数字测试模拟驱动电路的系统和方法
    • US20090027075A1
    • 2009-01-29
    • US12189226
    • 2008-08-11
    • Joseph O. MarshJeremy StephensCharlie C. HwangJames S. MasonHuihao XuMatthew B. BaecherThomas J. BardsleyMark R. Taylor
    • Joseph O. MarshJeremy StephensCharlie C. HwangJames S. MasonHuihao XuMatthew B. BaecherThomas J. BardsleyMark R. Taylor
    • G01R31/28
    • G01R31/3167G01R31/318544
    • A circuit and method of testing an analog driver circuit using digital scan-based test methodologies. The circuit of the present invention comprises a control circuit for generating signals in response to a test enable signal, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal in response to the differential input signal and the signals generated by the control circuit, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit in response the signals generated by the control circuit, and a differential receiver circuit for receiving the differential output from the differential driver circuit, convert the differential output signal to a single ended signal and transmitting the single ended signal, all in response to the test enable signal. The method of the present invention comprises digitally testing the differential driver circuit by activating a test enable signal, skewing the differential output termination impedance in response to the test enable signal, adjusting a voltage offset of the differential receiver circuit in response to the test enable signal, selecting a power level for the differential driver circuit in response to the test enable signal, enabling a decoder in response to the test enable signal, wherein the decoder activates only one segment of the differential driver circuit during any one test sequence, activating one of the segments for testing, stimulating the differential driver circuit with digital test patterns, receiving an output of the differential driver circuit by the differential receiver circuit, converting the received differential driver output to a single-ended signal, observing the single-ended signal; and deactivating the test enable signal.
    • 使用基于数字扫描的测试方法测试模拟驱动器电路的电路和方法。 本发明的电路包括用于响应于测试使能信号产生信号的控制电路,用于接收差分输入信号的差分驱动器电路,放大差分输入信号并响应差分输入信号发送差分输出信号 以及由所述控制电路产生的信号,用于响应于由所述控制电路产生的信号而在所述差分驱动器电路的输出节点处产生差分终端阻抗的可编程终端阻抗电路以及用于从所述差分接收电路接收所述差分输出的差分接收电路 差分驱动器电路将差分输出信号转换为单端信号并传输单端信号,全部是响应于测试使能信号。 本发明的方法包括通过激活测试使能信号来数字测试差分驱动器电路,响应于测试使能信号偏移差动输出终​​端阻抗,响应于测试使能信号调整差分接收器电路的电压偏移 ,响应于所述测试使能信号选择所述差分驱动器电路的功率电平,使能够响应于所述测试使能信号的解码器,其中所述解码器在任何一个测试序列期间仅激活所述差分驱动器电路的一个部分, 用于测试的段,用数字测试图案刺激差分驱动器电路,通过差分接收器电路接收差分驱动器电路的输出,将接收到的差分驱动器输出转换为单端信号,观察单端信号; 并禁用测试使能信号。
    • 2. 发明授权
    • System and method of digitally testing an analog driver circuit
    • 数字测试模拟驱动电路的系统和方法
    • US07659740B2
    • 2010-02-09
    • US12189226
    • 2008-08-11
    • Joseph O. MarshJeremy StephensCharlie C. HwangJames S. MasonHuihao XuMatthew B. BaecherThomas J. BardsleyMark R. Taylor
    • Joseph O. MarshJeremy StephensCharlie C. HwangJames S. MasonHuihao XuMatthew B. BaecherThomas J. BardsleyMark R. Taylor
    • G01R31/02G01R31/26
    • G01R31/3167G01R31/318544
    • Digital testing of an analog driver circuit is enabled using a circuit including a control circuit for generating signals, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit, and a differential receiver circuit for converting the differential output signal to a single ended signal and transmitting the single ended signal. The testing includes skewing a differential output termination impedance, adjusting a differential receiver circuit voltage offset, selecting a differential driver circuit power level, enabling a decoder which activates only one differential driver circuit segment per test sequence, activating a segment, stimulating the differential driver circuit with digital test patterns, receiving differential driver circuit output, converting the output to a single-ended signal, and observing the single-ended signal.
    • 使用包括用于产生信号的控制电路的电路,用于接收差分输入信号的差分驱动器电路,放大差分输入信号和发送差分输出信号来实现模拟驱动器电路的数字测试,用于产生可编程终端阻抗电路 在差分驱动电路的输出节点处的差分终端阻抗,以及用于将差分输出信号转换为单端信号并发送单端信号的差分接收电路。 测试包括偏移差分输出终端阻抗,调整差分接收器电路电压偏移,选择差分驱动器电路功率电平,使得能够在每个测试序列仅激活一个差分驱动器电路段的解码器,激活段,激励差分驱动器电路 具有数字测试模式,接收差分驱动电路输出,将输出转换为单端信号,并观察单端信号。
    • 4. 发明授权
    • Low power digital adaptive termination network
    • 低功率数字自适应终端网络
    • US07142007B2
    • 2006-11-28
    • US10960142
    • 2004-10-07
    • Matthew B. BaecherJames Stephen Mason
    • Matthew B. BaecherJames Stephen Mason
    • H03K17/16
    • H04L25/0278
    • An apparatus, method, microprocessor device and computer program for configuring a termination network of a communication device includes a voltage comparator for comparing a voltage across the termination network with a reference voltage; a logic arrangement for setting a digital control vector in response to a state returned by said voltage comparator; and a first switching apparatus for activating a first weighted-value resistor in response to the setting of the digital control vector. At least a second switching apparatus for activating a second weighted-value resistor, and wherein each of the first and the second weighted-value resistors is represented by a value in the digital control vector may be provided, the first and second resistors are connected in series or in parallel. The digital control vector may be stored in a logic register and distributed to a plurality of termination networks. The logic arrangement may include a finite state machine.
    • 一种用于配置通信设备的终端网络的装置,方法,微处理器设备和计算机程序包括用于将终端网络两端的电压与参考电压进行比较的电压比较器; 用于响应于由所述电压比较器返回的状态设置数字控制向量的逻辑装置; 以及第一开关装置,用于响应于数字控制矢量的设置来激活第一加权值电阻器。 用于激活第二加权值电阻器的至少一个第二开关装置,并且其中第一和第二加权值电阻器中的每一个由数字控制矢量中的值表示,第一和第二电阻器连接在 系列或并行。 数字控制向量可以存储在逻辑寄存器中并且分布到多个终端网络。 逻辑布置可以包括有限状态机。