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1. 发明申请

US20100253795A1 IMAGE PROCESSING DEVICE 有权
标题翻译：图像处理装置
公开(公告)号：US20100253795A1
公开(公告)日：2010-10-07
申请号：US12750222
申请日：2010-03-30
申请人： Masashi YAMAWAKI
发明人： Masashi YAMAWAKI
IPC分类号： H04N5/225
CPC分类号： H04N5/232 , H04N9/045
摘要： When a still picture is picked up by a digital camera, the still picture is divided into a plurality of areas and is processed for each area. After the process of one divided area is completed, then the process of a motion picture obtained from an imaging device. After the process of the motion picture is completed, another divided area of the still picture is processed again. Such switching between a motion picture process and a still picture process is performed until the process of the entire still picture is completed. Thus, after a still picture is picked up by a digital camera, a motion picture can be promptly displayed and a live image picked up by the camera can be displayed on a back LCD screen.
摘要翻译：当由数码相机拾取静止图像时，静止图像被划分为多个区域，并且针对每个区域进行处理。在一个分割区域的处理完成之后，然后从成像装置获得的运动图像的处理。在完成运动图像的处理之后，再次处理静止图像的另一分割区域。执行运动图像处理和静止图像处理之间的这种切换，直到整个静止图像的处理完成。因此，在通过数码相机拾取静止图像之后，可以迅速地显示动态图像，并且可以在背面LCD屏幕上显示由相机拍摄的实况图像。

2. 发明授权

US06715123B2 Real-time recording system and real-time recording method 失效
标题翻译：实时录像系统及实时录像方式
公开(公告)号：US06715123B2
公开(公告)日：2004-03-30
申请号：US09873369
申请日：2001-06-05
申请人： Yoshitaka Kitamura , Masashi Yamawaki
发明人： Yoshitaka Kitamura , Masashi Yamawaki
IPC分类号： G11C2900
CPC分类号： G11B20/18 , G11B20/10 , G11B2020/10944
摘要： A real-time recording system that decreases the load applied to a central processing unit, which controls recording. The recording system includes a memory for storing input data. An error correction circuit is connected to the memory for generating write data from the input data and storing the generated write data in the memory. A formatter circuit is connected to the memory and the error correction circuit for reading the write data stored in the memory and writing the read write data to the recording medium in real-time. The error correction and formatter circuits are controlled for the generation of the write data with the error correction circuit and the writing operation with the formatter circuit by a plurality of control signals. The control signals are transferred between the error correction circuit and the formatter circuit.
摘要翻译：实时记录系统，减少施加到控制记录的中央处理单元的负载。记录系统包括用于存储输入数据的存储器。误差校正电路连接到存储器，用于从输入数据生成写入数据，并将生成的写入数据存储在存储器中。格式器电路连接到存储器和误差校正电路，用于读取存储在存储器中的写数据，并将读写数据实时写入记录介质。通过多个控制信号，通过误差校正电路和格式器电路的写入操作来控制纠错和格式化电路的产生。控制信号在纠错电路和格式器电路之间传输。

3. 发明授权

US07149171B2 Apparatus for writing data and method for generating DVD format data 有权
公开(公告)号：US07149171B2
公开(公告)日：2006-12-12
申请号：US10263200
申请日：2002-10-03
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： G11B7/0045 , G11B5/09
CPC分类号： G11B20/1217 , G11B2020/1222 , G11B2020/1232 , G11B2020/1277 , G11B2020/1288 , G11B2220/215 , G11B2220/216 , G11B2220/2537 , G11B2220/2562
摘要： An apparatus for writing block data, which includes a plurality of sectors, to a recording medium. The apparatus includes a controller for generating the block data and writing the block data to the recording medium. The controller performs a padding process on final block data when the final block data is written to the recording medium. The controller includes a padding processing unit for generating padding process data. The generation of the padding process data with the controller reduces the load of a processing unit that controls the controller.

4. 发明授权

US08416313B2 Image processing device for inputting both still picture data and motion picture data and performing a data process 有权
标题翻译：用于输入静止图像数据和运动图像数据并执行数据处理的图像处理装置
公开(公告)号：US08416313B2
公开(公告)日：2013-04-09
申请号：US12750222
申请日：2010-03-30
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： H04N5/228 , H04N5/225
CPC分类号： H04N5/232 , H04N9/045
摘要： When a still picture is picked up by a digital camera, the still picture is divided into a plurality of areas and is processed for each area. After the process of one divided area is completed, then the process of a motion picture obtained from an imaging device. After the process of the motion picture is completed, another divided area of the still picture is processed again. Such switching between a motion picture process and a still picture process is performed until the process of the entire still picture is completed. Thus, after a still picture is picked up by a digital camera, a motion picture can be promptly displayed and a live image picked up by the camera can be displayed on a back LCD screen.
摘要翻译：当由数码相机拾取静止图像时，静止图像被划分为多个区域，并且针对每个区域进行处理。在一个分割区域的处理完成之后，然后从成像装置获得的运动图像的处理。在完成运动图像的处理之后，再次处理静止图像的另一分割区域。执行运动图像处理和静止图像处理之间的这种切换，直到整个静止图像的处理完成。因此，在通过数码相机拾取静止图像之后，可以迅速地显示动态图像，并且可以在背面LCD屏幕上显示由相机拍摄的实况图像。

5. 发明授权

US07848194B2 Device and method for writing data 失效
标题翻译：用于写入数据的设备和方法
公开(公告)号：US07848194B2
公开(公告)日：2010-12-07
申请号：US11882256
申请日：2007-07-31
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： G11B7/00
CPC分类号： G11B20/1426 , G11B7/006 , G11B2020/1287 , G11B2020/1457 , G11B2220/216 , G11B2220/2562
摘要： A data writing device for preventing a phase-change optical disc from deteriorating due to repeated writing and for preventing the rewritable number of times of the disc from decreasing. The device writes data including synchronization frames to the disc. Each synchronization frame includes a primary or secondary synchronization signal. A comparator compares a first accumulated DSV for specifying the data including the primary synchronization signal for the synchronization frame with a second accumulated DSV for specifying the recording data including the secondary synchronization signal for the synchronization frame and generates a first selection signal based on the comparison. An inverter randomly inverts the first selection signal to generate a second selection signal. A selection circuit receives the primary and secondary synchronization signals and outputs the primary or secondary synchronization signal in response to the second selection signal.
摘要翻译：一种数据写入装置，用于防止相变光盘由于重复写入而恶化，并且防止盘的可重写次数减少。设备将包括同步帧的数据写入光盘。每个同步帧包括主或次同步信号。比较器将用于指定包括用于同步帧的主同步信号的数据的第一累积DSV与用于指定包括用于同步帧的次同步信号的记录数据的第二累积DSV进行比较，并且基于该比较生成第一选择信号。逆变器随机地反转第一选择信号以产生第二选择信号。选择电路接收主同步信号和次同步信号，并响应于第二选择信号输出主或次同步信号。

6. 发明申请

US20050168259A1 Delay circuit and control method of the delay circuit 有权
标题翻译：延迟电路的延迟电路和控制方法
公开(公告)号：US20050168259A1
公开(公告)日：2005-08-04
申请号：US11073603
申请日：2005-03-08
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： H03H11/26 , H03K5/00 , H03K5/13 , H03K5/15
CPC分类号： H03K5/1506 , H03K5/133 , H03K2005/00058 , H03K2005/00156
摘要： A delay circuit is constructed by connecting taps TAP0-n for providing with a unit delay time (τ) in series on multiple stages. Each tap has the same configuration and an objective signal is inputted to a signal input terminal IN1. The output terminal of a preceding stage tap is connected to a between-stages connecting terminal IN2. An output terminal O is connected to the between-stages connecting terminal of a next stage tap. The signal input terminal and the between-stages connecting terminal are connected to one input terminal of NAND gates 1, 2 and a tap selection signal is inputted to the other input terminal. The output terminal is connected to a NAND gate 3. One of the NAND gates 1, 2 functions as a logical inversion gate corresponding to a tap selection signal so as to enable propagation of the signal. At this time, in the other NAND gate, the output signal is fixed to high level and the NAND gate 3 also functions as a logical inversion gate. The objective signal is propagated by the NAND gates 1, 3 and the preceding stage signal is propagated by the NAND gates 2, 3. By constructing the NAND gates 1, 2 with the same structure, the unit delay time (τ) can be matched accurately.
摘要翻译：通过连接抽头TAP 0 -n来构造延迟电路，以在多级上串联提供单位延迟时间（τ）。每个抽头具有相同的配置，并且目标信号被输入到信号输入端子IN 1。前级分接头的输出端子连接到级间连接端子IN 2。输出端子O连接到下一级抽头的级间连接端子。信号输入端子和级间连接端子连接到NAND门1,2的一个输入端子，并且抽头选择信号被输入到另一个输入端子。输出端子连接到NAND门3。 NAND门1,2中的一个用作对应于抽头选择信号的逻辑反转门，以便能够传播信号。此时，在其他NAND门中，输出信号固定为高电平，NAND门3也起到逻辑反转门的作用。目标信号由NAND门1,3传播，前级信号由NAND门2,3传播。通过构造具有相同结构的NAND门1,2，可以准确地匹配单位延迟时间（τ）。

7. 发明授权

US5987630A Method of descrambling scrambled data using a scramble pattern and scramble pattern generator 失效
标题翻译：使用加扰模式和加扰模式发生器对加扰数据进行解扰的方法
公开(公告)号：US5987630A
公开(公告)日：1999-11-16
申请号：US874673
申请日：1997-06-13
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： G06F3/06 , G06F11/10 , G11B20/10 , G11B20/12 , H04L25/03 , H03M7/00 , G11B20/14
CPC分类号： H04L25/03866 , G11B20/10 , G11B20/12
摘要： A descrambling method is suitable for improving the data transfer rate and fast data processing separate scrambled data into a plurality of data groups each including plural pieces of scrambled unit data. Initial scramble patterns are respectively assigned to the data groups. An initial scramble pattern is prepared and assigned to a specific data group. A first scramble pattern is generated in one clock cycle using the prepared initial scramble pattern and then one of the scrambled unit data pieces in the specific data group is prepared. A descrambling operation using the first scramble pattern and the prepared one scrambled unit data piece is then performed to produce an original data piece.
摘要翻译：一种解扰方法适用于将数据传输速率和快速数据处理分离为多个数据组，每个数据组包括多个加扰单元数据。初始加密模式分别分配给数据组。准备初始加扰模式并将其分配给特定数据组。使用准备的初始加扰模式在一个时钟周期中产生第一加扰模式，然后准备特定数据组中的加扰单元数据之一。然后执行使用第一加扰模式和准备的一个加扰单元数据段的解扰操作，以产生原始数据段。

8. 发明授权

US5661708A Apparatus and method for detecting a sync pattern and an address mark within data provided from a recording medium 失效
标题翻译：用于检测从记录介质提供的数据内的同步模式和地址标记的装置和方法
公开(公告)号：US5661708A
公开(公告)日：1997-08-26
申请号：US615390
申请日：1996-03-14
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： G11B11/10 , G11B11/105 , G11B20/10 , G11B20/14 , G11B27/30 , G11B7/00
CPC分类号： G11B27/3027 , G11B20/1403 , G11B20/10009
摘要： A disk apparatus for reproducing pulse width modulation (PWM) data from a disk is disclosed. A first sync pattern detector compares data DTLE with a first sync pattern. A second sync pattern detector compares data DTTE with a second sync pattern. A first signal generator stops the detecting operation of the first detector when the first detector has detected the first sync pattern from the data DTLE. A second signal generator stops the detecting operation of the second detector when the second detector has detected the second sync pattern from the data DTTE. A first time check circuit restarts the detecting operation of the first detector when the first sync pattern has been detected first and the second sync pattern is not detected within a predetermined period of time. A second time check circuit restarts the detecting operation of the second detector when the second sync pattern has been detected first and the first sync pattern is not detected within a predetermined period of time.
摘要翻译：公开了一种用于从盘再现脉冲宽度调制（PWM）数据的盘装置。第一同步码型检测器将数据DTLE与第一同步码型进行比较。第二同步码型检测器将数据DTTE与第二同步码型进行比较。当第一检测器从数据DTLE检测到第一同步模式时，第一信号发生器停止第一检测器的检测操作。当第二检测器从数据DTTE检测到第二同步模式时，第二信号发生器停止第二检测器的检测操作。当首先检测到第一同步图案并且在预定时间段内没有检测到第二同步图案时，第一次检查电路重新启动第一检测器的检测操作。当首先检测到第二同步图案并且在预定时间段内没有检测到第一同步图形时，第二次检查电路重新启动第二检测器的检测操作。

9. 发明授权

US07292668B2 Data processor and data processing method 失效
标题翻译：数据处理器和数据处理方法
公开(公告)号：US07292668B2
公开(公告)日：2007-11-06
申请号：US09841077
申请日：2001-04-25
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： H04L7/06
CPC分类号： G11B20/1403 , G11B2220/213 , G11B2220/2562
摘要： In a data processor, a pickup head reads the data from a memory medium. Such data transferred in a plurality of parallel bits in synchronization with the clock signal to a controller unit from a read channel unit. The controller unit detects the predetermined mark for detecting synchronization included in the data in order to establish the synchronization of a series of data to be received from the read channel unit in order to demodulate the data other than the predetermined mark for detecting synchronization. The mark detecting unit in the controller unit detects the predetermined mark for detecting synchronization from the parallel data received with the shift register.
摘要翻译：在数据处理器中，拾取头从存储介质读取数据。这种数据以与时钟信号同步的多个并行位传送到来自读通道单元的控制器单元。控制器单元检测用于检测包括在数据中的同步的预定标记，以便建立要从读取通道单元接收的一系列数据的同步，以便解调用于检测同步的预定标记之外的数据。控制器单元中的标记检测单元从与移位寄存器接收的并行数据中检测用于检测同步的预定标记。

10. 发明申请

US20060187785A1 Method and apparatus for demodulating WAP of optical disc 审中-公开
标题翻译：用于解调光盘的WAP的方法和装置
公开(公告)号：US20060187785A1
公开(公告)日：2006-08-24
申请号：US11223954
申请日：2005-09-13
申请人： Masashi Yamawaki
发明人： Masashi Yamawaki
IPC分类号： G11B5/09
CPC分类号： G11B7/0053 , G11B2220/2537
摘要： A method for demodulating a WAP of an optical disc that ensures the read rate of address information while improving the reading accuracy. The method includes detecting in full bits a head invert phase wobble of each wobble data unit in an address field, and correcting generation timing of a demodulation signal based on the detection result so that the head invert phase wobble is properly detected.
摘要翻译：一种用于解调光盘的WAP的方法，其确保地址信息的读取速率同时提高读取精度。该方法包括全部检测地址字段中的每个摆动数据单元的头反相相位抖动，并且基于检测结果校正解调信号的生成定时，从而适当地检测头反转相位摆动。

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