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1. 发明授权

US07227223B2 Power MOS transistor having trench gate 失效
标题翻译：功率MOS晶体管具有沟槽栅极
公开(公告)号：US07227223B2
公开(公告)日：2007-06-05
申请号：US10618624
申请日：2003-07-15
申请人： Noboru Matsuda , Hitoshi Kobayashi , Masaru Kawakatsu , Akihiko Osawa
发明人： Noboru Matsuda , Hitoshi Kobayashi , Masaru Kawakatsu , Akihiko Osawa
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/7813 , H01L29/41766 , H01L29/4232 , H01L29/4238 , H01L29/456 , H01L29/7802
摘要： A semiconductor device, and particularly an MOS transistor device, wherein in order to increase a channel region density and to achieve a low resistance of a transistor device there is provided a first gate electrode group having a plurality of gate electrodes formed on a semiconductor substrate to be away from each other at first equal spacings, a second gate electrode group having a plurality of gate electrodes formed on the semiconductor substrate to be away from each other at the first equal spacings, a source contact portion formed away from the first or the second gate electrode group at a second spacing, and source regions for electrically interconnecting the first gate electrode group and the source contact. The source regions are connected to each other at one end of the first gate electrode group, and separated at the other end of the first gate electrode group. In addition, the gate electrodes of the first group are connected each other at the other end. The second spacing is greater than the first spacing.
摘要翻译：一种半导体器件，特别是MOS晶体管器件，其中为了增加沟道区密度并实现晶体管器件的低电阻，提供了一种第一栅极电极组，其具有形成在半导体衬底上的多个栅极电极在第一等间隔处彼此远离的第二栅极电极组，具有形成在半导体衬底上的多个栅电极以彼此间隔开的第一等间距彼此远离的第二栅电极组;远离第一或第二第二间隔的栅极电极组和用于将第一栅极电极组和源极接触电互连的源极区域。源极区域在第一栅电极组的一端彼此连接，并在第一栅电极组的另一端分离。此外，第一组的栅电极在另一端彼此连接。第二个间距大于第一个间距。

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