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    • 2. 发明申请
    • Selecting circuit
    • 选择电路
    • US20080074167A1
    • 2008-03-27
    • US11902472
    • 2007-09-21
    • Masao Iriguchi
    • Masao Iriguchi
    • H03K17/00
    • H03K17/005H03F1/32H03F1/3211H03F3/45475H03F2203/45136H03F2203/45166H03F2203/45171H03F2203/45226H03F2203/45528H03F2203/45534H03F2203/45616H03F2203/45726H03K17/14H04J3/047
    • A selecting circuit having minimal signal distortion caused by non-linearity of semiconductor switching elements includes a plurality of circuit groups each comprising an input terminal (INa); serially connected resistors (R1a, R2a) having a first end connected to the input terminal; a semiconductor switching element (SW1a) having a first end connected to a node between the resistors; and semiconductor switching elements (SW2a, SW3a) having first ends connected to a second end of the resistors (R1a, R2a). The circuit further includes an operational amplifier (OP) having an inverting input terminal to which second ends of semiconductor switching elements (SW1a, SW1b, . . . , SW1n) in respective ones of the circuit groups are connected in common, and an output terminal to which second ends of semiconductor switching elements (SW2a, Sb 2b, . . . , SW2n) in respective ones of the circuit groups are connected in common; and an output terminal (OUT) to which second ends of semiconductor switching elements (SW3a, SW3b, . . . , SW3n) in respective ones of the circuit groups are connected in common.
    • 具有由半导体开关元件的非线性引起的信号失真最小的选择电路包括多个电路组,每个电路组包括输入端(INa); 串联连接的电阻器(R 1 a,R 2 a),其第一端连接到输入端子; 半导体开关元件(SW1a),其第一端连接到所述电阻器之间的节点; 以及具有连接到电阻器(R 1a,R 2a)的第二端的第一端的半导体开关元件(SW2a,SW3a)。 电路还包括具有反相输入端的运算放大器(OP),各个电路组中的半导体开关元件(SW 1 a,SW 1 b,...,SW 1 n)的第二端连接到该反相输入端 公共端子和各个电路组中的半导体开关元件(SW2a,Sb2b,...,SW2n)的第二端共同连接的输出端子; 以及各个电路组中的半导体开关元件(SW3a,SW3b,...,SW3n)的第二端共同连接的输出端子(OUT)。
    • 4. 发明申请
    • Offset cancellation amplifier, display employing the offset cancellation amplifier and method for controlling the offset cancellation amplifier
    • 偏移消除放大器,使用偏移消除放大器的显示器以及用于控制偏移消除放大器的方法
    • US20070200620A1
    • 2007-08-30
    • US11709409
    • 2007-02-22
    • Masao Iriguchi
    • Masao Iriguchi
    • H03F1/02
    • H03F3/45183H03F3/45753H03F3/45762H03F2200/453H03F2203/45212H03F2203/45588H03F2203/45616H03F2203/45652H03F2203/45681H03F2203/45726
    • Disclosed is an offset cancellation amplifier which includes a first differential pair, second differential pair, a common load circuit for the two differential pairs, current sources, an amplifier stage, and first and second capacitors. The first capacitor is connected to the gate of one transistor of the first differential pair. During a first period of a data output period, an output voltage and the reference voltage are supplied to the gates of the first differential pair, the second capacitor is disconnected from the gate of the other transistor of the first differential pair. In this state, the output voltage is accumulated in the first and second capacitors. An input voltage is supplied in common to the gates of the second differential pair During the second period, the second capacitor is disconnected from the first capacitor and connected to the gate of the other transistor of the first differential pair. The output voltage is accumulated in the first capacitor, while the reference voltage is accumulated in the second capacitor. During the third period, the gates of the first differential pair cease to be supplied with the output voltage and with the reference voltage, respectively, and are supplied with the voltages accumulated in the first and second capacitors, respectively. The gates of the second differential pair are supplied with the output voltage and with the input voltage, respectively.
    • 公开了一种偏移消除放大器,其包括第一差分对,第二差分对,用于两个差分对的公共负载电路,电流源,放大器级以及第一和第二电容器。 第一电容器连接到第一差分对的一个晶体管的栅极。 在数据输出期间的第一期间,输出电压和参考电压被提供给第一差分对的栅极,第二电容器与第一差分对的另一晶体管的栅极断开。 在这种状态下,输出电压累积在第一和第二电容器中。 输入电压共同提供给第二差分对的栅极在第二周期期间,第二电容器与第一电容器断开并连接到第一差分对的另一个晶体管的栅极。 输出电压累积在第一电容器中,而参考电压累积在第二电容器中。 在第三时段期间,第一差分对的门分别停止提供输出电压和参考电压,分别提供积累在第一和第二电容器中的电压。 第二差分对的栅极分别被提供有输出电压和输入电压。
    • 5. 发明申请
    • Differential amplifier and digital-to-analog converter
    • 差分放大器和数模转换器
    • US20070176675A1
    • 2007-08-02
    • US11657208
    • 2007-01-24
    • Hiroshi TsuchiMasao Iriguchi
    • Hiroshi TsuchiMasao Iriguchi
    • H03F1/02
    • H03F3/45183H03F1/26H03F2200/372H03F2203/45548H03F2203/45616H03M1/765
    • A differential amplifier comprises first, second, and third input terminals (1, 2, and 3), output terminal (4), first and second differential pairs (531 and 532) (533 and 534) driven by a corresponding current source and having output pairs commonly connected to load circuits (537 and 538), and an amplifier stage (539) having input end connected to at least one of the common connection points of the load circuits and output pairs of the first and second differential pairs and output end connected to output terminal. Input pair of second differential pair receives a signal from third input terminal and a feedback signal from output terminal. First and second switches (SW1 and SW2) are provided between the input pair of the first differential pair and the first and second input terminals (1 and 2), and first and second capacitors (C1 and C2) connected between each connection point of the input pair of the first differential pair and the first and second switches (SW1 and SW2) and a reference voltage terminal are provided. The first, second and third input terminals (1, 2, and 3) may be combined into one terminal to which voltages are serially supplied. It avoids the influence of power supply/signal noise and switch noise, and provides operational output from a plurality of input reference voltages.
    • 差分放大器包括由相应的电流源驱动的第一,第二和第三输入端子(1,2和3),输出端子(4),第一和第二差分对(531和532)(533和534) 通常连接到负载电路(537和538)的输出对以及具有连接到负载电路的公共连接点和第一和第二差分对的输出对中的至少一个的输入端的放大器级(539)和输出端 连接到输出端子。 第二差分对的输入对接收来自第三输入端的信号和来自输出端的反馈信号。 第一和第二开关(SW 1和SW 2)设置在第一差分对的输入对与第一和第二输入端(1和2)之间,第一和第二电容器(C 1和C 2) 提供第一差分对和第一和第二开关(SW 1和SW 2)的输入对和参考电压端子的连接点。 第一,第二和第三输入端子(1,2和3)可以组合成串联供应电压的一个端子。 它避免了电源/信号噪声和开关噪声的影响,并提供了多个输入参考电压的工作输出。
    • 6. 发明申请
    • Differential amplifier, digital-to-analog converter, and display device
    • 差分放大器,数模转换器和显示设备
    • US20070085608A1
    • 2007-04-19
    • US11526636
    • 2006-09-26
    • Masao IriguchiHiroshi Tsuchi
    • Masao IriguchiHiroshi Tsuchi
    • H03F3/45
    • H03F3/45183G09G3/3688G09G2310/027H03F2203/45616H03F2203/45631H03F2203/45656H03F2203/45682H03F2203/45728H03M1/765
    • Disclosed is a differential amplifier of a multi-level output type comprising a load circuit including a diode-connected first transistor with a source thereof connected to a power supply and a second transistor with a source thereof connected to the power supply and connected to a gate of the first transistor through a capacitor, a differential pair including a third transistor and a fourth transistor with sources thereof connected in common and drains thereof connected to drains of the first and second transistors, respectively, a current source for supplying a current to the differential pair, a first switch connected between a gate of the second transistor and a drain of the fourth transistor, an amplifier with an input thereof connected to a drain of the second transistor and an output thereof connected to an output terminal, a second switch connected between a gate of the fourth transistor and a first input terminal, a third switch connected between the gate of the fourth transistor and a third input terminal, a fourth switch connected between a gate of the third transistor and a second input terminal, and a fifth switch connected between the gate of the third transistor and the output terminal. Switching control between a first state where the first, second and fourth switches are turned on and the third and fifth switches are turned off and a second state where the first and second fourth switches are turned off and the third and fifth switches are turned on is performed.
    • 公开了一种多电平输出型的差分放大器,包括负载电路,负载电路包括二极管连接的第一晶体管,其源极连接到电源,第二晶体管的源极连接到电源并连接到栅极 第一晶体管通过电容器,差分对包括第三晶体管和第四晶体管,其源极分别连接到第一和第二晶体管的漏极,电流源分别连接到第一和第二晶体管的漏极,电流源用于向差分 连接在第二晶体管的栅极和第四晶体管的漏极之间的第一开关,放大器,其输入连接到第二晶体管的漏极,其输出连接到输出端子,第二开关连接在 第四晶体管的栅极和第一输入端子,连接在第四晶体管的栅极之间的第三开关 tor和第三输入端,连接在第三晶体管的栅极和第二输入端之间的第四开关,以及连接在第三晶体管的栅极和输出端之间的第五开关。 在第一,第二和第四开关导通的第一状态和第三和第五开关之间的开关控制被关断,而第一和第二第四开关被断开并且第三和第五开关导通的第二状态是 执行。
    • 7. 发明申请
    • Active matrix type display device and driving method thereof
    • 有源矩阵型显示装置及其驱动方法
    • US20060244710A1
    • 2006-11-02
    • US11411048
    • 2006-04-26
    • Masao IriguchiHiroshi Tsuchi
    • Masao IriguchiHiroshi Tsuchi
    • G09G3/36
    • G09G3/3266G09G3/3275G09G2300/0842G09G2310/0248G09G2310/027G09G2320/0252G09G2330/021
    • Disclosed is a display device including display unit, a column driver, a delay control circuit, an output switch control circuit, and a display controller. The display unit includes a plurality of pixel electrodes arranged at intersections between a plurality of data lines and a plurality of scan lines in a matrix form and TFTs. One of a drain and a source of each of the TFTs is connected to a corresponding one of the pixel electrodes. The other one of the drain and the source of each of the TFTs is connected to a corresponding one of the data lines, and a gate of each of the TFTs is connected to a corresponding one of the scan lines. The scan driver supplies a scan signal to each of the scan line in a preset scan cycle. The column driver includes D/A converter circuits for converting video data to gray scale signals, a plurality of buffer amplifiers for sequentially amplifying and outputting the gray scale signals in a preset output cycle, and an output switch circuit including a plurality of switches connected to output terminals of the buffer amplifiers and the data lines, respectively. The delay control circuit controls the scan driver so that the preset scan cycle is delayed from the preset output cycle just by a preset delay time. The output switch control circuit controls the output switch circuit to be kept off during the preset delay time. The display controller controls the video data, scan driver, column driver, delay control circuit, and output switch control circuit, respectively.
    • 公开了一种显示装置,包括显示单元,列驱动器,延迟控制电路,输出开关控制电路和显示控制器。 显示单元包括布置在矩阵形式的多条数据线和多条扫描线与TFT之间的交叉处的多个像素电极。 每个TFT的漏极和源极之一连接到相应的一个像素电极。 每个TFT的漏极和源极中的另一个连接到对应的一条数据线,并且每个TFT的栅极连接到相应的一条扫描线。 扫描驱动器在预设的扫描周期中向扫描线提供扫描信号。 列驱动器包括用于将视频数据转换为灰度信号的D / A转换器电路,用于在预设输出周期中顺序放大并输出灰度信号的多个缓冲放大器,以及包括多个开关的输出开关电路, 缓冲放大器和数据线的输出端。 延迟控制电路控制扫描驱动器,使得预设的扫描周期从预设的输出周期延迟预设的延迟时间。 输出开关控制电路在预设的延迟时间内控制输出开关电路的关断。 显示控制器分别控制视频数据,扫描驱动器,列驱动器,延迟控制电路和输出开关控制电路。
    • 9. 发明授权
    • Differential amplifier and digital-to-analog converter
    • 差分放大器和数模转换器
    • US07554389B2
    • 2009-06-30
    • US11657208
    • 2007-01-24
    • Hiroshi TsuchiMasao Iriguchi
    • Hiroshi TsuchiMasao Iriguchi
    • H03F1/02H03F3/45
    • H03F3/45183H03F1/26H03F2200/372H03F2203/45548H03F2203/45616H03M1/765
    • A differential amplifier comprises first, second, and third input terminals (1, 2, and 3), output terminal (4), first and second differential pairs (531 and 532) (533 and 534) driven by a corresponding current source and having output pairs commonly connected to load circuits (537 and 538), and an amplifier stage (539) having input end connected to at least one of the common connection points of the load circuits and output pairs of the first and second differential pairs and output end connected to output terminal. Input pair of second differential pair receives a signal from third input terminal and a feedback signal from output terminal. First and second switches (SW1 and SW2) are provided between the input pair of the first differential pair and the first and second input terminals (1 and 2), and first and second capacitors (C1 and C2) connected between each connection point of the input pair of the first differential pair and the first and second switches (SW1 and SW2) and a reference voltage terminal are provided. The first, second and third input terminals (1, 2, and 3) may be combined into one terminal to which voltages are serially supplied. It avoids the influence of power supply/signal noise and switch noise, and provides operational output from a plurality of input reference voltages.
    • 差分放大器包括由相应的电流源驱动的第一,第二和第三输入端子(1,2和3),输出端子(4),第一和第二差分对(531和532)(533和534) 通常连接到负载电路(537和538)的输出对以及具有连接到负载电路的公共连接点和第一和第二差分对的输出对中的至少一个的输入端的放大器级(539)和输出端 连接到输出端子。 第二差分对的输入对接收来自第三输入端的信号和来自输出端的反馈信号。 第一和第二开关(SW1和SW2)设置在第一差分对的输入对与第一和第二输入端(1和2)之间,第一和第二电容器(C1和C2)连接在第一和第二开关 提供第一差分对和第一和第二开关(SW1和SW2)的输入对和参考电压端子。 第一,第二和第三输入端子(1,2和3)可以组合成串联供应电压的一个端子。 它避免了电源/信号噪声和开关噪声的影响,并提供了多个输入参考电压的工作输出。
    • 10. 发明申请
    • DIFFERENTIAL AMPLIFIER, DIGITAL-TO-ANALOG CONVERTER AND DISPLAY DEVICE
    • 差分放大器,数字到模拟转换器和显示设备
    • US20070236289A1
    • 2007-10-11
    • US11689340
    • 2007-03-21
    • Masao Iriguchi
    • Masao Iriguchi
    • H03F3/45
    • H03F3/45179H03F3/45744H03F3/45748H03F2203/45212H03F2203/45536H03F2203/45588H03F2203/45616H03F2203/45681H03F2203/45726H03M1/0607
    • Disclosed are a multi-level differential amplifier that includes first to third input terminals; an output terminal; first to third differential pairs; a current source circuit for supplying currents to the respective first to mth differential pairs; a load circuit connected to first and second nodes to which first and second outputs of each of output pairs of the first to third differential pairs are connected in common; an amplifier stage receiving a signal from at least one node of the first and second nodes as an input and having its output connected to the output terminal; and a capacitance element. A data output period includes first and second periods. In the first period, responsive to a control signal, a first input of each input pair of the first to third differential pairs is made a non-inverting input, the second input is made an inverting input, the first inputs are connected to the respective first to third input terminals, and the second inputs of the first to third differential pairs are connected in common with one end of the capacitance element and with the output terminal. In the second period, responsive to a control signal, the first input of each input pair of the first to third differential pairs is made an inverting input and the second input is made a non-inverting input, the first inputs of each of the input pairs are connected in common with the output terminal, and the second inputs are connected in common with the one end of the capacitance element.
    • 公开了包括第一至第三输入端的多电平差分放大器; 输出端子; 第一到第三差分对; 电流源电路,用于向相应的第一至第m差分对提供电流; 连接到第一和第二节点的负载电路,第一至第三差分对的每个输出对的第一和第二输出共同连接到该负载电路; 放大器级接收来自第一和第二节点的至少一个节点的信号作为输入并将其输出连接到输出端; 和电容元件。 数据输出周期包括第一和第二周期。 在第一时段中,响应于控制信号,将第一至第三差分对的每个输入对的第一输入作为非反相输入,将第二输入作为反相输入,将第一输入连接到相应的输入 第一至第三输入端子,第一至第三差分对的第二输入端与电容元件的一端和输出端子共同连接。 在第二时段中,响应于控制信号,将第一至第三差分对的每个输入对的第一输入作为反相输入,将第二输入作为非反相输入,输入的每一个的第一输入 对与输出端子共同连接,第二输入端与电容元件的一端共同连接。