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    • 1. 发明授权
    • Radial gate array cell
    • 径向栅阵列单元
    • US5444275A
    • 1995-08-22
    • US058665
    • 1993-05-10
    • Masahiro KugishimaHiroyuki SatoMasaaki NariishiNoboru YamakawaTakahiro Yamamoto
    • Masahiro KugishimaHiroyuki SatoMasaaki NariishiNoboru YamakawaTakahiro Yamamoto
    • H01L27/118
    • H01L27/11807
    • Gate width directions of transistors are taken in circumferential directions surrounding a certain point as a center. Or transistors are constructed by a plurality of straight lines extending in radial directions of the certain point and intersecting each other at the same angle. Hereby, basic cells can be assembled on a master slice symmetrically in plural directions. There are arranged in a mutual adjacent relation in which channel layers located under one opposing gate electrodes are formed into P channels and channel layers located under the other opposing gate electrodes are formed into N channels. Otherwise, there are arranged alternately with respect to P channels and N channels in an adjacent relation basic cells in which all channel layers located under all gate electrodes in the same basic cell are formed by any type of the P channel and the N channel.
    • 晶体管的栅极宽度方向以围绕某一点为中心的圆周方向取。 或者,晶体管由在该特定点的径向方向上延伸并以相同的角度彼此相交的多条直线构成。 因此,基本单元可以在多个方向上对称地组装在主切片上。 布置在相互相邻的关系中,其中位于一个相对的栅电极下方的沟道层形成为P沟道,并且位于其他相对的栅电极下方的沟道层形成为N沟道。 否则,相对于相邻基站中的P信道和N个信道交替布置,其中位于同一基站中的所有栅电极下方的所有信道层由任何类型的P信道和N信道形成。